mirror of https://github.com/acidanthera/audk.git
DynamicTablesPkg: Add PCCT related objects
Introduce the following CmObj in the ArmNameSpaceObjects: - CM_ARM_MAILBOX_REGISTER_INFO - CM_ARM_PCC_SUBSPACE_CHANNEL_TIMING_INFO - CM_ARM_PCC_SUBSPACE_GENERIC_INFO - CM_ARM_PCC_SUBPSACE_TYPE0_INFO - CM_ARM_PCC_SUBPSACE_TYPE1_INFO - CM_ARM_PCC_SUBPSACE_TYPE2_INFO - CM_ARM_PCC_SUBPSACE_TYPE3_INFO - CM_ARM_PCC_SUBPSACE_TYPE4_INFO - CM_ARM_PCC_SUBPSACE_TYPE5_INFO These objects allow to describe mailbox registers, pcc timings and PCCT subspaces. They prepare the enablement of a PCCT generator. Also add the CmObjParsers associated to each object. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
This commit is contained in:
Pierre Gondois
mergify[bot]
parent
a5672d43a6
commit
dab7bac94c
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@ -22,49 +22,55 @@
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in the ARM Namespace
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*/
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typedef enum ArmObjectID {
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EArmObjReserved, ///< 0 - Reserved
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EArmObjBootArchInfo, ///< 1 - Boot Architecture Info
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EArmObjCpuInfo, ///< 2 - CPU Info
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EArmObjPowerManagementProfileInfo, ///< 3 - Power Management Profile Info
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EArmObjGicCInfo, ///< 4 - GIC CPU Interface Info
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EArmObjGicDInfo, ///< 5 - GIC Distributor Info
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EArmObjGicMsiFrameInfo, ///< 6 - GIC MSI Frame Info
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EArmObjGicRedistributorInfo, ///< 7 - GIC Redistributor Info
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EArmObjGicItsInfo, ///< 8 - GIC ITS Info
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EArmObjSerialConsolePortInfo, ///< 9 - Serial Console Port Info
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EArmObjSerialDebugPortInfo, ///< 10 - Serial Debug Port Info
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EArmObjGenericTimerInfo, ///< 11 - Generic Timer Info
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EArmObjPlatformGTBlockInfo, ///< 12 - Platform GT Block Info
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EArmObjGTBlockTimerFrameInfo, ///< 13 - Generic Timer Block Frame Info
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EArmObjPlatformGenericWatchdogInfo, ///< 14 - Platform Generic Watchdog
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EArmObjPciConfigSpaceInfo, ///< 15 - PCI Configuration Space Info
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EArmObjHypervisorVendorIdentity, ///< 16 - Hypervisor Vendor Id
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EArmObjFixedFeatureFlags, ///< 17 - Fixed feature flags for FADT
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EArmObjItsGroup, ///< 18 - ITS Group
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EArmObjNamedComponent, ///< 19 - Named Component
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EArmObjRootComplex, ///< 20 - Root Complex
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EArmObjSmmuV1SmmuV2, ///< 21 - SMMUv1 or SMMUv2
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EArmObjSmmuV3, ///< 22 - SMMUv3
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EArmObjPmcg, ///< 23 - PMCG
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EArmObjGicItsIdentifierArray, ///< 24 - GIC ITS Identifier Array
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EArmObjIdMappingArray, ///< 25 - ID Mapping Array
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EArmObjSmmuInterruptArray, ///< 26 - SMMU Interrupt Array
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EArmObjProcHierarchyInfo, ///< 27 - Processor Hierarchy Info
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EArmObjCacheInfo, ///< 28 - Cache Info
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EArmObjReserved29, ///< 29 - Reserved
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EArmObjCmRef, ///< 30 - CM Object Reference
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EArmObjMemoryAffinityInfo, ///< 31 - Memory Affinity Info
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EArmObjDeviceHandleAcpi, ///< 32 - Device Handle Acpi
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EArmObjDeviceHandlePci, ///< 33 - Device Handle Pci
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EArmObjGenericInitiatorAffinityInfo, ///< 34 - Generic Initiator Affinity
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EArmObjSerialPortInfo, ///< 35 - Generic Serial Port Info
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EArmObjCmn600Info, ///< 36 - CMN-600 Info
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EArmObjLpiInfo, ///< 37 - Lpi Info
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EArmObjPciAddressMapInfo, ///< 38 - Pci Address Map Info
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EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info
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EArmObjRmr, ///< 40 - Reserved Memory Range Node
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EArmObjMemoryRangeDescriptor, ///< 41 - Memory Range Descriptor
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EArmObjCpcInfo, ///< 42 - Continuous Performance Control Info
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EArmObjReserved, ///< 0 - Reserved
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EArmObjBootArchInfo, ///< 1 - Boot Architecture Info
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EArmObjCpuInfo, ///< 2 - CPU Info
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EArmObjPowerManagementProfileInfo, ///< 3 - Power Management Profile Info
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EArmObjGicCInfo, ///< 4 - GIC CPU Interface Info
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EArmObjGicDInfo, ///< 5 - GIC Distributor Info
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EArmObjGicMsiFrameInfo, ///< 6 - GIC MSI Frame Info
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EArmObjGicRedistributorInfo, ///< 7 - GIC Redistributor Info
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EArmObjGicItsInfo, ///< 8 - GIC ITS Info
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EArmObjSerialConsolePortInfo, ///< 9 - Serial Console Port Info
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EArmObjSerialDebugPortInfo, ///< 10 - Serial Debug Port Info
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EArmObjGenericTimerInfo, ///< 11 - Generic Timer Info
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EArmObjPlatformGTBlockInfo, ///< 12 - Platform GT Block Info
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EArmObjGTBlockTimerFrameInfo, ///< 13 - Generic Timer Block Frame Info
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EArmObjPlatformGenericWatchdogInfo, ///< 14 - Platform Generic Watchdog
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EArmObjPciConfigSpaceInfo, ///< 15 - PCI Configuration Space Info
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EArmObjHypervisorVendorIdentity, ///< 16 - Hypervisor Vendor Id
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EArmObjFixedFeatureFlags, ///< 17 - Fixed feature flags for FADT
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EArmObjItsGroup, ///< 18 - ITS Group
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EArmObjNamedComponent, ///< 19 - Named Component
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EArmObjRootComplex, ///< 20 - Root Complex
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EArmObjSmmuV1SmmuV2, ///< 21 - SMMUv1 or SMMUv2
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EArmObjSmmuV3, ///< 22 - SMMUv3
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EArmObjPmcg, ///< 23 - PMCG
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EArmObjGicItsIdentifierArray, ///< 24 - GIC ITS Identifier Array
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EArmObjIdMappingArray, ///< 25 - ID Mapping Array
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EArmObjSmmuInterruptArray, ///< 26 - SMMU Interrupt Array
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EArmObjProcHierarchyInfo, ///< 27 - Processor Hierarchy Info
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EArmObjCacheInfo, ///< 28 - Cache Info
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EArmObjReserved29, ///< 29 - Reserved
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EArmObjCmRef, ///< 30 - CM Object Reference
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EArmObjMemoryAffinityInfo, ///< 31 - Memory Affinity Info
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EArmObjDeviceHandleAcpi, ///< 32 - Device Handle Acpi
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EArmObjDeviceHandlePci, ///< 33 - Device Handle Pci
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EArmObjGenericInitiatorAffinityInfo, ///< 34 - Generic Initiator Affinity
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EArmObjSerialPortInfo, ///< 35 - Generic Serial Port Info
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EArmObjCmn600Info, ///< 36 - CMN-600 Info
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EArmObjLpiInfo, ///< 37 - Lpi Info
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EArmObjPciAddressMapInfo, ///< 38 - Pci Address Map Info
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EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info
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EArmObjRmr, ///< 40 - Reserved Memory Range Node
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EArmObjMemoryRangeDescriptor, ///< 41 - Memory Range Descriptor
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EArmObjCpcInfo, ///< 42 - Continuous Performance Control Info
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EArmObjPccSubspaceType0Info, ///< 43 - Pcc Subspace Type 0 Info
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EArmObjPccSubspaceType1Info, ///< 44 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType2Info, ///< 45 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType3Info, ///< 46 - Pcc Subspace Type 3 Info
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EArmObjPccSubspaceType4Info, ///< 47 - Pcc Subspace Type 4 Info
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EArmObjPccSubspaceType5Info, ///< 48 - Pcc Subspace Type 5 Info
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EArmObjMax
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} EARM_OBJECT_ID;
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@ -1095,6 +1101,191 @@ typedef struct CmArmRmrDescriptor {
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*/
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typedef AML_CPC_INFO CM_ARM_CPC_INFO;
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/** A structure that describes a
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PCC Mailbox Register.
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*/
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typedef struct PccMailboxRegisterInfo {
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/// GAS describing the Register.
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE Register;
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/** Mask of bits to preserve when writing.
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This mask is also used for registers. The Register is only read
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and there is no write mask required. E.g.:
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- Error Status mask (Cf. PCC Subspace types 3/4/5).
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- Command Complete Check mask (Cf. PCC Subspace types 3/4/5).
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*/
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UINT64 PreserveMask;
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/// Mask of bits to set when writing.
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UINT64 WriteMask;
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} PCC_MAILBOX_REGISTER_INFO;
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/** A structure that describes the
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PCC Subspace CHannel Timings.
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*/
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typedef struct PccSubspaceChannelTimingInfo {
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/// Expected latency to process a command, in microseconds.
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UINT32 NominalLatency;
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/** Maximum number of periodic requests that the subspace channel can
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support, reported in commands per minute. 0 indicates no limitation.
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This field is ignored for the PCC Subspace type 5 (HW Registers based).
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*/
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UINT32 MaxPeriodicAccessRate;
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/** Minimum amount of time that OSPM must wait after the completion
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of a command before issuing the next command, in microseconds.
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*/
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UINT16 MinRequestTurnaroundTime;
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} PCC_SUBSPACE_CHANNEL_TIMING_INFO;
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/** A structure that describes a
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Generic PCC Subspace (Type 0).
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*/
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typedef struct CmArmPccSubspaceGenericInfo {
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/** Subspace Id.
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Cf. ACPI 6.4, s14.7 Referencing the PCC address space
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Cf. s14.1.2 Platform Communications Channel Subspace Structures
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The subspace ID of a PCC subspace is its index in the array of
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subspace structures, starting with subspace 0.
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At most 256 subspaces are supported.
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*/
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UINT8 SubspaceId;
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/// Table type (or subspace).
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UINT8 Type;
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/// Base address of the shared memory range.
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/// This field is ignored for the PCC Subspace type 5 (HW Registers based).
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UINT64 BaseAddress;
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/// Address length.
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UINT64 AddressLength;
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/// Doorbell Register.
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PCC_MAILBOX_REGISTER_INFO DoorbellReg;
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/// Mailbox Timings.
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PCC_SUBSPACE_CHANNEL_TIMING_INFO ChannelTiming;
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} PCC_SUBSPACE_GENERIC_INFO;
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/** A structure that describes a
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PCC Subspace of type 0 (Generic).
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ID: EArmObjPccSubspaceType0Info
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*/
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typedef PCC_SUBSPACE_GENERIC_INFO CM_ARM_PCC_SUBSPACE_TYPE0_INFO;
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/** A structure that describes a
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PCC Subspace of type 1 (HW-Reduced).
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ID: EArmObjPccSubspaceType1Info
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*/
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typedef struct CmArmPccSubspaceType1Info {
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/** Generic Pcc information.
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The Subspace of Type0 contains information that can be re-used
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in other Subspace types.
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*/
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PCC_SUBSPACE_GENERIC_INFO GenericPccInfo;
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/// Platform Interrupt.
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CM_ARM_GENERIC_INTERRUPT PlatIrq;
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} CM_ARM_PCC_SUBSPACE_TYPE1_INFO;
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/** A structure that describes a
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PCC Subspace of type 2 (HW-Reduced).
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ID: EArmObjPccSubspaceType2Info
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*/
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typedef struct CmArmPccSubspaceType2Info {
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/** Generic Pcc information.
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The Subspace of Type0 contains information that can be re-used
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in other Subspace types.
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*/
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PCC_SUBSPACE_GENERIC_INFO GenericPccInfo;
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/// Platform Interrupt.
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CM_ARM_GENERIC_INTERRUPT PlatIrq;
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/// Platform Interrupt Register.
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PCC_MAILBOX_REGISTER_INFO PlatIrqAckReg;
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} CM_ARM_PCC_SUBSPACE_TYPE2_INFO;
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/** A structure that describes a
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PCC Subspace of type 3 (Extended)
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ID: EArmObjPccSubspaceType3Info
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*/
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typedef struct CmArmPccSubspaceType3Info {
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/** Generic Pcc information.
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The Subspace of Type0 contains information that can be re-used
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in other Subspace types.
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*/
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PCC_SUBSPACE_GENERIC_INFO GenericPccInfo;
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/// Platform Interrupt.
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CM_ARM_GENERIC_INTERRUPT PlatIrq;
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/// Platform Interrupt Register.
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PCC_MAILBOX_REGISTER_INFO PlatIrqAckReg;
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/// Command Complete Check Register.
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/// The WriteMask field is not used.
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PCC_MAILBOX_REGISTER_INFO CmdCompleteCheckReg;
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/// Command Complete Update Register.
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PCC_MAILBOX_REGISTER_INFO CmdCompleteUpdateReg;
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/// Error Status Register.
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/// The WriteMask field is not used.
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PCC_MAILBOX_REGISTER_INFO ErrorStatusReg;
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} CM_ARM_PCC_SUBSPACE_TYPE3_INFO;
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/** A structure that describes a
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PCC Subspace of type 4 (Extended)
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ID: EArmObjPccSubspaceType4Info
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*/
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typedef CM_ARM_PCC_SUBSPACE_TYPE3_INFO CM_ARM_PCC_SUBSPACE_TYPE4_INFO;
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/** A structure that describes a
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PCC Subspace of type 5 (HW-Registers).
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ID: EArmObjPccSubspaceType5Info
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*/
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typedef struct CmArmPccSubspaceType5Info {
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/** Generic Pcc information.
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The Subspace of Type0 contains information that can be re-used
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in other Subspace types.
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MaximumPeriodicAccessRate doesn't need to be populated for
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this structure.
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*/
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PCC_SUBSPACE_GENERIC_INFO GenericPccInfo;
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/// Version.
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UINT16 Version;
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/// Platform Interrupt.
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CM_ARM_GENERIC_INTERRUPT PlatIrq;
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/// Command Complete Check Register.
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/// The WriteMask field is not used.
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PCC_MAILBOX_REGISTER_INFO CmdCompleteCheckReg;
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/// Error Status Register.
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/// The WriteMask field is not used.
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PCC_MAILBOX_REGISTER_INFO ErrorStatusReg;
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} CM_ARM_PCC_SUBSPACE_TYPE5_INFO;
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#pragma pack()
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#endif // ARM_NAMESPACE_OBJECTS_H_
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@ -539,6 +539,101 @@ STATIC CONST CM_OBJ_PARSER CmArmCpcInfoParser[] = {
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{ "NominalFrequencyInteger", 4, "0x%lx", NULL },
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};
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/** A parser for the PCC_MAILBOX_REGISTER_INFO struct.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmMailboxRegisterInfoParser[] = {
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{ "Register", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE), NULL, NULL,
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AcpiGenericAddressParser, ARRAY_SIZE (AcpiGenericAddressParser) },
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{ "PreserveMask", 8, "0x%llx", NULL },
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{ "WriteMask", 8, "0x%llx", NULL },
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};
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/** A parser for the PCC_SUBSPACE_CHANNEL_TIMING_INFO struct.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceChannelTimingInfoParser[] = {
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{ "NominalLatency", 4, "0x%x", NULL },
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{ "MaxPeriodicAccessRate", 4, "0x%x", NULL },
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{ "MinRequestTurnaroundTime", 2, "0x%x", NULL },
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};
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/** A parser for EArmObjPccSubspaceType0Info.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType0InfoParser[] = {
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{ "SubspaceId", 1, "0x%x", NULL },
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{ "Type", 1, "0x%x", NULL },
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{ "BaseAddress", 8, "0x%llx", NULL },
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{ "AddressLength", 8, "0x%llx", NULL },
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{ "DoorbellReg", sizeof (PCC_MAILBOX_REGISTER_INFO),
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NULL, NULL, CmArmMailboxRegisterInfoParser,
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ARRAY_SIZE (CmArmMailboxRegisterInfoParser) },
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{ "ChannelTiming", sizeof (PCC_SUBSPACE_CHANNEL_TIMING_INFO),
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NULL, NULL, CmArmPccSubspaceChannelTimingInfoParser,
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ARRAY_SIZE (CmArmPccSubspaceChannelTimingInfoParser) },
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};
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/** A parser for EArmObjPccSubspaceType1Info.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType1InfoParser[] = {
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{ "GenericPccInfo", sizeof (PCC_SUBSPACE_GENERIC_INFO),
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NULL, NULL, CmArmPccSubspaceType0InfoParser,
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ARRAY_SIZE (CmArmPccSubspaceType0InfoParser) },
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{ "PlatIrq", sizeof (CM_ARM_GENERIC_INTERRUPT),
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NULL, NULL, CmArmGenericInterruptParser,
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ARRAY_SIZE (CmArmGenericInterruptParser) },
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};
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/** A parser for EArmObjPccSubspaceType2Info.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType2InfoParser[] = {
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{ "GenericPccInfo", sizeof (PCC_SUBSPACE_GENERIC_INFO),
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NULL, NULL, CmArmPccSubspaceType0InfoParser,
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ARRAY_SIZE (CmArmPccSubspaceType0InfoParser) },
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{ "PlatIrq", sizeof (CM_ARM_GENERIC_INTERRUPT), NULL,NULL,
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CmArmGenericInterruptParser, ARRAY_SIZE (CmArmGenericInterruptParser) },
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{ "PlatIrqAckReg", sizeof (PCC_MAILBOX_REGISTER_INFO),
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NULL, NULL, CmArmMailboxRegisterInfoParser,
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ARRAY_SIZE (CmArmMailboxRegisterInfoParser) },
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};
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/** A parser for EArmObjPccSubspaceType3Info or EArmObjPccSubspaceType4Info.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType34InfoParser[] = {
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{ "GenericPccInfo", sizeof (PCC_SUBSPACE_GENERIC_INFO),
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NULL, NULL, CmArmPccSubspaceType0InfoParser,
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ARRAY_SIZE (CmArmPccSubspaceType0InfoParser) },
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{ "PlatIrq", sizeof (CM_ARM_GENERIC_INTERRUPT), NULL,NULL,
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CmArmGenericInterruptParser, ARRAY_SIZE (CmArmGenericInterruptParser) },
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{ "PlatIrqAckReg", sizeof (PCC_MAILBOX_REGISTER_INFO),
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NULL, NULL, CmArmMailboxRegisterInfoParser,
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ARRAY_SIZE (CmArmMailboxRegisterInfoParser) },
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{ "CmdCompleteCheckReg", sizeof (PCC_MAILBOX_REGISTER_INFO),
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NULL, NULL, CmArmMailboxRegisterInfoParser,
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ARRAY_SIZE (CmArmMailboxRegisterInfoParser) },
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{ "CmdCompleteUpdateReg", sizeof (PCC_MAILBOX_REGISTER_INFO),
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NULL, NULL, CmArmMailboxRegisterInfoParser,
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ARRAY_SIZE (CmArmMailboxRegisterInfoParser) },
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{ "ErrorStatusReg", sizeof (PCC_MAILBOX_REGISTER_INFO),
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NULL, NULL, CmArmMailboxRegisterInfoParser,
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ARRAY_SIZE (CmArmMailboxRegisterInfoParser) },
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};
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/** A parser for EArmObjPccSubspaceType5Info.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType5InfoParser[] = {
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{ "GenericPccInfo", sizeof (PCC_SUBSPACE_GENERIC_INFO),
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NULL, NULL, CmArmPccSubspaceType0InfoParser,
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ARRAY_SIZE (CmArmPccSubspaceType0InfoParser) },
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{ "Version", 2, "0x%x",NULL },
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{ "PlatIrq", sizeof (CM_ARM_GENERIC_INTERRUPT), NULL, NULL,
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CmArmGenericInterruptParser, ARRAY_SIZE (CmArmGenericInterruptParser) },
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{ "CmdCompleteCheckReg", sizeof (PCC_MAILBOX_REGISTER_INFO),
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NULL, NULL, CmArmMailboxRegisterInfoParser,
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ARRAY_SIZE (CmArmMailboxRegisterInfoParser) },
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{ "ErrorStatusReg", sizeof (PCC_MAILBOX_REGISTER_INFO),
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NULL, NULL, CmArmMailboxRegisterInfoParser,
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ARRAY_SIZE (CmArmMailboxRegisterInfoParser) },
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};
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/** A parser for Arm namespace objects.
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*/
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STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
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@ -623,6 +718,18 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
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ARRAY_SIZE (CmArmMemoryRangeDescriptorInfoParser) },
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{ "EArmObjCpcInfo", CmArmCpcInfoParser,
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ARRAY_SIZE (CmArmCpcInfoParser) },
|
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{ "EArmObjPccSubspaceType0Info", CmArmPccSubspaceType0InfoParser,
|
||||
ARRAY_SIZE (CmArmPccSubspaceType0InfoParser) },
|
||||
{ "EArmObjPccSubspaceType1Info", CmArmPccSubspaceType1InfoParser,
|
||||
ARRAY_SIZE (CmArmPccSubspaceType1InfoParser) },
|
||||
{ "EArmObjPccSubspaceType2Info", CmArmPccSubspaceType2InfoParser,
|
||||
ARRAY_SIZE (CmArmPccSubspaceType2InfoParser) },
|
||||
{ "EArmObjPccSubspaceType3Info", CmArmPccSubspaceType34InfoParser,
|
||||
ARRAY_SIZE (CmArmPccSubspaceType34InfoParser) },
|
||||
{ "EArmObjPccSubspaceType4Info", CmArmPccSubspaceType34InfoParser,
|
||||
ARRAY_SIZE (CmArmPccSubspaceType34InfoParser) },
|
||||
{ "EArmObjPccSubspaceType5Info", CmArmPccSubspaceType5InfoParser,
|
||||
ARRAY_SIZE (CmArmPccSubspaceType5InfoParser) },
|
||||
{ "EArmObjMax", NULL, 0 },
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue