mirror of https://github.com/acidanthera/audk.git
Remove ".intel_syntax", convert MASM to GAS.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9067 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
gikidy
parent
2ce5c88a7a
commit
db63aeea6d
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@ -1,8 +1,3 @@
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#
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# ConvertAsm.py: Automatically generated from CpuAsm.asm
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#
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# TITLE CpuAsm.asm:
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#------------------------------------------------------------------------------
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#*
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#* Copyright 2006 - 2009, Intel Corporation
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@ -33,11 +28,10 @@
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ExternalVectorTablePtr:
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.byte 0, 0, 0, 0
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.intel_syntax
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ASM_GLOBAL ASM_PFX(InitializeExternalVectorTablePtr)
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ASM_PFX(InitializeExternalVectorTablePtr):
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mov eax, [esp+4]
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mov ExternalVectorTablePtr, eax
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movl 4(%esp), %eax
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movl %eax, ExternalVectorTablePtr
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ret
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#------------------------------------------------------------------------------
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@ -46,17 +40,16 @@ ASM_PFX(InitializeExternalVectorTablePtr):
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# UINT16 Selector
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# );
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#------------------------------------------------------------------------------
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.intel_syntax
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ASM_GLOBAL ASM_PFX(SetCodeSelector)
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ASM_PFX(SetCodeSelector):
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mov %ecx, [%esp+4]
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sub %esp, 0x10
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lea %eax, setCodeSelectorLongJump
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mov [%esp], %eax
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mov [%esp+4], %cx
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jmp fword ptr [%esp]
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movl 4(%esp), %ecx
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subl $0x10, %esp
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leal setCodeSelectorLongJump, %eax
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movl %eax, (%esp)
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movw %cx, 4(%esp)
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.byte 0xFF, 0x2C, 0x24 # jmp *(%esp) note:(FWORD jmp)
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setCodeSelectorLongJump:
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add %esp, 0x10
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addl $0x10, %esp
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ret
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#------------------------------------------------------------------------------
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@ -65,15 +58,14 @@ setCodeSelectorLongJump:
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# UINT16 Selector
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# );
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#------------------------------------------------------------------------------
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.intel_syntax
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ASM_GLOBAL ASM_PFX(SetDataSelectors)
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ASM_PFX(SetDataSelectors):
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mov %ecx, [%esp+4]
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mov %ss, %cx
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mov %ds, %cx
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mov %es, %cx
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mov %fs, %cx
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mov %gs, %cx
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movl 4(%esp), %ecx
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movw %cx, %ss
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movw %cx, %ds
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movw %cx, %es
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movw %cx, %fs
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movw %cx, %gs
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ret
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#---------------------------------------;
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@ -81,7 +73,6 @@ ASM_PFX(SetDataSelectors):
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#---------------------------------------;
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# The follow algorithm is used for the common interrupt routine.
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.intel_syntax
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ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
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ASM_PFX(CommonInterruptEntry):
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cli
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@ -96,12 +87,12 @@ ASM_PFX(CommonInterruptEntry):
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# Get the return address of call, actually, it is the
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# address of vector number.
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#
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xchg ecx, [esp]
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mov cx, [ecx]
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and ecx, 0x0FFFF
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cmp ecx, 32 # Intel reserved vector for exceptions?
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xchgl (%esp), %ecx
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movw (%ecx), %cx
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andl $0x0FFFF, %ecx
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cmpl $32, %ecx # Intel reserved vector for exceptions?
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jae NoErrorCode
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bt ASM_PFX(mErrorCodeFlag), ecx
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bt %ecx, ASM_PFX(mErrorCodeFlag)
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jc HasErrorCode
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NoErrorCode:
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@ -125,13 +116,13 @@ NoErrorCode:
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#
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# Put Vector Number on stack
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#
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push ecx
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pushl %ecx
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#
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# Put 0 (dummy) error code on stack, and restore ECX
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#
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xor ecx, ecx # ECX = 0
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xchg ecx, [esp+4]
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xorl %ecx, %ecx # ECX = 0
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xchgl 4(%esp), %ecx
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jmp ErrorCodeAndVectorOnStack
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@ -158,7 +149,7 @@ HasErrorCode:
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#
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# Put Vector Number on stack and restore ECX
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#
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xchg ecx, [esp]
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xchgl (%esp), %ecx
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#
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# Fall through to join main routine code
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@ -168,8 +159,8 @@ CommonInterruptEntry_al_0000:
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jmp CommonInterruptEntry_al_0000
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ErrorCodeAndVectorOnStack:
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push ebp
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mov ebp, esp
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pushl %ebp
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movl %esp, %ebp
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#
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# Stack:
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@ -192,203 +183,203 @@ ErrorCodeAndVectorOnStack:
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# Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
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# is 16-byte aligned
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#
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and esp, 0x0fffffff0
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sub esp, 12
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andl $0x0fffffff0, %esp
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subl $12, %esp
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#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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push eax
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push ecx
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push edx
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push ebx
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lea ecx, [ebp + 6 * 4]
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push ecx # ESP
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push dword ptr [ebp] # EBP
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push esi
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push edi
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pushl %eax
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pushl %ecx
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pushl %edx
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pushl %ebx
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leal 24(%ebp), %ecx
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pushl %ecx # ESP
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pushl (%ebp) # EBP
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pushl %esi
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pushl %edi
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#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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mov eax, ss
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push eax
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movzx eax, word ptr [ebp + 4 * 4]
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push eax
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mov eax, ds
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push eax
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mov eax, es
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push eax
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mov eax, fs
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push eax
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mov eax, gs
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push eax
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movl %ss, %eax
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pushl %eax
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movzwl 16(%ebp), %eax
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pushl %eax
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movl %ds, %eax
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pushl %eax
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movl %es, %eax
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pushl %eax
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movl %fs, %eax
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pushl %eax
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movl %gs, %eax
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pushl %eax
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#; UINT32 Eip;
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mov eax, [ebp + 3 * 4]
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push eax
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movl 12(%ebp), %eax
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pushl %eax
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#; UINT32 Gdtr[2], Idtr[2];
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sub esp, 8
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sidt [esp]
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mov eax, [esp + 2]
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xchg eax, [esp]
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and eax, 0x0FFFF
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mov [esp+4], eax
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subl $8, %esp
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sidt (%esp)
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movl 2(%esp), %eax
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xchgl (%esp), %eax
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andl $0x0FFFF, %eax
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movl %eax, 4(%esp)
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sub esp, 8
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sgdt [esp]
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mov eax, [esp + 2]
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xchg eax, [esp]
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and eax, 0x0FFFF
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mov [esp+4], eax
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subl $8, %esp
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sgdt (%esp)
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movl 2(%esp), %eax
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xchgl (%esp), %eax
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andl $0x0FFFF, %eax
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movl %eax, 4(%esp)
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#; UINT32 Ldtr, Tr;
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xor eax, eax
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str ax
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push eax
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sldt ax
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push eax
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xorl %eax, %eax
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str %ax
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pushl %eax
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sldt %ax
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pushl %eax
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#; UINT32 EFlags;
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mov eax, [ebp + 5 * 4]
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push eax
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movl 20(%ebp), %eax
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pushl %eax
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#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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mov eax, cr4
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or eax, 0x208
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mov cr4, eax
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push eax
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mov eax, cr3
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push eax
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mov eax, cr2
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push eax
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xor eax, eax
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push eax
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mov eax, cr0
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push eax
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movl %cr4, %eax
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orl $0x208, %eax
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movl %eax, %cr4
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pushl %eax
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movl %cr3, %eax
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pushl %eax
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movl %cr2, %eax
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pushl %eax
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xorl %eax, %eax
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pushl %eax
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movl %cr0, %eax
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pushl %eax
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#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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mov eax, dr7
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push eax
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movl %dr7, %eax
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pushl %eax
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#; clear Dr7 while executing debugger itself
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xor eax, eax
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mov dr7, eax
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xorl %eax, %eax
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movl %eax, %dr7
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mov eax, dr6
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push eax
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movl %dr6, %eax
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pushl %eax
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#; insure all status bits in dr6 are clear...
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xor eax, eax
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mov dr6, eax
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xorl %eax, %eax
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movl %eax, %dr6
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mov eax, dr3
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push eax
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mov eax, dr2
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push eax
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mov eax, dr1
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push eax
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mov eax, dr0
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push eax
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movl %dr3, %eax
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pushl %eax
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movl %dr2, %eax
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pushl %eax
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movl %dr1, %eax
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pushl %eax
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movl %dr0, %eax
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pushl %eax
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#; FX_SAVE_STATE_IA32 FxSaveState;
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sub esp, 512
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mov edi, esp
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subl $512, %esp
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movl %esp, %edi
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.byte 0x0f, 0x0ae, 0x07 #fxsave [edi]
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#; UINT32 ExceptionData;
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push dword ptr [ebp + 2 * 4]
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pushl 8(%ebp)
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#; call into exception handler
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mov eax, ExternalVectorTablePtr # get the interrupt vectors base
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or eax, eax # NULL?
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movl ExternalVectorTablePtr, %eax # get the interrupt vectors base
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orl %eax, %eax # NULL?
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jz nullExternalExceptionHandler
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mov ecx, [ebp + 4]
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mov eax, [eax + ecx * 4]
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or eax, eax # NULL?
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mov 4(%ebp), %ecx
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movl (%eax,%ecx,4), %eax
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orl %eax, %eax # NULL?
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jz nullExternalExceptionHandler
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#; Prepare parameter and call
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mov edx, esp
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push edx
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mov edx, dword ptr [ebp + 1 * 4]
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push edx
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movl %esp, %edx
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pushl %edx
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movl 4(%ebp), %edx
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pushl %edx
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#
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# Call External Exception Handler
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#
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call eax
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add esp, 8
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call *%eax
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addl $8, %esp
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nullExternalExceptionHandler:
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cli
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#; UINT32 ExceptionData;
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add esp, 4
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addl $4, %esp
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#; FX_SAVE_STATE_IA32 FxSaveState;
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mov esi, esp
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movl %esp, %esi
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.byte 0x0f, 0x0ae, 0x0e # fxrstor [esi]
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add esp, 512
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addl $512, %esp
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#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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pop eax
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mov dr0, eax
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pop eax
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mov dr1, eax
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pop eax
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mov dr2, eax
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pop eax
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mov dr3, eax
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popl %eax
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movl %eax, %dr0
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popl %eax
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movl %eax, %dr1
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popl %eax
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movl %eax, %dr2
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popl %eax
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movl %eax, %dr3
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#; skip restore of dr6. We cleared dr6 during the context save.
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add esp, 4
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pop eax
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mov dr7, eax
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addl $4, %esp
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popl %eax
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movl %eax, %dr7
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#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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pop eax
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mov cr0, eax
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add esp, 4 # not for Cr1
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pop eax
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mov cr2, eax
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pop eax
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mov cr3, eax
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pop eax
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mov cr4, eax
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popl %eax
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movl %eax, %cr0
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addl $4, %esp # not for Cr1
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popl %eax
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movl %eax, %cr2
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popl %eax
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movl %eax, %cr3
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popl %eax
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movl %eax, %cr4
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#; UINT32 EFlags;
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pop dword ptr [ebp + 5 * 4]
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popl 20(%ebp)
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#; UINT32 Ldtr, Tr;
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#; UINT32 Gdtr[2], Idtr[2];
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#; Best not let anyone mess with these particular registers...
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add esp, 24
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addl $24, %esp
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#; UINT32 Eip;
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pop dword ptr [ebp + 3 * 4]
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popl 12(%ebp)
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#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
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#; NOTE - modified segment registers could hang the debugger... We
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#; could attempt to insulate ourselves against this possibility,
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#; but that poses risks as well.
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#;
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pop gs
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pop fs
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pop es
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pop ds
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pop dword ptr [ebp + 4 * 4]
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pop ss
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popl %gs
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popl %fs
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popl %es
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popl %ds
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popl 16(%ebp)
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popl %ss
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#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
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pop edi
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pop esi
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add esp, 4 # not for ebp
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add esp, 4 # not for esp
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pop ebx
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pop edx
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pop ecx
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pop eax
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popl %edi
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popl %esi
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addl $4, %esp # not for ebp
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addl $4, %esp # not for esp
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popl %ebx
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popl %edx
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popl %ecx
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popl %eax
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mov esp, ebp
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pop ebp
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add esp, 8
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iretd
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movl %ebp, %esp
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popl %ebp
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addl $8, %esp
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iretl
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#END
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