mirror of https://github.com/acidanthera/audk.git
MdeModulePkg/XhciDxe: Use BaseLib linked list iteration macros
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959 Replaces usage of the linked list iteration macros defined in Xhci.h with the common definition in BaseLib.h. Cc: Dandan Bi <dandan.bi@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
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@ -3,6 +3,7 @@
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Provides some data structure definitions used by the XHCI host controller driver.
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Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>
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Copyright (c) Microsoft Corporation.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -82,14 +83,6 @@ typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;
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#define INT_INTER 3
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#define INT_INTER_ASYNC 4
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//
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// Iterate through the double linked list. This is delete-safe.
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// Don't touch NextEntry
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//
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#define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \
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for (Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\
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Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)
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#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
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#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0xFFFFFFFF))
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@ -3,6 +3,7 @@
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XHCI transfer scheduling routines.
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Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) Microsoft Corporation.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -1051,7 +1052,7 @@ IsAsyncIntTrb (
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LIST_ENTRY *Next;
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URB *CheckedUrb;
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EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
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BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
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CheckedUrb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
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if (IsTransferRingTrb (Xhc, Trb, CheckedUrb)) {
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*Urb = CheckedUrb;
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@ -1346,7 +1347,7 @@ XhciDelAsyncIntTransfer (
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Urb = NULL;
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EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
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BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
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Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
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if ((Urb->Ep.BusAddr == BusAddr) &&
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(Urb->Ep.EpAddr == EpNum) &&
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@ -1386,7 +1387,7 @@ XhciDelAllAsyncIntTransfers (
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URB *Urb;
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EFI_STATUS Status;
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EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
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BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
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Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
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//
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@ -1578,7 +1579,7 @@ XhcMonitorAsyncRequests (
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Xhc = (USB_XHCI_INSTANCE*) Context;
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EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
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BASE_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) {
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Urb = EFI_LIST_CONTAINER (Entry, URB, UrbList);
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//
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