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UefiCpuPkg/CpuPageTableLib: qualify page table accesses as volatile

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Add volatile qualifier to page table related variable to prevent
compiler from optimizing away the variables which may lead to
unexpected result.

Signed-off-by: Zhou Jianfeng <jianfeng.zhou@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Pedro Falcato <pedro.falcato@gmail.com>
Cc: Zhang Di <di.zhang@intel.com>
Cc: Tan Dun <dun.tan@intel.com>
Cc: Michael Brown <mcb30@ipxe.org>
Message-Id: <20240301025447.41170-1-jianfeng.zhou@intel.com>
Reviewed-by: Michael Brown <mcb30@ipxe.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: reconstruct commit manually, from corrupt patch email
 on-list]
This commit is contained in:
Zhou Jianfeng 2024-03-01 15:04:28 +01:00 committed by mergify[bot]
parent d159e22913
commit dcffad2491
1 changed files with 18 additions and 18 deletions
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36
UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
View File

@ -20,17 +20,17 @@
**/ **/
VOID VOID
PageTableLibSetPte4K ( PageTableLibSetPte4K (
IN OUT IA32_PTE_4K *Pte4K, IN OUT volatile IA32_PTE_4K *Pte4K,
IN UINT64 Offset, IN UINT64 Offset,
IN IA32_MAP_ATTRIBUTE *Attribute, IN IA32_MAP_ATTRIBUTE *Attribute,
IN IA32_MAP_ATTRIBUTE *Mask IN IA32_MAP_ATTRIBUTE *Mask
) )
{ {
IA32_PTE_4K LocalPte4K; IA32_PTE_4K LocalPte4K;
LocalPte4K.Uint64 = Pte4K->Uint64; LocalPte4K.Uint64 = Pte4K->Uint64;
if (Mask->Bits.PageTableBaseAddressLow || Mask->Bits.PageTableBaseAddressHigh) { if (Mask->Bits.PageTableBaseAddressLow || Mask->Bits.PageTableBaseAddressHigh) {
LocalPte4K.Uint64 = (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS (Attribute) + Offset) | (Pte4K->Uint64 & ~IA32_PE_BASE_ADDRESS_MASK_40); LocalPte4K.Uint64 = (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS (Attribute) + Offset) | (LocalPte4K.Uint64 & ~IA32_PE_BASE_ADDRESS_MASK_40);
} }
if (Mask->Bits.Present) { if (Mask->Bits.Present) {
@ -94,17 +94,17 @@ PageTableLibSetPte4K (
**/ **/
VOID VOID
PageTableLibSetPleB ( PageTableLibSetPleB (
IN OUT IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE *PleB, IN OUT volatile IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE *PleB,
IN UINT64 Offset, IN UINT64 Offset,
IN IA32_MAP_ATTRIBUTE *Attribute, IN IA32_MAP_ATTRIBUTE *Attribute,
IN IA32_MAP_ATTRIBUTE *Mask IN IA32_MAP_ATTRIBUTE *Mask
) )
{ {
IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE LocalPleB; IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE LocalPleB;
LocalPleB.Uint64 = PleB->Uint64; LocalPleB.Uint64 = PleB->Uint64;
if (Mask->Bits.PageTableBaseAddressLow || Mask->Bits.PageTableBaseAddressHigh) { if (Mask->Bits.PageTableBaseAddressLow || Mask->Bits.PageTableBaseAddressHigh) {
LocalPleB.Uint64 = (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS (Attribute) + Offset) | (PleB->Uint64 & ~IA32_PE_BASE_ADDRESS_MASK_39); LocalPleB.Uint64 = (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS (Attribute) + Offset) | (LocalPleB.Uint64 & ~IA32_PE_BASE_ADDRESS_MASK_39);
} }
LocalPleB.Bits.MustBeOne = 1; LocalPleB.Bits.MustBeOne = 1;
@ -171,11 +171,11 @@ PageTableLibSetPleB (
**/ **/
VOID VOID
PageTableLibSetPle ( PageTableLibSetPle (
IN UINTN Level, IN UINTN Level,
IN OUT IA32_PAGING_ENTRY *Ple, IN OUT volatile IA32_PAGING_ENTRY *Ple,
IN UINT64 Offset, IN UINT64 Offset,
IN IA32_MAP_ATTRIBUTE *Attribute, IN IA32_MAP_ATTRIBUTE *Attribute,
IN IA32_MAP_ATTRIBUTE *Mask IN IA32_MAP_ATTRIBUTE *Mask
) )
{ {
if (Level == 1) { if (Level == 1) {
@ -195,9 +195,9 @@ PageTableLibSetPle (
**/ **/
VOID VOID
PageTableLibSetPnle ( PageTableLibSetPnle (
IN OUT IA32_PAGE_NON_LEAF_ENTRY *Pnle, IN OUT volatile IA32_PAGE_NON_LEAF_ENTRY *Pnle,
IN IA32_MAP_ATTRIBUTE *Attribute, IN IA32_MAP_ATTRIBUTE *Attribute,
IN IA32_MAP_ATTRIBUTE *Mask IN IA32_MAP_ATTRIBUTE *Mask
) )
{ {
IA32_PAGE_NON_LEAF_ENTRY LocalPnle; IA32_PAGE_NON_LEAF_ENTRY LocalPnle;