mirror of https://github.com/acidanthera/audk.git
IntelFsp2WrapperPkg: Revert 90c5bc08
Commit message issue and reverted commit
90c5bc081d
.
Will re-submit with correct formats.
Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
This commit is contained in:
parent
90c5bc081d
commit
de1e1195b3
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@ -3,7 +3,7 @@
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register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
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notify to call FspSiliconInit API.
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Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -65,7 +65,7 @@ PeiFspMemoryInit (
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FspHobListPtr = NULL;
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FspmUpdDataPtr = NULL;
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FspmHeaderPtr = (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
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FspmHeaderPtr = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
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DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr));
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if (FspmHeaderPtr == NULL) {
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return EFI_DEVICE_ERROR;
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@ -155,20 +155,8 @@ FspmWrapperInit (
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{
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EFI_STATUS Status;
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Status = EFI_SUCCESS;
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if (FixedPcdGet8 (PcdFspModeSelection) == 1) {
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Status = PeiFspMemoryInit ();
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ASSERT_EFI_ERROR (Status);
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} else {
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PeiServicesInstallFvInfoPpi (
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NULL,
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(VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress),
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(UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspmBaseAddress))->FvLength,
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NULL,
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NULL
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);
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}
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Status = PeiFspMemoryInit ();
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ASSERT_EFI_ERROR (Status);
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return Status;
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}
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@ -6,7 +6,7 @@
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# register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
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# notify to call FspSiliconInit API.
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#
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# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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@ -61,7 +61,6 @@
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[Pcd]
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## CONSUMES
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES
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[Sources]
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FspmWrapperPeim.c
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@ -3,7 +3,7 @@
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register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
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notify to call FspSiliconInit API.
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Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -349,17 +349,7 @@ FspsWrapperPeimEntryPoint (
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{
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DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n"));
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if (FixedPcdGet8 (PcdFspModeSelection) == 1) {
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FspsWrapperInit ();
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} else {
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PeiServicesInstallFvInfoPpi (
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NULL,
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(VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress),
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(UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspsBaseAddress))->FvLength,
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NULL,
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NULL
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);
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}
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FspsWrapperInit ();
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return EFI_SUCCESS;
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}
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@ -6,7 +6,7 @@
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# register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi
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# notify to call FspSiliconInit API.
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#
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# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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@ -68,7 +68,6 @@
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[Pcd]
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## CONSUMES
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES
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[Guids]
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gFspHobGuid ## CONSUMES ## HOB
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@ -71,8 +71,9 @@
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## Indicate the PEI memory size platform want to report
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gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005
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## This is the base address of FSP-T
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## This is the base address of FSP-T/M/S
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gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301
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## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>
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# If a bit is set, that means this FSP API is skipped.<BR>
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@ -92,17 +93,7 @@
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# @Prompt Skip FSP API from FSP wrapper.
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gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009
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## This PCD decides how Wrapper code utilizes FSP
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# 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API)
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# 1: API mode (FSP Wrapper will call FSP API)
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#
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A
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[PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
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#
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## These are the base address of FSP-M/S
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#
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000
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gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001
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#
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# To provide flexibility for platform to pre-allocate FSP UPD buffer
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