UefiCpuPkg CpuCommFeaturesLib: Fix ASSERT if LMCE is supported

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1829

There will be ASSERT if LMCE is supported as below.
DXE_ASSERT!: [CpuFeaturesDxe]
  XXX\UefiCpuPkg\Library\CpuCommonFeaturesLib\MachineCheck.c (342):
    ConfigData != ((void *) 0)

The code should get Config Data and FeatureControlGetConfigData
could be used.

This issue is there since the code was added at the commit below.

Revision: 3d6275c113
Date: 2017/8/4 8:46:41
UefiCpuPkg CpuCommonFeaturesLib: Enable LMCE feature.

The commits below are also related to move the code.

Revision: 0233871442
Date: 2017/9/1 10:12:38
UefiCpuPkg/Lmce.c Remove useless file.

Revision: 306a5bcc6b
Date: 2017/8/17 11:40:38
UefiCpuPkg/CpuCommonFeaturesLib: Merge machine check code to same file.

So, the code may not be tested at all on a platform
that supports LMCE.

BTW: A typo in LmceInitialize is also fixed.
The typo is introduced by the commit below.

Revision: d28daaddb3
Date: 2018/10/17 9:24:05
UefiCpuPkg/CpuCommonFeaturesLib: Register MSR base on scope Info.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Chandana Kumar <chandana.c.kumar@intel.com>
Cc: Kevin Li <kevin.y.li@intel.com>
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
This commit is contained in:
Star Zeng 2019-05-22 11:21:22 +08:00
parent 49fb605709
commit de2204a9e8
2 changed files with 2 additions and 2 deletions

View File

@ -214,7 +214,7 @@ CpuCommonFeaturesLibConstructor (
if (IsCpuFeatureSupported (CPU_FEATURE_LMCE)) {
Status = RegisterCpuFeature (
"LMCE",
NULL,
FeatureControlGetConfigData,
LmceSupport,
LmceInitialize,
CPU_FEATURE_LMCE,

View File

@ -322,7 +322,7 @@ LmceInitialize (
MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister;
//
// The scope of FastStrings bit in the MSR_IA32_MISC_ENABLE is core for below processor type, only program
// The scope of LcmeOn bit in the MSR_IA32_MISC_ENABLE is core for below processor type, only program
// MSR_IA32_MISC_ENABLE for thread 0 in each core.
//
if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||