mirror of https://github.com/acidanthera/audk.git
1.Restore BSP IDT table to AP when AP wakeup.
2.Restore Virtual wire mode on AP when AP wakeup. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10575 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
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4ac4deb706
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@ -1,7 +1,7 @@
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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; Include file for IA32 MpFuncs.asm
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; Include file for IA32 MpFuncs.asm
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;
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;
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; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; which accompanies this distribution. The full text of the license may be found at
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@ -20,6 +20,7 @@ StackStart equ LockLocation + 4h
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StackSize equ LockLocation + 8h
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StackSize equ LockLocation + 8h
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RendezvousProc equ LockLocation + 0Ch
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RendezvousProc equ LockLocation + 0Ch
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GdtrProfile equ LockLocation + 10h
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GdtrProfile equ LockLocation + 10h
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BufferStart equ LockLocation + 18h
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IdtrProfile equ LockLocation + 16h
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BufferStart equ LockLocation + 1Ch
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;-------------------------------------------------------------------------------
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;-------------------------------------------------------------------------------
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@ -1,7 +1,7 @@
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# IA32 assembly file for AP startup vector.
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# IA32 assembly file for AP startup vector.
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#
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#
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# Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# which accompanies this distribution. The full text of the license may be found at
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@ -58,6 +58,11 @@ RendezvousFunnelProcStart:
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.byte 0x66 # db 66h
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.byte 0x66 # db 66h
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.byte 0x2E,0xF,0x1,0x14 # lgdt fword ptr cs:[si]
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.byte 0x2E,0xF,0x1,0x14 # lgdt fword ptr cs:[si]
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.byte 0xBE
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.word IdtrProfile
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.byte 0x66 # db 66h
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.byte 0x2E,0xF,0x1,0x1C # lidt fword ptr cs:[si]
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.byte 0x33,0xC0 # xor ax, ax
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.byte 0x33,0xC0 # xor ax, ax
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.byte 0x8E,0xD8 # mov ds, ax
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.byte 0x8E,0xD8 # mov ds, ax
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.byte 0xF,0x20,0xC0 # mov eax, cr0 ; Get control register 0
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.byte 0xF,0x20,0xC0 # mov eax, cr0 ; Get control register 0
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@ -1,7 +1,7 @@
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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; IA32 assembly file for AP startup vector.
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; IA32 assembly file for AP startup vector.
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;
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;
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; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; which accompanies this distribution. The full text of the license may be found at
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@ -61,6 +61,11 @@ RendezvousFunnelProcStart::
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db 66h ; db 66h
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db 66h ; db 66h
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db 2Eh,0Fh, 01h, 14h ; lgdt fword ptr cs:[si]
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db 2Eh,0Fh, 01h, 14h ; lgdt fword ptr cs:[si]
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db 0BEh
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dw IdtrProfile ; mov si, IdtrProfile
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db 66h ; db 66h
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db 2Eh,0Fh, 01h, 1Ch ; lidt fword ptr cs:[si]
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db 33h, 0C0h ; xor ax, ax
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db 33h, 0C0h ; xor ax, ax
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db 8Eh, 0D8h ; mov ds, ax
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db 8Eh, 0D8h ; mov ds, ax
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db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Get control register 0
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db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Get control register 0
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@ -1075,6 +1075,71 @@ GetNextWaitingProcessorNumber (
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return EFI_NOT_FOUND;
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return EFI_NOT_FOUND;
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}
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}
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/**
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Programs Local APIC registers for virtual wire mode.
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This function programs Local APIC registers for virtual wire mode.
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@param Bsp Indicates whether the programmed processor is going to be BSP
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**/
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VOID
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ProgramVirtualWireMode (
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BOOLEAN Bsp
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)
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{
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UINTN ApicBase;
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UINT32 Value;
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ApicBase = (UINTN)AsmMsrBitFieldRead64 (27, 12, 35) << 12;
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//
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// Program the Spurious Vector entry
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// Set bit 8 (APIC Software Enable/Disable) to enable local APIC,
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// and set Spurious Vector as 0x0F.
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//
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MmioBitFieldWrite32 (ApicBase + APIC_REGISTER_SPURIOUS_VECTOR_OFFSET, 0, 9, 0x10F);
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//
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// Program the LINT0 vector entry as ExtInt
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// Set bits 8..10 to 7 as ExtInt Delivery Mode,
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// and clear bits for Delivery Status, Interrupt Input Pin Polarity, Remote IRR,
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// Trigger Mode, and Mask
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//
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if (!Bsp) {
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DisableInterrupts ();
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}
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Value = MmioRead32 (ApicBase + APIC_REGISTER_LINT0_VECTOR_OFFSET);
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Value = BitFieldWrite32 (Value, 8, 10, 7);
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Value = BitFieldWrite32 (Value, 12, 16, 0);
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if (!Bsp) {
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//
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// For APs, LINT0 is masked
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//
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Value = BitFieldWrite32 (Value, 16, 16, 1);
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}
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MmioWrite32 (ApicBase + APIC_REGISTER_LINT0_VECTOR_OFFSET, Value);
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//
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// Program the LINT1 vector entry as NMI
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// Set bits 8..10 to 4 as NMI Delivery Mode,
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// and clear bits for Delivery Status, Interrupt Input Pin Polarity, Remote IRR,
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// Trigger Mode.
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// For BSP clear Mask bit, and for AP set mask bit.
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//
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Value = MmioRead32 (ApicBase + APIC_REGISTER_LINT1_VECTOR_OFFSET);
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Value = BitFieldWrite32 (Value, 8, 10, 4);
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Value = BitFieldWrite32 (Value, 12, 16, 0);
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if (!Bsp) {
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//
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// For APs, LINT1 is masked
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//
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Value = BitFieldWrite32 (Value, 16, 16, 1);
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}
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MmioWrite32 (ApicBase + APIC_REGISTER_LINT1_VECTOR_OFFSET, Value);
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}
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/**
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/**
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Wrapper function for all procedures assigned to AP.
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Wrapper function for all procedures assigned to AP.
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@ -1092,6 +1157,8 @@ ApProcWrapper (
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UINTN ProcessorNumber;
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UINTN ProcessorNumber;
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CPU_DATA_BLOCK *CpuData;
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CPU_DATA_BLOCK *CpuData;
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ProgramVirtualWireMode (FALSE);
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WhoAmI (&mMpService, &ProcessorNumber);
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WhoAmI (&mMpService, &ProcessorNumber);
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CpuData = &mMPSystemData.CpuData[ProcessorNumber];
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CpuData = &mMPSystemData.CpuData[ProcessorNumber];
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{
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{
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MP_ASSEMBLY_ADDRESS_MAP AddressMap;
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MP_ASSEMBLY_ADDRESS_MAP AddressMap;
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IA32_DESCRIPTOR GdtrForBSP;
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IA32_DESCRIPTOR GdtrForBSP;
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IA32_DESCRIPTOR IdtrForBSP;
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EFI_PHYSICAL_ADDRESS GdtForAP;
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EFI_PHYSICAL_ADDRESS GdtForAP;
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EFI_PHYSICAL_ADDRESS IdtForAP;
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EFI_STATUS Status;
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EFI_STATUS Status;
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//
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//
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mExchangeInfo->StackSize = AP_STACK_SIZE;
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mExchangeInfo->StackSize = AP_STACK_SIZE;
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AsmReadGdtr (&GdtrForBSP);
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AsmReadGdtr (&GdtrForBSP);
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AsmReadIdtr (&IdtrForBSP);
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//
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//
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// Allocate memory under 4G to hold GDT for APs
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// Allocate memory under 4G to hold GDT for APs
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Status = gBS->AllocatePages (
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Status = gBS->AllocatePages (
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AllocateMaxAddress,
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AllocateMaxAddress,
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EfiBootServicesData,
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EfiBootServicesData,
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EFI_SIZE_TO_PAGES (GdtrForBSP.Limit + 1),
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EFI_SIZE_TO_PAGES ((GdtrForBSP.Limit + 1) + (IdtrForBSP.Limit + 1)),
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&GdtForAP
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&GdtForAP
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);
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);
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ASSERT_EFI_ERROR (Status);
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ASSERT_EFI_ERROR (Status);
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IdtForAP = (UINTN) GdtForAP + GdtrForBSP.Limit + 1;
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CopyMem ((VOID *) (UINTN) GdtForAP, (VOID *) GdtrForBSP.Base, GdtrForBSP.Limit + 1);
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CopyMem ((VOID *) (UINTN) GdtForAP, (VOID *) GdtrForBSP.Base, GdtrForBSP.Limit + 1);
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CopyMem ((VOID *) (UINTN) IdtForAP, (VOID *) IdtrForBSP.Base, IdtrForBSP.Limit + 1);
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mExchangeInfo->GdtrProfile.Base = (UINTN) GdtForAP;
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mExchangeInfo->GdtrProfile.Base = (UINTN) GdtForAP;
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mExchangeInfo->GdtrProfile.Limit = GdtrForBSP.Limit;
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mExchangeInfo->GdtrProfile.Limit = GdtrForBSP.Limit;
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mExchangeInfo->IdtrProfile.Base = (UINTN) IdtForAP;
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mExchangeInfo->IdtrProfile.Limit = IdtrForBSP.Limit;
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mExchangeInfo->BufferStart = (UINT32) mStartupVector;
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mExchangeInfo->BufferStart = (UINT32) mStartupVector;
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mExchangeInfo->Cr3 = (UINT32) (AsmReadCr3 ());
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mExchangeInfo->Cr3 = (UINT32) (AsmReadCr3 ());
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/** @file
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/** @file
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Include file for PI MP Services Protocol Thunk.
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Include file for PI MP Services Protocol Thunk.
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Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -46,8 +46,11 @@ Module Name:
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//
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//
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// Local APIC register definition for IPI.
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// Local APIC register definition for IPI.
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//
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//
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#define APIC_REGISTER_SPURIOUS_VECTOR_OFFSET 0xF0
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#define APIC_REGISTER_ICR_LOW_OFFSET 0x300
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#define APIC_REGISTER_ICR_LOW_OFFSET 0x300
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#define APIC_REGISTER_ICR_HIGH_OFFSET 0x310
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#define APIC_REGISTER_ICR_HIGH_OFFSET 0x310
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#define APIC_REGISTER_LINT0_VECTOR_OFFSET 0x350
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#define APIC_REGISTER_LINT1_VECTOR_OFFSET 0x360
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typedef struct {
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typedef struct {
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UINTN Lock;
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UINTN Lock;
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UINTN StackSize;
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UINTN StackSize;
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VOID *ApFunction;
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VOID *ApFunction;
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IA32_DESCRIPTOR GdtrProfile;
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IA32_DESCRIPTOR GdtrProfile;
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IA32_DESCRIPTOR IdtrProfile;
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UINT32 BufferStart;
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UINT32 BufferStart;
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UINT32 Cr3;
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UINT32 Cr3;
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} MP_CPU_EXCHANGE_INFO;
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} MP_CPU_EXCHANGE_INFO;
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@ -1,7 +1,7 @@
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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; Include file for X64 MpFuncs.asm
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; Include file for X64 MpFuncs.asm
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;
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;
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; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; which accompanies this distribution. The full text of the license may be found at
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@ -20,7 +20,8 @@ StackStartAddressLocation equ LockLocation + 08h
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StackSizeLocation equ LockLocation + 10h
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StackSizeLocation equ LockLocation + 10h
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CProcedureLocation equ LockLocation + 18h
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CProcedureLocation equ LockLocation + 18h
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GdtrLocation equ LockLocation + 20h
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GdtrLocation equ LockLocation + 20h
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BufferStartLocation equ LockLocation + 2Ch
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IdtrLocation equ LockLocation + 2Ah
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Cr3OffsetLocation equ LockLocation + 30h
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BufferStartLocation equ LockLocation + 34h
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Cr3OffsetLocation equ LockLocation + 38h
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;-------------------------------------------------------------------------------
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;-------------------------------------------------------------------------------
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@ -1,7 +1,7 @@
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# X64 assembly file for AP startup vector.
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# X64 assembly file for AP startup vector.
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#
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#
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# Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
|
# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# which accompanies this distribution. The full text of the license may be found at
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@ -66,6 +66,11 @@ RendezvousFunnelProcStart:
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.byte 0x66 # db 66h
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.byte 0x66 # db 66h
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.byte 0x2E,0xF,0x1,0x14 # lgdt fword ptr cs:[si]
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.byte 0x2E,0xF,0x1,0x14 # lgdt fword ptr cs:[si]
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.byte 0xBE
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.word IdtrLocation
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.byte 0x66 # db 66h
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.byte 0x2E,0xF,0x1,0x1C # lidt fword ptr cs:[si]
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.byte 0x33,0xC0 # xor ax, ax
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.byte 0x33,0xC0 # xor ax, ax
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.byte 0x8E,0xD8 # mov ds, ax
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.byte 0x8E,0xD8 # mov ds, ax
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@ -1,7 +1,7 @@
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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; X64 assembly file for AP startup vector.
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; X64 assembly file for AP startup vector.
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;
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;
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; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
|
||||||
; This program and the accompanying materials
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; This program and the accompanying materials
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||||||
; are licensed and made available under the terms and conditions of the BSD License
|
; are licensed and made available under the terms and conditions of the BSD License
|
||||||
; which accompanies this distribution. The full text of the license may be found at
|
; which accompanies this distribution. The full text of the license may be found at
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@ -54,6 +54,11 @@ RendezvousFunnelProcStart::
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db 66h ; db 66h
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db 66h ; db 66h
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db 2Eh, 0Fh, 01h, 14h ; lgdt fword ptr cs:[si]
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db 2Eh, 0Fh, 01h, 14h ; lgdt fword ptr cs:[si]
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db 0BEh
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dw IdtrLocation ; mov si, IdtrProfile
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db 66h ; db 66h
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db 2Eh, 0Fh, 01h, 1Ch ; lidt fword ptr cs:[si]
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db 33h, 0C0h ; xor ax, ax
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db 33h, 0C0h ; xor ax, ax
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db 8Eh, 0D8h ; mov ds, ax
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db 8Eh, 0D8h ; mov ds, ax
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