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1.Restore BSP IDT table to AP when AP wakeup. 

2.Restore Virtual wire mode on AP when AP wakeup.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10575 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
vanjeff 2010-06-11 08:24:01 +00:00
parent 4ac4deb706
commit de243ee444
8 changed files with 153 additions and 52 deletions
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5
EdkCompatibilityPkg/Compatibility/MpServicesOnFrameworkMpServicesThunk/IA32/AsmInclude.inc
View File

@ -1,7 +1,7 @@
;------------------------------------------------------------------------------
; Include file for IA32 MpFuncs.asm
;
; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@ -20,6 +20,7 @@ StackStart equ LockLocation + 4h
StackSize equ LockLocation + 8h
RendezvousProc equ LockLocation + 0Ch
GdtrProfile equ LockLocation + 10h
BufferStart equ LockLocation + 18h
IdtrProfile equ LockLocation + 16h
BufferStart equ LockLocation + 1Ch
;-------------------------------------------------------------------------------

7
EdkCompatibilityPkg/Compatibility/MpServicesOnFrameworkMpServicesThunk/IA32/MpFuncs.S
View File

@ -1,7 +1,7 @@
#------------------------------------------------------------------------------
# IA32 assembly file for AP startup vector.
#
# Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -58,6 +58,11 @@ RendezvousFunnelProcStart:
.byte 0x66 # db 66h
.byte 0x2E,0xF,0x1,0x14 # lgdt fword ptr cs:[si]
.byte 0xBE
.word IdtrProfile
.byte 0x66 # db 66h
.byte 0x2E,0xF,0x1,0x1C # lidt fword ptr cs:[si]
.byte 0x33,0xC0 # xor ax, ax
.byte 0x8E,0xD8 # mov ds, ax
.byte 0xF,0x20,0xC0 # mov eax, cr0 ; Get control register 0

7
EdkCompatibilityPkg/Compatibility/MpServicesOnFrameworkMpServicesThunk/IA32/MpFuncs.asm
View File

@ -1,7 +1,7 @@
;------------------------------------------------------------------------------
; IA32 assembly file for AP startup vector.
;
; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@ -61,6 +61,11 @@ RendezvousFunnelProcStart::
db 66h ; db 66h
db 2Eh,0Fh, 01h, 14h ; lgdt fword ptr cs:[si]
db 0BEh
dw IdtrProfile ; mov si, IdtrProfile
db 66h ; db 66h
db 2Eh,0Fh, 01h, 1Ch ; lidt fword ptr cs:[si]
db 33h, 0C0h ; xor ax, ax
db 8Eh, 0D8h ; mov ds, ax
db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Get control register 0

77
EdkCompatibilityPkg/Compatibility/MpServicesOnFrameworkMpServicesThunk/MpServicesOnFrameworkMpServicesThunk.c
View File

@ -1075,6 +1075,71 @@ GetNextWaitingProcessorNumber (
return EFI_NOT_FOUND;
}
/**
Programs Local APIC registers for virtual wire mode.
This function programs Local APIC registers for virtual wire mode.
@param Bsp Indicates whether the programmed processor is going to be BSP
**/
VOID
ProgramVirtualWireMode (
BOOLEAN Bsp
)
{
UINTN ApicBase;
UINT32 Value;
ApicBase = (UINTN)AsmMsrBitFieldRead64 (27, 12, 35) << 12;
//
// Program the Spurious Vector entry
// Set bit 8 (APIC Software Enable/Disable) to enable local APIC,
// and set Spurious Vector as 0x0F.
//
MmioBitFieldWrite32 (ApicBase + APIC_REGISTER_SPURIOUS_VECTOR_OFFSET, 0, 9, 0x10F);
//
// Program the LINT0 vector entry as ExtInt
// Set bits 8..10 to 7 as ExtInt Delivery Mode,
// and clear bits for Delivery Status, Interrupt Input Pin Polarity, Remote IRR,
// Trigger Mode, and Mask
//
if (!Bsp) {
DisableInterrupts ();
}
Value = MmioRead32 (ApicBase + APIC_REGISTER_LINT0_VECTOR_OFFSET);
Value = BitFieldWrite32 (Value, 8, 10, 7);
Value = BitFieldWrite32 (Value, 12, 16, 0);
if (!Bsp) {
//
// For APs, LINT0 is masked
//
Value = BitFieldWrite32 (Value, 16, 16, 1);
}
MmioWrite32 (ApicBase + APIC_REGISTER_LINT0_VECTOR_OFFSET, Value);
//
// Program the LINT1 vector entry as NMI
// Set bits 8..10 to 4 as NMI Delivery Mode,
// and clear bits for Delivery Status, Interrupt Input Pin Polarity, Remote IRR,
// Trigger Mode.
// For BSP clear Mask bit, and for AP set mask bit.
//
Value = MmioRead32 (ApicBase + APIC_REGISTER_LINT1_VECTOR_OFFSET);
Value = BitFieldWrite32 (Value, 8, 10, 4);
Value = BitFieldWrite32 (Value, 12, 16, 0);
if (!Bsp) {
//
// For APs, LINT1 is masked
//
Value = BitFieldWrite32 (Value, 16, 16, 1);
}
MmioWrite32 (ApicBase + APIC_REGISTER_LINT1_VECTOR_OFFSET, Value);
}
/**
Wrapper function for all procedures assigned to AP.
@ -1092,6 +1157,8 @@ ApProcWrapper (
UINTN ProcessorNumber;
CPU_DATA_BLOCK *CpuData;
ProgramVirtualWireMode (FALSE);
WhoAmI (&mMpService, &ProcessorNumber);
CpuData = &mMPSystemData.CpuData[ProcessorNumber];
@ -1444,7 +1511,9 @@ PrepareAPStartupVector (
{
MP_ASSEMBLY_ADDRESS_MAP AddressMap;
IA32_DESCRIPTOR GdtrForBSP;
IA32_DESCRIPTOR IdtrForBSP;
EFI_PHYSICAL_ADDRESS GdtForAP;
EFI_PHYSICAL_ADDRESS IdtForAP;
EFI_STATUS Status;
//
@ -1483,6 +1552,7 @@ PrepareAPStartupVector (
mExchangeInfo->StackSize = AP_STACK_SIZE;
AsmReadGdtr (&GdtrForBSP);
AsmReadIdtr (&IdtrForBSP);
//
// Allocate memory under 4G to hold GDT for APs
@ -1491,15 +1561,20 @@ PrepareAPStartupVector (
Status = gBS->AllocatePages (
AllocateMaxAddress,
EfiBootServicesData,
EFI_SIZE_TO_PAGES (GdtrForBSP.Limit + 1),
EFI_SIZE_TO_PAGES ((GdtrForBSP.Limit + 1) + (IdtrForBSP.Limit + 1)),
&GdtForAP
);
ASSERT_EFI_ERROR (Status);
IdtForAP = (UINTN) GdtForAP + GdtrForBSP.Limit + 1;
CopyMem ((VOID *) (UINTN) GdtForAP, (VOID *) GdtrForBSP.Base, GdtrForBSP.Limit + 1);
CopyMem ((VOID *) (UINTN) IdtForAP, (VOID *) IdtrForBSP.Base, IdtrForBSP.Limit + 1);
mExchangeInfo->GdtrProfile.Base = (UINTN) GdtForAP;
mExchangeInfo->GdtrProfile.Limit = GdtrForBSP.Limit;
mExchangeInfo->IdtrProfile.Base = (UINTN) IdtForAP;
mExchangeInfo->IdtrProfile.Limit = IdtrForBSP.Limit;
mExchangeInfo->BufferStart = (UINT32) mStartupVector;
mExchangeInfo->Cr3 = (UINT32) (AsmReadCr3 ());

6
EdkCompatibilityPkg/Compatibility/MpServicesOnFrameworkMpServicesThunk/MpServicesOnFrameworkMpServicesThunk.h
View File

@ -1,7 +1,7 @@
/** @file
Include file for PI MP Services Protocol Thunk.
Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -46,8 +46,11 @@ Module Name:
//
// Local APIC register definition for IPI.
//
#define APIC_REGISTER_SPURIOUS_VECTOR_OFFSET 0xF0
#define APIC_REGISTER_ICR_LOW_OFFSET 0x300
#define APIC_REGISTER_ICR_HIGH_OFFSET 0x310
#define APIC_REGISTER_LINT0_VECTOR_OFFSET 0x350
#define APIC_REGISTER_LINT1_VECTOR_OFFSET 0x360
typedef struct {
UINTN Lock;
@ -55,6 +58,7 @@ typedef struct {
UINTN StackSize;
VOID *ApFunction;
IA32_DESCRIPTOR GdtrProfile;
IA32_DESCRIPTOR IdtrProfile;
UINT32 BufferStart;
UINT32 Cr3;
} MP_CPU_EXCHANGE_INFO;

7
EdkCompatibilityPkg/Compatibility/MpServicesOnFrameworkMpServicesThunk/X64/AsmInclude.inc
View File

@ -1,7 +1,7 @@
;------------------------------------------------------------------------------
; Include file for X64 MpFuncs.asm
;
; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@ -20,7 +20,8 @@ StackStartAddressLocation equ LockLocation + 08h
StackSizeLocation equ LockLocation + 10h
CProcedureLocation equ LockLocation + 18h
GdtrLocation equ LockLocation + 20h
BufferStartLocation equ LockLocation + 2Ch
Cr3OffsetLocation equ LockLocation + 30h
IdtrLocation equ LockLocation + 2Ah
BufferStartLocation equ LockLocation + 34h
Cr3OffsetLocation equ LockLocation + 38h
;-------------------------------------------------------------------------------

7
EdkCompatibilityPkg/Compatibility/MpServicesOnFrameworkMpServicesThunk/X64/MpFuncs.S
View File

@ -1,7 +1,7 @@
#------------------------------------------------------------------------------
# X64 assembly file for AP startup vector.
#
# Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -66,6 +66,11 @@ RendezvousFunnelProcStart:
.byte 0x66 # db 66h
.byte 0x2E,0xF,0x1,0x14 # lgdt fword ptr cs:[si]
.byte 0xBE
.word IdtrLocation
.byte 0x66 # db 66h
.byte 0x2E,0xF,0x1,0x1C # lidt fword ptr cs:[si]
.byte 0x33,0xC0 # xor ax, ax
.byte 0x8E,0xD8 # mov ds, ax

7
EdkCompatibilityPkg/Compatibility/MpServicesOnFrameworkMpServicesThunk/X64/MpFuncs.asm
View File

@ -1,7 +1,7 @@
;------------------------------------------------------------------------------
; X64 assembly file for AP startup vector.
;
; Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@ -54,6 +54,11 @@ RendezvousFunnelProcStart::
db 66h ; db 66h
db 2Eh, 0Fh, 01h, 14h ; lgdt fword ptr cs:[si]
db 0BEh
dw IdtrLocation ; mov si, IdtrProfile
db 66h ; db 66h
db 2Eh, 0Fh, 01h, 1Ch ; lidt fword ptr cs:[si]
db 33h, 0C0h ; xor ax, ax
db 8Eh, 0D8h ; mov ds, ax