MdePkg/BaseCpuLib: Added ARM Aarch64 architecture support

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14516 6f19259b-4bc3-4df7-8a09-765794883524

MdePkg/Library/BaseCpuLib/AArch64/CpuFlushTlb.S

@@ -0,0 +1,38 @@
+#------------------------------------------------------------------------------
+#
+# CpuFlushTlb() for ARM
+#
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution.  The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+.text
+.p2align 2
+ASM_GLOBAL ASM_PFX(CpuFlushTlb)
+
+#/**
+#  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+#
+#  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+#
+#**/
+#VOID
+#EFIAPI
+#CpuFlushTlb (
+#  VOID
+#  )#
+#
+ASM_PFX(CpuFlushTlb):
+  tlbi  vmalle1                 // Invalidate Inst TLB and Data TLB
+  dsb   sy
+  isb
+  ret

MdePkg/Library/BaseCpuLib/AArch64/CpuSleep.S

@@ -0,0 +1,39 @@
+#------------------------------------------------------------------------------
+#
+# CpuSleep() for AArch64
+#
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Portions copyright (c) 2011 - 2013, ARM LTD. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution.  The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+.text
+.align 3
+ASM_GLOBAL ASM_PFX(CpuSleep)
+
+#/**
+#  Places the CPU in a sleep state until an interrupt is received.
+#
+#  Places the CPU in a sleep state until an interrupt is received. If interrupts
+#  are disabled prior to calling this function, then the CPU will be placed in a
+#  sleep state indefinitely.
+#
+#**/
+#VOID
+#EFIAPI
+#CpuSleep (
+#  VOID
+#  );
+#
+
+ASM_PFX(CpuSleep):
+    wfi
+    ret

MdePkg/Library/BaseCpuLib/BaseCpuLib.inf

@@ -6,6 +6,7 @@
 #
 #  Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+#  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD License
@@ -27,7 +28,7 @@
 
 
 #
-#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC ARM
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC ARM AARCH64
 #
 
 [Sources.IA32]
@@ -60,6 +61,10 @@
   Arm/CpuFlushTlb.S   | GCC
   Arm/CpuSleep.S      | GCC  
 
+[Sources.AARCH64]
+  AArch64/CpuFlushTlb.S | GCC
+  AArch64/CpuSleep.S    | GCC
+
 [Packages]
   MdePkg/MdePkg.dec