mirror of https://github.com/acidanthera/audk.git
OvmfPkg/PlatformInitLib: Add PlatformScanE820 and GetFirstNonAddressCB
First step replacing the PlatformScanOrAdd64BitE820Ram() function. Add a PlatformScanE820() function which loops over the e280 entries from FwCfg and calls a callback for each of them. Add a GetFirstNonAddressCB() function which will store the first free address (right after the last RAM block) in PlatformInfoHob->FirstNonAddress. This replaces calls to PlatformScanOrAdd64BitE820Ram() with non-NULL MaxAddress. Write any actions done (setting FirstNonAddress) to the firmware log with INFO loglevel. Also drop local FirstNonAddress variables and use PlatformInfoHob->FirstNonAddress instead everywhere. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
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@ -251,6 +251,84 @@ PlatformScanOrAdd64BitE820Ram (
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return EFI_SUCCESS;
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}
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typedef VOID (*E820_SCAN_CALLBACK) (
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EFI_E820_ENTRY64 *E820Entry,
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EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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);
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/**
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Store first address not used by e820 RAM entries in
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PlatformInfoHob->FirstNonAddress
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**/
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STATIC
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VOID
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PlatformGetFirstNonAddressCB (
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IN EFI_E820_ENTRY64 *E820Entry,
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IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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)
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{
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UINT64 Candidate;
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if (E820Entry->Type != EfiAcpiAddressRangeMemory) {
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return;
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}
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Candidate = E820Entry->BaseAddr + E820Entry->Length;
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if (PlatformInfoHob->FirstNonAddress < Candidate) {
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DEBUG ((DEBUG_INFO, "%a: FirstNonAddress=0x%Lx\n", __FUNCTION__, Candidate));
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PlatformInfoHob->FirstNonAddress = Candidate;
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}
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}
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/**
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Iterate over the entries in QEMU's fw_cfg E820 RAM map, call the
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passed callback for each entry.
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@param[in] Callback The callback function to be called.
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@param[in out] PlatformInfoHob PlatformInfo struct which is passed
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through to the callback.
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@retval EFI_SUCCESS The fw_cfg E820 RAM map was found and processed.
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@retval EFI_PROTOCOL_ERROR The RAM map was found, but its size wasn't a
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whole multiple of sizeof(EFI_E820_ENTRY64). No
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RAM entry was processed.
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@return Error codes from QemuFwCfgFindFile(). No RAM
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entry was processed.
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**/
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STATIC
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EFI_STATUS
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PlatformScanE820 (
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IN E820_SCAN_CALLBACK Callback,
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IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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)
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{
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EFI_STATUS Status;
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FIRMWARE_CONFIG_ITEM FwCfgItem;
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UINTN FwCfgSize;
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EFI_E820_ENTRY64 E820Entry;
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UINTN Processed;
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Status = QemuFwCfgFindFile ("etc/e820", &FwCfgItem, &FwCfgSize);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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if (FwCfgSize % sizeof E820Entry != 0) {
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return EFI_PROTOCOL_ERROR;
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}
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QemuFwCfgSelectItem (FwCfgItem);
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for (Processed = 0; Processed < FwCfgSize; Processed += sizeof E820Entry) {
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QemuFwCfgReadBytes (sizeof E820Entry, &E820Entry);
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Callback (&E820Entry, PlatformInfoHob);
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}
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return EFI_SUCCESS;
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}
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/**
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Returns PVH memmap
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@ -384,23 +462,17 @@ PlatformGetSystemMemorySizeAbove4gb (
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Return the highest address that DXE could possibly use, plus one.
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**/
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STATIC
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UINT64
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VOID
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PlatformGetFirstNonAddress (
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IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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)
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{
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UINT64 FirstNonAddress;
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UINT32 FwCfgPciMmio64Mb;
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EFI_STATUS Status;
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FIRMWARE_CONFIG_ITEM FwCfgItem;
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UINTN FwCfgSize;
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UINT64 HotPlugMemoryEnd;
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//
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// set FirstNonAddress to suppress incorrect compiler/analyzer warnings
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//
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FirstNonAddress = 0;
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//
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// If QEMU presents an E820 map, then get the highest exclusive >=4GB RAM
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// address from it. This can express an address >= 4GB+1TB.
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@ -408,9 +480,10 @@ PlatformGetFirstNonAddress (
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// Otherwise, get the flat size of the memory above 4GB from the CMOS (which
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// can only express a size smaller than 1TB), and add it to 4GB.
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//
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Status = PlatformScanOrAdd64BitE820Ram (FALSE, NULL, &FirstNonAddress);
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PlatformInfoHob->FirstNonAddress = BASE_4GB;
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Status = PlatformScanE820 (PlatformGetFirstNonAddressCB, PlatformInfoHob);
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if (EFI_ERROR (Status)) {
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FirstNonAddress = BASE_4GB + PlatformGetSystemMemorySizeAbove4gb ();
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PlatformInfoHob->FirstNonAddress = BASE_4GB + PlatformGetSystemMemorySizeAbove4gb ();
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}
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//
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@ -420,7 +493,7 @@ PlatformGetFirstNonAddress (
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//
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#ifdef MDE_CPU_IA32
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if (!FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
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return FirstNonAddress;
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return;
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}
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#endif
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@ -473,7 +546,7 @@ PlatformGetFirstNonAddress (
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// determines the highest address plus one. The memory hotplug area (see
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// below) plays no role for the firmware in this case.
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//
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return FirstNonAddress;
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return;
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}
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//
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@ -497,15 +570,15 @@ PlatformGetFirstNonAddress (
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HotPlugMemoryEnd
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));
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ASSERT (HotPlugMemoryEnd >= FirstNonAddress);
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FirstNonAddress = HotPlugMemoryEnd;
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ASSERT (HotPlugMemoryEnd >= PlatformInfoHob->FirstNonAddress);
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PlatformInfoHob->FirstNonAddress = HotPlugMemoryEnd;
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}
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//
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// SeaBIOS aligns both boundaries of the 64-bit PCI host aperture to 1GB, so
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// that the host can map it with 1GB hugepages. Follow suit.
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//
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PlatformInfoHob->PcdPciMmio64Base = ALIGN_VALUE (FirstNonAddress, (UINT64)SIZE_1GB);
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PlatformInfoHob->PcdPciMmio64Base = ALIGN_VALUE (PlatformInfoHob->FirstNonAddress, (UINT64)SIZE_1GB);
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PlatformInfoHob->PcdPciMmio64Size = ALIGN_VALUE (PlatformInfoHob->PcdPciMmio64Size, (UINT64)SIZE_1GB);
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//
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@ -519,8 +592,8 @@ PlatformGetFirstNonAddress (
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//
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// The useful address space ends with the 64-bit PCI host aperture.
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//
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FirstNonAddress = PlatformInfoHob->PcdPciMmio64Base + PlatformInfoHob->PcdPciMmio64Size;
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return FirstNonAddress;
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PlatformInfoHob->FirstNonAddress = PlatformInfoHob->PcdPciMmio64Base + PlatformInfoHob->PcdPciMmio64Size;
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return;
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}
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/*
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@ -781,7 +854,6 @@ PlatformAddressWidthInitialization (
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IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
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)
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{
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UINT64 FirstNonAddress;
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UINT8 PhysMemAddressWidth;
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EFI_STATUS Status;
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@ -794,7 +866,7 @@ PlatformAddressWidthInitialization (
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// First scan host-provided hardware information to assess if the address
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// space is already known. If so, guest must use those values.
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//
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Status = PlatformScanHostProvided64BitPciMmioEnd (&FirstNonAddress);
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Status = PlatformScanHostProvided64BitPciMmioEnd (&PlatformInfoHob->FirstNonAddress);
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if (EFI_ERROR (Status)) {
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//
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@ -806,13 +878,12 @@ PlatformAddressWidthInitialization (
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// The DXL IPL keys off of the physical address bits advertized in the CPU
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// HOB. To conserve memory, we calculate the minimum address width here.
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//
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FirstNonAddress = PlatformGetFirstNonAddress (PlatformInfoHob);
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PlatformGetFirstNonAddress (PlatformInfoHob);
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}
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PlatformAddressWidthFromCpuid (PlatformInfoHob, TRUE);
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if (PlatformInfoHob->PhysMemAddressWidth != 0) {
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// physical address width is known
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PlatformInfoHob->FirstNonAddress = FirstNonAddress;
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PlatformDynamicMmioWindow (PlatformInfoHob);
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return;
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}
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@ -823,13 +894,13 @@ PlatformAddressWidthInitialization (
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// -> try be conservstibe to stay below the guaranteed minimum of
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// 36 phys bits (aka 64 GB).
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//
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PhysMemAddressWidth = (UINT8)HighBitSet64 (FirstNonAddress);
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PhysMemAddressWidth = (UINT8)HighBitSet64 (PlatformInfoHob->FirstNonAddress);
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//
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// If FirstNonAddress is not an integral power of two, then we need an
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// additional bit.
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//
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if ((FirstNonAddress & (FirstNonAddress - 1)) != 0) {
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if ((PlatformInfoHob->FirstNonAddress & (PlatformInfoHob->FirstNonAddress - 1)) != 0) {
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++PhysMemAddressWidth;
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}
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@ -857,7 +928,6 @@ PlatformAddressWidthInitialization (
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ASSERT (PhysMemAddressWidth <= 48);
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#endif
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PlatformInfoHob->FirstNonAddress = FirstNonAddress;
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PlatformInfoHob->PhysMemAddressWidth = PhysMemAddressWidth;
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}
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