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Clean ISA_IO/ISA_IO_16 and VGA_IO/VGA_IO_16 attribute usage in PCI bus driver/PCI host bridge drivers/LPC/VGA device drivers. 

1. Fix the incorrect definition of EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 (does not conform to the UEFI spec) in PciIo.h.
2. Add missing definitions of ISA and VGA IO attributes in PCI Root Bridge IO protocol.
3. Improve the algorithm in the PCI bus driver to get PCI platform policy from PCI Platform Protocol and PCI Override Protocol.
4. Update the PCI bus driver to use the PCI platform policy to determine the supported attributes that are returned by the EFI_PCI_IO_PROTOCOL.Attributes() function. This is required by the PI spec.
5. Add a backward compatibility workaround for PCI VGA drivers in Option ROM, which typically sets VGA_IO without checking supported attributes.
6. Update the PCI host bridge driver in PcAtChipsetPkg to report VGA_IO_16 and ISA_IO_16 instead of VGA_IO/ISA_IO attributes. Modern chipsets don’t have hardware capability to control 10-bit or 16-bit decoding for ISA/VGA aliases.
7. Update LPC/VGA device drivers to check supported attributes of VGA_IO/VGA_IO_16 or ISA_IO/ISA_IO_16.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11204 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
rsun3 2010-12-28 10:10:10 +00:00
parent e25fb2c06c
commit e0ee9d9314
10 changed files with 171 additions and 179 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
View File

@ -309,8 +309,8 @@ extern UINT64 gAllOne;
extern UINT64 gAllZero; extern UINT64 gAllZero;
extern EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol; extern EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
extern EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol; extern EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol;
extern BOOLEAN mReserveIsaAliases;
extern BOOLEAN mReserveVgaAliases;
/** /**
Macro that checks whether device is a GFX device. Macro that checks whether device is a GFX device.

18
MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
View File

@ -910,9 +910,10 @@ PciSetDeviceAttribute (
EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM | EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM |
EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE; EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE;
if ((Attributes & EFI_PCI_IO_ATTRIBUTE_IO) != 0) { if (IS_PCI_LPC (&PciIoDevice->Pci)) {
Attributes |= EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO; Attributes |= EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO;
Attributes |= EFI_PCI_IO_ATTRIBUTE_ISA_IO; Attributes |= (mReserveIsaAliases ? EFI_PCI_IO_ATTRIBUTE_ISA_IO : \
EFI_PCI_IO_ATTRIBUTE_ISA_IO_16);
} }
if (IS_PCI_BRIDGE (&PciIoDevice->Pci) || IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) { if (IS_PCI_BRIDGE (&PciIoDevice->Pci) || IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
@ -921,6 +922,14 @@ PciSetDeviceAttribute (
// //
Attributes |= EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO; Attributes |= EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO;
Attributes |= EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO; Attributes |= EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO;
if (mReserveVgaAliases) {
Attributes &= ~(UINT64)(EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 | \
EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16);
} else {
Attributes &= ~(UINT64)(EFI_PCI_IO_ATTRIBUTE_VGA_IO | \
EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO);
}
} else { } else {
if (IS_PCI_IDE (&PciIoDevice->Pci)) { if (IS_PCI_IDE (&PciIoDevice->Pci)) {
@ -930,7 +939,8 @@ PciSetDeviceAttribute (
if (IS_PCI_VGA (&PciIoDevice->Pci)) { if (IS_PCI_VGA (&PciIoDevice->Pci)) {
Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY; Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY;
Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_IO; Attributes |= (mReserveVgaAliases ? EFI_PCI_IO_ATTRIBUTE_VGA_IO : \
EFI_PCI_IO_ATTRIBUTE_VGA_IO_16);
} }
} }

46
MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
View File

@ -1529,6 +1529,38 @@ PciIoAttributes (
); );
} }
//
// Check VGA and VGA16, they can not be set at the same time
//
if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0 &&
(Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0) ||
((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0 &&
(Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ||
((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&
(Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0) ||
((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&
(Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ) {
return EFI_UNSUPPORTED;
}
//
// workaround for PCI drivers which always set ISA_IO or VGA_IO attribute without detecting support of
// ISA_IO/ISA_IO_16 or VGA_IO/VGA_IO_16 to maintain backward-compatibility.
//
if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0) &&
((PciIoDevice->Supports & (EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) \
== EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) {
Attributes &= ~(UINT64)EFI_PCI_IO_ATTRIBUTE_VGA_IO;
Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_IO_16;
}
if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0) &&
((PciIoDevice->Supports & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) \
== EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) {
Attributes &= ~(UINT64)EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO;
Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16;
}
// //
// If no attributes can be supported, then return. // If no attributes can be supported, then return.
// Otherwise, set the attributes that it can support. // Otherwise, set the attributes that it can support.
@ -1549,20 +1581,6 @@ PciIoAttributes (
Command = 0; Command = 0;
BridgeControl = 0; BridgeControl = 0;
//
// Check VGA and VGA16, they can not be set at the same time
//
if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0 &&
(Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0) ||
((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0 &&
(Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ||
((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&
(Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0) ||
((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&
(Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ) {
return EFI_UNSUPPORTED;
}
// //
// For PPB & P2C, set relevant attribute bits // For PPB & P2C, set relevant attribute bits
// //

66
MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
View File

@ -14,6 +14,13 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include "PciBus.h" #include "PciBus.h"
//
// The default policy for the PCI bus driver is NOT to reserve I/O ranges for both ISA aliases and VGA aliases.
//
BOOLEAN mReserveIsaAliases = FALSE;
BOOLEAN mReserveVgaAliases = FALSE;
BOOLEAN mPolicyDetermined = FALSE;
/** /**
The function is used to skip VGA range. The function is used to skip VGA range.
@ -188,46 +195,37 @@ CalculateApertureIo16 (
LIST_ENTRY *CurrentLink; LIST_ENTRY *CurrentLink;
PCI_RESOURCE_NODE *Node; PCI_RESOURCE_NODE *Node;
UINT64 Offset; UINT64 Offset;
BOOLEAN IsaEnable;
BOOLEAN VGAEnable;
EFI_PCI_PLATFORM_POLICY PciPolicy; EFI_PCI_PLATFORM_POLICY PciPolicy;
// if (!mPolicyDetermined) {
// Always assume there is ISA device and VGA device on the platform //
// will be customized later // Check PciPlatform policy
// //
IsaEnable = FALSE; Status = EFI_NOT_FOUND;
VGAEnable = FALSE; PciPolicy = 0;
if (gPciPlatformProtocol != NULL) {
Status = gPciPlatformProtocol->GetPlatformPolicy (
gPciPlatformProtocol,
&PciPolicy
);
}
if (EFI_ERROR (Status) && gPciOverrideProtocol != NULL) {
Status = gPciOverrideProtocol->GetPlatformPolicy (
gPciOverrideProtocol,
&PciPolicy
);
}
//
// Check PciPlatform policy
//
if (gPciPlatformProtocol != NULL) {
Status = gPciPlatformProtocol->GetPlatformPolicy (
gPciPlatformProtocol,
&PciPolicy
);
if (!EFI_ERROR (Status)) { if (!EFI_ERROR (Status)) {
if ((PciPolicy & EFI_RESERVE_ISA_IO_ALIAS) != 0) { if ((PciPolicy & EFI_RESERVE_ISA_IO_ALIAS) != 0) {
IsaEnable = TRUE; mReserveIsaAliases = TRUE;
} }
if ((PciPolicy & EFI_RESERVE_VGA_IO_ALIAS) != 0) { if ((PciPolicy & EFI_RESERVE_VGA_IO_ALIAS) != 0) {
VGAEnable = TRUE; mReserveVgaAliases = TRUE;
}
}
} else if (gPciOverrideProtocol != NULL) {
Status = gPciOverrideProtocol->GetPlatformPolicy (
gPciOverrideProtocol,
&PciPolicy
);
if (!EFI_ERROR (Status)) {
if ((PciPolicy & EFI_RESERVE_ISA_IO_ALIAS) != 0) {
IsaEnable = TRUE;
}
if ((PciPolicy & EFI_RESERVE_VGA_IO_ALIAS) != 0) {
VGAEnable = TRUE;
} }
} }
mPolicyDetermined = TRUE;
} }
Aperture = 0; Aperture = 0;
@ -261,13 +259,13 @@ CalculateApertureIo16 (
// If both of them are enabled, then the IO resource would // If both of them are enabled, then the IO resource would
// become too limited to meet the requirement of most of devices. // become too limited to meet the requirement of most of devices.
// //
if (IsaEnable || VGAEnable) { if (mReserveIsaAliases || mReserveVgaAliases) {
if (!IS_PCI_BRIDGE (&(Node->PciDev->Pci)) && !IS_CARDBUS_BRIDGE (&(Node->PciDev->Pci))) { if (!IS_PCI_BRIDGE (&(Node->PciDev->Pci)) && !IS_CARDBUS_BRIDGE (&(Node->PciDev->Pci))) {
// //
// Check if there is need to support ISA/VGA decoding // Check if there is need to support ISA/VGA decoding
// If so, we need to avoid isa/vga aliasing range // If so, we need to avoid isa/vga aliasing range
// //
if (IsaEnable) { if (mReserveIsaAliases) {
SkipIsaAliasAperture ( SkipIsaAliasAperture (
&Aperture, &Aperture,
Node->Length Node->Length
@ -276,7 +274,7 @@ CalculateApertureIo16 (
if (Offset != 0) { if (Offset != 0) {
Aperture = Aperture + (Node->Alignment + 1) - Offset; Aperture = Aperture + (Node->Alignment + 1) - Offset;
} }
} else if (VGAEnable) { } else if (mReserveVgaAliases) {
SkipVGAAperture ( SkipVGAAperture (
&Aperture, &Aperture,
Node->Length Node->Length

4
MdePkg/Include/Protocol/PciIo.h
View File

@ -2,7 +2,7 @@
EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration, EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration,
and DMA interfaces that a driver uses to access its PCI controller. and DMA interfaces that a driver uses to access its PCI controller.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR> Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -70,7 +70,7 @@ typedef enum {
#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 ///< Clear for PCI controllers that can not genrate a DAC #define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 ///< Clear for PCI controllers that can not genrate a DAC
#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode) #define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode) #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x30000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode) #define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x40000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
#define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER) #define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
#define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO) #define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)

5
MdePkg/Include/Protocol/PciRootBridgeIo.h
View File

@ -5,7 +5,7 @@
and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform
defferent types of bus mastering DMA. defferent types of bus mastering DMA.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR> Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -97,6 +97,9 @@ typedef enum {
#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800 #define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800
#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000 #define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000
#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 #define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
#define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000
#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000
#define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000
#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE) #define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)

32
OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c
View File

@ -11,7 +11,7 @@
documentation on UGA for details on how to write a UGA driver that is able documentation on UGA for details on how to write a UGA driver that is able
to function both in the EFI pre-boot environment and from the OS runtime. to function both in the EFI pre-boot environment and from the OS runtime.
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR> Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -233,6 +233,7 @@ CirrusLogic5430ControllerDriverStart (
BOOLEAN PciAttributesSaved; BOOLEAN PciAttributesSaved;
EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath; EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
ACPI_ADR_DEVICE_PATH AcpiDeviceNode; ACPI_ADR_DEVICE_PATH AcpiDeviceNode;
UINT64 Supports;
PciAttributesSaved = FALSE; PciAttributesSaved = FALSE;
// //
@ -265,6 +266,25 @@ CirrusLogic5430ControllerDriverStart (
goto Error; goto Error;
} }
//
// Get supported PCI attributes
//
Status = Private->PciIo->Attributes (
Private->PciIo,
EfiPciIoAttributeOperationSupported,
0,
&Supports
);
if (EFI_ERROR (Status)) {
goto Error;
}
Supports &= (EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16);
if (Supports == 0 || Supports == (EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) {
Status = EFI_UNSUPPORTED;
goto Error;
}
// //
// Save original PCI attributes // Save original PCI attributes
// //
@ -281,11 +301,11 @@ CirrusLogic5430ControllerDriverStart (
PciAttributesSaved = TRUE; PciAttributesSaved = TRUE;
Status = Private->PciIo->Attributes ( Status = Private->PciIo->Attributes (
Private->PciIo, Private->PciIo,
EfiPciIoAttributeOperationEnable, EfiPciIoAttributeOperationEnable,
EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO, EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | Supports,
NULL NULL
); );
if (EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {
goto Error; goto Error;
} }

50
PcAtChipsetPkg/IsaAcpiDxe/PcatIsaAcpi.c
View File

@ -171,7 +171,11 @@ PcatIsaAcpiDriverBindingStart (
EFI_STATUS Status; EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo; EFI_PCI_IO_PROTOCOL *PciIo;
PCAT_ISA_ACPI_DEV *PcatIsaAcpiDev; PCAT_ISA_ACPI_DEV *PcatIsaAcpiDev;
UINT64 Supports;
BOOLEAN Enabled;
Enabled = FALSE;
Supports = 0;
PcatIsaAcpiDev = NULL; PcatIsaAcpiDev = NULL;
// //
// Open the PCI I/O Protocol Interface // Open the PCI I/O Protocol Interface
@ -189,10 +193,30 @@ PcatIsaAcpiDriverBindingStart (
goto Done; goto Done;
} }
//
// Get supported PCI attributes
//
Status = PciIo->Attributes (
PciIo,
EfiPciIoAttributeOperationSupported,
0,
&Supports
);
if (EFI_ERROR (Status)) {
goto Done;
}
Supports &= (EFI_PCI_IO_ATTRIBUTE_ISA_IO | EFI_PCI_IO_ATTRIBUTE_ISA_IO_16);
if (Supports == 0 || Supports == (EFI_PCI_IO_ATTRIBUTE_ISA_IO | EFI_PCI_IO_ATTRIBUTE_ISA_IO_16)) {
Status = EFI_UNSUPPORTED;
goto Done;
}
Enabled = TRUE;
Status = PciIo->Attributes ( Status = PciIo->Attributes (
PciIo, PciIo,
EfiPciIoAttributeOperationEnable, EfiPciIoAttributeOperationEnable,
EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_ISA_IO | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO, EFI_PCI_DEVICE_ENABLE | Supports | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO,
NULL NULL
); );
if (EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {
@ -242,11 +266,11 @@ PcatIsaAcpiDriverBindingStart (
Done: Done:
if (EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {
if (PciIo != NULL) { if (PciIo != NULL && Enabled) {
PciIo->Attributes ( PciIo->Attributes (
PciIo, PciIo,
EfiPciIoAttributeOperationDisable, EfiPciIoAttributeOperationDisable,
EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_ISA_IO | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO, EFI_PCI_DEVICE_ENABLE | Supports | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO,
NULL NULL
); );
} }
@ -292,6 +316,7 @@ PcatIsaAcpiDriverBindingStop (
EFI_STATUS Status; EFI_STATUS Status;
EFI_ISA_ACPI_PROTOCOL *IsaAcpi; EFI_ISA_ACPI_PROTOCOL *IsaAcpi;
PCAT_ISA_ACPI_DEV *PcatIsaAcpiDev; PCAT_ISA_ACPI_DEV *PcatIsaAcpiDev;
UINT64 Supports;
// //
// Get the ISA ACPI Protocol Interface // Get the ISA ACPI Protocol Interface
@ -313,10 +338,25 @@ PcatIsaAcpiDriverBindingStop (
// //
PcatIsaAcpiDev = PCAT_ISA_ACPI_DEV_FROM_THIS (IsaAcpi); PcatIsaAcpiDev = PCAT_ISA_ACPI_DEV_FROM_THIS (IsaAcpi);
//
// Get supported PCI attributes
//
Status = PcatIsaAcpiDev->PciIo->Attributes (
PcatIsaAcpiDev->PciIo,
EfiPciIoAttributeOperationSupported,
0,
&Supports
);
if (EFI_ERROR (Status)) {
return Status;
}
Supports &= (EFI_PCI_IO_ATTRIBUTE_ISA_IO | EFI_PCI_IO_ATTRIBUTE_ISA_IO_16);
PcatIsaAcpiDev->PciIo->Attributes ( PcatIsaAcpiDev->PciIo->Attributes (
PcatIsaAcpiDev->PciIo, PcatIsaAcpiDev->PciIo,
EfiPciIoAttributeOperationDisable, EfiPciIoAttributeOperationDisable,
EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_ISA_IO | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO, EFI_PCI_DEVICE_ENABLE | Supports | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO,
NULL NULL
); );

118
PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c
View File

@ -1123,109 +1123,6 @@ GetProposedResources(
return EFI_INVALID_PARAMETER; return EFI_INVALID_PARAMETER;
} }
/**
Update attribute for PCI root bridge for specifc device.
@param RootBridge Point to PCI root bridge.
@param PciAddress The specific device PCI address
**/
VOID
UpdateRootBridgeAttributes (
IN PCI_ROOT_BRIDGE_INSTANCE *RootBridge,
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress
)
{
EFI_STATUS Status;
PCI_TYPE01 PciConfigurationHeader;
UINT64 Attributes;
//
// Read the PCI Configuration Header for the device
//
Status = RootBridge->Io.Pci.Read (
&RootBridge->Io,
EfiPciWidthUint16,
EFI_PCI_ADDRESS(
PciAddress.Bus,
PciAddress.Device,
PciAddress.Function,
0
),
sizeof (PciConfigurationHeader) / sizeof (UINT16),
&PciConfigurationHeader
);
if (EFI_ERROR (Status)) {
return;
}
Attributes = RootBridge->Attributes;
//
// Look for devices with the VGA Palette Snoop enabled in the COMMAND register of the PCI Config Header
//
if (PciConfigurationHeader.Hdr.Command & 0x20) {
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;
}
//
// If the device is a PCI-PCI Bridge, then look at the Subordinate Bus Number
//
if (IS_PCI_BRIDGE(&PciConfigurationHeader)) {
//
// Look at the PPB Configuration for legacy decoding attributes
//
if (PciConfigurationHeader.Bridge.BridgeControl & 0x04) {
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;
Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;
}
if (PciConfigurationHeader.Bridge.BridgeControl & 0x08) {
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;
}
} else {
//
// See if the PCI device is an IDE controller
//
if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x01 &&
PciConfigurationHeader.Hdr.ClassCode[1] == 0x01 ) {
if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x80) {
Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;
Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;
}
if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x01) {
Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;
}
if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x04) {
Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;
}
}
//
// See if the PCI device is a legacy VGA controller
//
if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x00 &&
PciConfigurationHeader.Hdr.ClassCode[1] == 0x01 ) {
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;
}
//
// See if the PCI device is a standard VGA controller
//
if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x03 &&
PciConfigurationHeader.Hdr.ClassCode[1] == 0x00 ) {
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;
}
}
RootBridge->Attributes = Attributes;
RootBridge->Supports = Attributes;
}
/** /**
Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
@ -1275,14 +1172,17 @@ PreprocessController (
while (List != &HostBridgeInstance->Head) { while (List != &HostBridgeInstance->Head) {
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List); RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
if (RootBridgeHandle == RootBridgeInstance->Handle) { if (RootBridgeHandle == RootBridgeInstance->Handle) {
UpdateRootBridgeAttributes ( break;
RootBridgeInstance,
PciAddress
);
return EFI_SUCCESS;
} }
List = List->ForwardLink; List = List->ForwardLink;
} }
if (List == &HostBridgeInstance->Head) {
return EFI_INVALID_PARAMETER;
}
return EFI_INVALID_PARAMETER; if (Phase < EfiPciBeforeChildBusEnumeration || Phase > EfiMaxPciHostBridgeEnumerationPhase) {
return EFI_INVALID_PARAMETER;
}
return EFI_SUCCESS;
} }

7
PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
View File

@ -674,8 +674,11 @@ RootBridgeConstructor (
PrivateData->RootBridgeAttrib = Attri; PrivateData->RootBridgeAttrib = Attri;
PrivateData->Attributes = 0; PrivateData->Supports = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO | \
PrivateData->Supports = 0; EFI_PCI_ATTRIBUTE_ISA_IO_16 | EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO | \
EFI_PCI_ATTRIBUTE_VGA_MEMORY | \
EFI_PCI_ATTRIBUTE_VGA_IO_16 | EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
PrivateData->Attributes = PrivateData->Supports;
Protocol->ParentHandle = HostBridgeHandle; Protocol->ParentHandle = HostBridgeHandle;