mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/MpInitLib: Produce EDKII microcode patch HOB
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2430 This commit will update the MpInitLib to: A. Collect the base address and size information after microcode patches being loaded into memory; B. Collect the detected microcode patch for each processor within system; C. Based on the collected information, produce the EDKII microcode patch HOB. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
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@ -65,13 +65,15 @@ GetCurrentMicrocodeSignature (
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It does not guarantee that the data has not been modified.
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CPU has its own mechanism to verify Microcode Binary part.
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@param[in] CpuMpData The pointer to CPU MP Data structure.
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@param[in] IsBspCallIn Indicate whether the caller is BSP or not.
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@param[in] CpuMpData The pointer to CPU MP Data structure.
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@param[in] ProcessorNumber The handle number of the processor. The range is
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from 0 to the total number of logical processors
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minus 1.
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**/
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VOID
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MicrocodeDetect (
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IN CPU_MP_DATA *CpuMpData,
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IN BOOLEAN IsBspCallIn
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IN UINTN ProcessorNumber
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)
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{
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UINT32 ExtendedTableLength;
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@ -93,6 +95,7 @@ MicrocodeDetect (
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MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;
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UINT32 ProcessorFlags;
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UINT32 ThreadId;
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BOOLEAN IsBspCallIn;
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//
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// set ProcessorFlags to suppress incorrect compiler/analyzer warnings
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@ -107,6 +110,7 @@ MicrocodeDetect (
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}
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CurrentRevision = GetCurrentMicrocodeSignature ();
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IsBspCallIn = (ProcessorNumber == (UINTN)CpuMpData->BspNumber) ? TRUE : FALSE;
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if (CurrentRevision != 0 && !IsBspCallIn) {
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//
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// Skip loading microcode if it has been loaded successfully
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@ -295,6 +299,16 @@ MicrocodeDetect (
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} while (((UINTN) MicrocodeEntryPoint < MicrocodeEnd));
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Done:
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if (LatestRevision != 0) {
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//
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// Save the detected microcode patch entry address (including the
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// microcode patch header) for each processor.
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// It will be used when building the microcode patch cache HOB.
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//
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CpuMpData->CpuData[ProcessorNumber].MicrocodeEntryAddr =
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(UINTN) MicrocodeData - sizeof (CPU_MICROCODE_HEADER);
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}
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if (LatestRevision > CurrentRevision) {
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//
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// BIOS only authenticate updates that contain a numerically larger revision
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@ -399,12 +399,16 @@ ApInitializeSync (
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)
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{
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CPU_MP_DATA *CpuMpData;
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UINTN ProcessorNumber;
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EFI_STATUS Status;
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CpuMpData = (CPU_MP_DATA *) Buffer;
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Status = GetProcessorNumber (CpuMpData, &ProcessorNumber);
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ASSERT_EFI_ERROR (Status);
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//
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// Load microcode on AP
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//
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MicrocodeDetect (CpuMpData, FALSE);
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MicrocodeDetect (CpuMpData, ProcessorNumber);
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//
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// Sync BSP's MTRR table to AP
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//
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@ -1761,7 +1765,7 @@ MpInitLibInitialize (
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//
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// Detect and apply Microcode on BSP
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//
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MicrocodeDetect (CpuMpData, TRUE);
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MicrocodeDetect (CpuMpData, CpuMpData->BspNumber);
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//
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// Store BSP's MTRR setting
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//
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@ -138,6 +138,7 @@ typedef struct {
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EFI_EVENT WaitEvent;
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UINT32 ProcessorSignature;
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UINT8 PlatformId;
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UINT64 MicrocodeEntryAddr;
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} CPU_AP_DATA;
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//
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@ -580,13 +581,15 @@ CheckAndUpdateApsStatus (
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/**
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Detect whether specified processor can find matching microcode patch and load it.
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@param[in] CpuMpData The pointer to CPU MP Data structure.
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@param[in] IsBspCallIn Indicate whether the caller is BSP or not.
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@param[in] CpuMpData The pointer to CPU MP Data structure.
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@param[in] ProcessorNumber The handle number of the processor. The range is
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from 0 to the total number of logical processors
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minus 1.
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**/
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VOID
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MicrocodeDetect (
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IN CPU_MP_DATA *CpuMpData,
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IN BOOLEAN IsBspCallIn
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IN UINTN ProcessorNumber
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);
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/**
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@ -619,5 +622,20 @@ EnableDebugAgent (
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VOID
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);
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/**
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Find the current Processor number by APIC ID.
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@param[in] CpuMpData Pointer to PEI CPU MP Data
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@param[out] ProcessorNumber Return the pocessor number found
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@retval EFI_SUCCESS ProcessorNumber is found and returned.
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@retval EFI_NOT_FOUND ProcessorNumber is not found.
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**/
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EFI_STATUS
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GetProcessorNumber (
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IN CPU_MP_DATA *CpuMpData,
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OUT UINTN *ProcessorNumber
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);
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#endif
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@ -63,3 +63,4 @@
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[Guids]
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gEdkiiS3SmmInitDoneGuid
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gEdkiiMicrocodePatchHobGuid
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@ -9,6 +9,7 @@
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#include "MpLib.h"
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#include <Library/PeiServicesLib.h>
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#include <Guid/S3SmmInitDone.h>
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#include <Guid/MicrocodePatchHob.h>
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/**
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S3 SMM Init Done notification function.
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@ -290,6 +291,59 @@ CheckAndUpdateApsStatus (
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{
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}
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/**
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Build the microcode patch HOB that contains the base address and size of the
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microcode patch stored in the memory.
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@param[in] CpuMpData Pointer to the CPU_MP_DATA structure.
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**/
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VOID
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BuildMicrocodeCacheHob (
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IN CPU_MP_DATA *CpuMpData
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)
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{
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EDKII_MICROCODE_PATCH_HOB *MicrocodeHob;
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UINTN HobDataLength;
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UINT32 Index;
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HobDataLength = sizeof (EDKII_MICROCODE_PATCH_HOB) +
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sizeof (UINT64) * CpuMpData->CpuCount;
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MicrocodeHob = AllocatePool (HobDataLength);
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if (MicrocodeHob == NULL) {
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ASSERT (FALSE);
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return;
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}
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//
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// Store the information of the memory region that holds the microcode patches.
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//
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MicrocodeHob->MicrocodePatchAddress = CpuMpData->MicrocodePatchAddress;
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MicrocodeHob->MicrocodePatchRegionSize = CpuMpData->MicrocodePatchRegionSize;
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//
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// Store the detected microcode patch for each processor as well.
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//
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MicrocodeHob->ProcessorCount = CpuMpData->CpuCount;
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for (Index = 0; Index < CpuMpData->CpuCount; Index++) {
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if (CpuMpData->CpuData[Index].MicrocodeEntryAddr != 0) {
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MicrocodeHob->ProcessorSpecificPatchOffset[Index] =
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CpuMpData->CpuData[Index].MicrocodeEntryAddr - CpuMpData->MicrocodePatchAddress;
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} else {
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MicrocodeHob->ProcessorSpecificPatchOffset[Index] = MAX_UINT64;
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}
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}
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BuildGuidDataHob (
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&gEdkiiMicrocodePatchHobGuid,
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MicrocodeHob,
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HobDataLength
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);
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return;
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}
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/**
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Initialize global data for MP support.
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@ -302,6 +356,7 @@ InitMpGlobalData (
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{
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EFI_STATUS Status;
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BuildMicrocodeCacheHob (CpuMpData);
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SaveCpuMpData (CpuMpData);
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///
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