CorebootPayloadPkg/PlatformHelperLib: Remove unreferenced function

Remove the PlatformFlashEraseWrite function which is not used within
CorebootPayloadPkg.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
This commit is contained in:
Leahy, Leroy P 2016-05-04 17:37:26 -07:00 committed by Prince Agyeman
parent ce1647fc60
commit e2d105b302
2 changed files with 1 additions and 178 deletions

View File

@ -1,7 +1,7 @@
/** @file /** @file
PlatformHelperLib function prototype definitions. PlatformHelperLib function prototype definitions.
Copyright (c) 2013 Intel Corporation. Copyright (c) 2013 - 2016 Intel Corporation.
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
@ -106,42 +106,6 @@ PlatformFlashLockPolicy (
IN CONST BOOLEAN PreBootPolicy IN CONST BOOLEAN PreBootPolicy
); );
/**
Erase and Write to platform flash.
Routine accesses one flash block at a time, each access consists
of an erase followed by a write of FLASH_BLOCK_SIZE. One or both
of DoErase & DoWrite params must be TRUE.
Limitations:-
CpuWriteAddress must be aligned to FLASH_BLOCK_SIZE.
DataSize must be a multiple of FLASH_BLOCK_SIZE.
@param Smst If != NULL then InSmm and use to locate
SpiProtocol.
@param CpuWriteAddress Address in CPU memory map of flash region.
@param Data The buffer containing the data to be written.
@param DataSize Amount of data to write.
@param DoErase Earse each block.
@param DoWrite Write to each block.
@retval EFI_SUCCESS Operation successful.
@retval EFI_NOT_READY Required resources not setup.
@retval EFI_INVALID_PARAMETER Invalid parameter.
@retval Others Unexpected error happened.
**/
EFI_STATUS
EFIAPI
PlatformFlashEraseWrite (
IN VOID *Smst,
IN UINTN CpuWriteAddress,
IN UINT8 *Data,
IN UINTN DataSize,
IN BOOLEAN DoErase,
IN BOOLEAN DoWrite
);
/** Check if System booted with recovery Boot Stage1 image. /** Check if System booted with recovery Boot Stage1 image.
@retval TRUE If system booted with recovery Boot Stage1 image. @retval TRUE If system booted with recovery Boot Stage1 image.

View File

@ -325,147 +325,6 @@ PlatformFlashLockPolicy (
} }
} }
/**
Erase and Write to platform flash.
Routine accesses one flash block at a time, each access consists
of an erase followed by a write of FLASH_BLOCK_SIZE. One or both
of DoErase & DoWrite params must be TRUE.
Limitations:-
CpuWriteAddress must be aligned to FLASH_BLOCK_SIZE.
DataSize must be a multiple of FLASH_BLOCK_SIZE.
@param Smst If != NULL then InSmm and use to locate
SpiProtocol.
@param CpuWriteAddress Address in CPU memory map of flash region.
@param Data The buffer containing the data to be written.
@param DataSize Amount of data to write.
@param DoErase Earse each block.
@param DoWrite Write to each block.
@retval EFI_SUCCESS Operation successful.
@retval EFI_NOT_READY Required resources not setup.
@retval EFI_INVALID_PARAMETER Invalid parameter.
@retval Others Unexpected error happened.
**/
EFI_STATUS
EFIAPI
PlatformFlashEraseWrite (
IN VOID *Smst,
IN UINTN CpuWriteAddress,
IN UINT8 *Data,
IN UINTN DataSize,
IN BOOLEAN DoErase,
IN BOOLEAN DoWrite
)
{
EFI_STATUS Status;
UINT64 CpuBaseAddress;
SPI_INIT_INFO *SpiInfo;
UINT8 *WriteBuf;
UINTN Index;
UINTN SpiWriteAddress;
EFI_SPI_PROTOCOL *SpiProtocol;
if (!DoErase && !DoWrite) {
return EFI_INVALID_PARAMETER;
}
if (DoWrite && Data == NULL) {
return EFI_INVALID_PARAMETER;
}
if ((CpuWriteAddress % FLASH_BLOCK_SIZE) != 0) {
return EFI_INVALID_PARAMETER;
}
if ((DataSize % FLASH_BLOCK_SIZE) != 0) {
return EFI_INVALID_PARAMETER;
}
SpiProtocol = LocateSpiProtocol ((EFI_SMM_SYSTEM_TABLE2 *)Smst);
if (SpiProtocol == NULL) {
return EFI_NOT_READY;
}
//
// Find info to allow usage of SpiProtocol->Execute.
//
Status = SpiProtocol->Info (
SpiProtocol,
&SpiInfo
);
if (EFI_ERROR(Status)) {
return Status;
}
ASSERT (SpiInfo->InitTable != NULL);
ASSERT (SpiInfo->EraseOpcodeIndex < SPI_NUM_OPCODE);
ASSERT (SpiInfo->ProgramOpcodeIndex < SPI_NUM_OPCODE);
CpuBaseAddress = PcdGet32 (PcdFlashAreaBaseAddress) - (UINT32)SpiInfo->InitTable->BiosStartOffset;
ASSERT(CpuBaseAddress >= (SIZE_4GB - SIZE_8MB));
if (CpuWriteAddress < CpuBaseAddress) {
return (EFI_INVALID_PARAMETER);
}
SpiWriteAddress = CpuWriteAddress - ((UINTN) CpuBaseAddress);
WriteBuf = Data;
DEBUG (
(EFI_D_INFO, "PlatformFlashWrite:SpiWriteAddress=%08x EraseIndex=%d WriteIndex=%d\n",
SpiWriteAddress,
(UINTN) SpiInfo->EraseOpcodeIndex,
(UINTN) SpiInfo->ProgramOpcodeIndex
));
for (Index =0; Index < DataSize / FLASH_BLOCK_SIZE; Index++) {
if (DoErase) {
DEBUG (
(EFI_D_INFO, "PlatformFlashWrite:Erase[%04x] SpiWriteAddress=%08x\n",
Index,
SpiWriteAddress
));
Status = SpiProtocol->Execute (
SpiProtocol,
SpiInfo->EraseOpcodeIndex,// OpcodeIndex
0, // PrefixOpcodeIndex
FALSE, // DataCycle
TRUE, // Atomic
FALSE, // ShiftOut
SpiWriteAddress, // Address
0, // Data Number
NULL,
EnumSpiRegionAll // SPI_REGION_TYPE
);
if (EFI_ERROR(Status)) {
return Status;
}
}
if (DoWrite) {
DEBUG (
(EFI_D_INFO, "PlatformFlashWrite:Write[%04x] SpiWriteAddress=%08x\n",
Index,
SpiWriteAddress
));
Status = SpiProtocol->Execute (
SpiProtocol,
SpiInfo->ProgramOpcodeIndex, // OpcodeIndex
0, // PrefixOpcodeIndex
TRUE, // DataCycle
TRUE, // Atomic
TRUE, // ShiftOut
SpiWriteAddress, // Address
FLASH_BLOCK_SIZE, // Data Number
WriteBuf,
EnumSpiRegionAll
);
if (EFI_ERROR(Status)) {
return Status;
}
WriteBuf+=FLASH_BLOCK_SIZE;
}
SpiWriteAddress+=FLASH_BLOCK_SIZE;
}
return EFI_SUCCESS;
}
/** Check if System booted with recovery Boot Stage1 image. /** Check if System booted with recovery Boot Stage1 image.
@retval TRUE If system booted with recovery Boot Stage1 image. @retval TRUE If system booted with recovery Boot Stage1 image.