mirror of https://github.com/acidanthera/audk.git
IntelSiliconPkg/Include: Add VTD industry standard.
Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
This commit is contained in:
Jiewen Yao
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1ccfe74ef4
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e2d81fb12a
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/** @file
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The definition for VTD register.
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It is defined in "Intel VT for Direct IO Architecture Specification".
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __VTD_REG_H__
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#define __VTD_REG_H__
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#pragma pack(1)
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//
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// Translation Structure Formats
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//
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#define VTD_ROOT_ENTRY_NUMBER 256
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#define VTD_CONTEXT_ENTRY_NUMBER 256
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typedef union {
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struct {
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UINT64 Present:1;
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UINT64 Reserved_1:11;
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UINT64 ContextTablePointer:52;
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UINT64 Reserved_64;
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} Bits;
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struct {
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UINT64 Uint64Lo;
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UINT64 Uint64Hi;
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} Uint128;
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} VTD_ROOT_ENTRY;
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typedef union {
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struct {
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UINT64 LowerPresent:1;
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UINT64 Reserved_1:11;
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UINT64 LowerContextTablePointer:52;
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UINT64 UpperPresent:1;
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UINT64 Reserved_65:11;
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UINT64 UpperContextTablePointer:52;
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} Bits;
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struct {
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UINT64 Uint64Lo;
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UINT64 Uint64Hi;
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} Uint128;
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} VTD_EXT_ROOT_ENTRY;
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typedef union {
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struct {
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UINT64 Present:1;
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UINT64 FaultProcessingDisable:1;
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UINT64 TranslationType:2;
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UINT64 Reserved_4:8;
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UINT64 SecondLevelPageTranslationPointer:52;
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UINT64 AddressWidth:3;
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UINT64 Ignored_67:4;
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UINT64 Reserved_71:1;
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UINT64 DomainIdentifier:16;
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UINT64 Reserved_88:40;
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} Bits;
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struct {
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UINT64 Uint64Lo;
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UINT64 Uint64Hi;
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} Uint128;
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} VTD_CONTEXT_ENTRY;
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typedef union {
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struct {
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UINT64 Present:1;
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UINT64 FaultProcessingDisable:1;
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UINT64 TranslationType:3;
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UINT64 ExtendedMemoryType:3;
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UINT64 DeferredInvalidateEnable:1;
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UINT64 PageRequestEnable:1;
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UINT64 NestedTranslationEnable:1;
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UINT64 PASIDEnable:1;
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UINT64 SecondLevelPageTranslationPointer:52;
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UINT64 AddressWidth:3;
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UINT64 PageGlobalEnable:1;
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UINT64 NoExecuteEnable:1;
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UINT64 WriteProtectEnable:1;
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UINT64 CacheDisable:1;
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UINT64 ExtendedMemoryTypeEnable:1;
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UINT64 DomainIdentifier:16;
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UINT64 SupervisorModeExecuteProtection:1;
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UINT64 ExtendedAccessedFlagEnable:1;
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UINT64 ExecuteRequestsEnable:1;
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UINT64 SecondLevelExecuteEnable:1;
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UINT64 Reserved_92:4;
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UINT64 PageAttributeTable0:3;
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UINT64 Reserved_Pat0:1;
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UINT64 PageAttributeTable1:3;
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UINT64 Reserved_Pat1:1;
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UINT64 PageAttributeTable2:3;
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UINT64 Reserved_Pat2:1;
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UINT64 PageAttributeTable3:3;
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UINT64 Reserved_Pat3:1;
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UINT64 PageAttributeTable4:3;
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UINT64 Reserved_Pat4:1;
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UINT64 PageAttributeTable5:3;
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UINT64 Reserved_Pat5:1;
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UINT64 PageAttributeTable6:3;
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UINT64 Reserved_Pat6:1;
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UINT64 PageAttributeTable7:3;
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UINT64 Reserved_Pat7:1;
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UINT64 PASIDTableSize:4;
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UINT64 Reserved_132:8;
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UINT64 PASIDTablePointer:52;
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UINT64 Reserved_192:12;
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UINT64 PASIDStateTablePointer:52;
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} Bits;
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struct {
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UINT64 Uint64_1;
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UINT64 Uint64_2;
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UINT64 Uint64_3;
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UINT64 Uint64_4;
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} Uint256;
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} VTD_EXT_CONTEXT_ENTRY;
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typedef union {
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struct {
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UINT64 Present:1;
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UINT64 Reserved_1:2;
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UINT64 PageLevelCacheDisable:1;
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UINT64 PageLevelWriteThrough:1;
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UINT64 Reserved_5:6;
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UINT64 SupervisorRequestsEnable:1;
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UINT64 FirstLevelPageTranslationPointer:52;
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} Bits;
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UINT64 Uint64;
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} VTD_PASID_ENTRY;
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typedef union {
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struct {
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UINT64 Reserved_0:32;
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UINT64 ActiveReferenceCount:16;
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UINT64 Reserved_48:15;
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UINT64 DeferredInvalidate:1;
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} Bits;
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UINT64 Uint64;
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} VTD_PASID_STATE_ENTRY;
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typedef union {
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struct {
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UINT64 Present:1;
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UINT64 ReadWrite:1;
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UINT64 UserSupervisor:1;
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UINT64 PageLevelWriteThrough:1;
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UINT64 PageLevelCacheDisable:1;
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UINT64 Accessed:1;
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UINT64 Dirty:1;
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UINT64 PageSize:1; // It is PageAttribute:1 for 4K page entry
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UINT64 Global:1;
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UINT64 Ignored_9:1;
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UINT64 ExtendedAccessed:1;
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UINT64 Ignored_11:1;
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// NOTE: There is PageAttribute:1 as bit12 for 1G page entry and 2M page entry
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UINT64 Address:40;
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UINT64 Ignored_52:11;
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UINT64 ExecuteDisable:1;
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} Bits;
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UINT64 Uint64;
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} VTD_FIRST_LEVEL_PAGING_ENTRY;
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typedef union {
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struct {
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UINT64 Read:1;
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UINT64 Write:1;
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UINT64 Execute:1;
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UINT64 ExtendedMemoryType:3;
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UINT64 IgnorePAT:1;
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UINT64 PageSize:1;
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UINT64 Ignored_8:3;
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UINT64 Snoop:1;
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UINT64 Address:40;
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UINT64 Ignored_52:10;
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UINT64 TransientMapping:1;
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UINT64 Ignored_63:1;
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} Bits;
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UINT64 Uint64;
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} VTD_SECOND_LEVEL_PAGING_ENTRY;
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//
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// Register Descriptions
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//
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#define R_VER_REG 0x00
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#define R_CAP_REG 0x08
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#define B_CAP_REG_RWBF BIT4
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#define R_ECAP_REG 0x10
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#define R_GCMD_REG 0x18
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#define B_GMCD_REG_WBF BIT27
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#define B_GMCD_REG_SRTP BIT30
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#define B_GMCD_REG_TE BIT31
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#define R_GSTS_REG 0x1C
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#define B_GSTS_REG_WBF BIT27
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#define B_GSTS_REG_RTPS BIT30
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#define B_GSTS_REG_TE BIT31
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#define R_RTADDR_REG 0x20
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#define R_CCMD_REG 0x28
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#define B_CCMD_REG_CIRG_MASK (BIT62|BIT61)
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#define V_CCMD_REG_CIRG_GLOBAL BIT61
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#define V_CCMD_REG_CIRG_DOMAIN BIT62
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#define V_CCMD_REG_CIRG_DEVICE (BIT62|BIT61)
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#define B_CCMD_REG_ICC BIT63
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#define R_FSTS_REG 0x34
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#define R_FECTL_REG 0x38
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#define R_FEDATA_REG 0x3C
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#define R_FEADDR_REG 0x40
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#define R_FEUADDR_REG 0x44
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#define R_AFLOG_REG 0x58
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#define R_IVA_REG 0x00 // + IRO
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#define B_IVA_REG_AM_MASK (BIT0|BIT1|BIT2|BIT3|BIT4|BIT5)
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#define B_IVA_REG_AM_4K 0 // 1 page
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#define B_IVA_REG_AM_2M 9 // 2M page
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#define B_IVA_REG_IH BIT6
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#define R_IOTLB_REG 0x08 // + IRO
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#define B_IOTLB_REG_IIRG_MASK (BIT61|BIT60)
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#define V_IOTLB_REG_IIRG_GLOBAL BIT60
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#define V_IOTLB_REG_IIRG_DOMAIN BIT61
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#define V_IOTLB_REG_IIRG_PAGE (BIT61|BIT60)
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#define B_IOTLB_REG_IVT BIT63
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#define R_FRCD_REG 0x00 // + FRO
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typedef union {
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struct {
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UINT8 ND:3; // Number of domains supported
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UINT8 AFL:1; // Advanced Fault Logging
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UINT8 RWBF:1; // Required Write-Buffer Flushing
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UINT8 PLMR:1; // Protected Low-Memory Region
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UINT8 PHMR:1; // Protected High-Memory Region
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UINT8 CM:1; // Caching Mode
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UINT8 SAGAW:5; // Supported Adjusted Guest Address Widths
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UINT8 Rsvd_13:3;
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UINT8 MGAW:6; // Maximum Guest Address Width
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UINT8 ZLR:1; // Zero Length Read
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UINT8 Rsvd_23:1;
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UINT16 FRO:10; // Fault-recording Register offset
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UINT16 SLLPS:4; // Second Level Large Page Support
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UINT16 Rsvd_38:1;
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UINT16 PSI:1; // Page Selective Invalidation
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UINT8 NFR:8; // Number of Fault-recording Registers
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UINT8 MAMV:6; // Maximum Address Mask Value
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UINT8 DWD:1; // Write Draining
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UINT8 DRD:1; // Read Draining
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UINT8 FL1GP:1; // First Level 1-GByte Page Support
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UINT8 Rsvd_57:2;
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UINT8 PI:1; // Posted Interrupts Support
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UINT8 Rsvd_60:4;
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} Bits;
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UINT64 Uint64;
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} VTD_CAP_REG;
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typedef union {
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struct {
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UINT8 C:1; // Page-walk Coherency
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UINT8 QI:1; // Queued Invalidation support
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UINT8 DT:1; // Device-TLB support
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UINT8 IR:1; // Interrupt Remapping support
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UINT8 EIM:1; // Extended Interrupt Mode
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UINT8 Rsvd_5:1;
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UINT8 PT:1; // Pass Through
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UINT8 SC:1; // Snoop Control
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UINT16 IRO:10; // IOTLB Register Offset
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UINT16 Rsvd_18:2;
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UINT16 MHMV:4; // Maximum Handle Mask Value
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UINT8 ECS:1; // Extended Context Support
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UINT8 MTS:1; // Memory Type Support
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UINT8 NEST:1; // Nested Translation Support
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UINT8 DIS:1; // Deferred Invalidate Support
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UINT8 PASID:1; // Process Address Space ID Support
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UINT8 PRS:1; // Page Request Support
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UINT8 ERS:1; // Execute Request Support
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UINT8 SRS:1; // Supervisor Request Support
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UINT32 Rsvd_32:1;
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UINT32 NWFS:1; // No Write Flag Support
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UINT32 EAFS:1; // Extended Accessed Flag Support
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UINT32 PSS:5; // PASID Size Supported
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UINT32 Rsvd_40:24;
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} Bits;
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UINT64 Uint64;
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} VTD_ECAP_REG;
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typedef union {
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struct {
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UINT64 Rsvd_0:12;
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UINT64 FI:52; // FaultInfo
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UINT32 SID:16; // Source Identifier
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UINT32 Rsvd_80:13;
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UINT32 PRIV:1; // Privilege Mode Requested
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UINT32 EXE:1; // Execute Permission Requested
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UINT32 PP:1; // PASID Present
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UINT32 FR:8; // Fault Reason
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UINT32 PV:20; // PASID Value
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UINT32 AT:2; // Address Type
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UINT32 T:1; // Type (0: Write, 1: Read)
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UINT32 F:1; // Fault
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} Bits;
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UINT64 Uint64[2];
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} VTD_FRCD_REG;
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typedef union {
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struct {
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UINT8 Function:3;
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UINT8 Device:5;
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UINT8 Bus;
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} Bits;
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struct {
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UINT8 ContextIndex;
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UINT8 RootIndex;
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} Index;
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UINT16 Uint16;
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} VTD_SOURCE_ID;
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#pragma pack()
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#endif
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