mirror of https://github.com/acidanthera/audk.git
MdePkg: Add LoongArch64 FPU function set into BaseCpuLib
Adding InitializeFloatingPointUnits, EnableFloatingPointUnits and DisableFloatingPointUnits functions for LoongArch64. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Chao Li
Liming Gao
parent
9e1576bc10
commit
e5b5073153
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@ -8,6 +8,7 @@
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As a result, these services could not be defined in the Base Library.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -41,14 +42,16 @@ CpuFlushTlb (
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VOID
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);
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#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
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#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) || defined (MDE_CPU_LOONGARCH64)
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/**
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Initialize the CPU floating point units.
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Initializes floating point units for requirement of UEFI specification.
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This function initializes floating-point control word to 0x027F (all exceptions
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masked,double-precision, round-to-nearest) and multimedia-extensions control word
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(if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
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for masked underflow).
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For IA32 and X64, this function initializes floating-point control word to 0x027F
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(all exceptions masked,double-precision, round-to-nearest) and multimedia-extensions
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control word (if supported) to 0x1F80 (all exceptions masked, round-to-nearest,
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flush to zero for masked underflow).
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**/
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VOID
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EFIAPI
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@ -56,6 +59,10 @@ InitializeFloatingPointUnits (
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VOID
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);
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#endif
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#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
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/**
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Determine if the standard CPU signature is "AuthenticAMD".
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@retval TRUE The CPU signature matches.
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@ -89,4 +96,30 @@ GetCpuSteppingId (
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#endif
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#if defined (MDE_CPU_LOONGARCH64)
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/**
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Enable the CPU floating point units.
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Enable the CPU floating point units.
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**/
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VOID
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EFIAPI
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EnableFloatingPointUnits (
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VOID
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);
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/**
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Disable the CPU floating point units.
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Disable the CPU floating point units.
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**/
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VOID
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EFIAPI
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DisableFloatingPointUnits (
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VOID
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);
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#endif
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#endif
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@ -65,8 +65,11 @@
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RiscV/Cpu.S
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[Sources.LOONGARCH64]
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LoongArch/CpuFlushTlb.S | GCC
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LoongArch/CpuSleep.S | GCC
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LoongArch/CpuFlushTlb.S | GCC
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LoongArch/CpuSleep.S | GCC
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LoongArch/InitializeFpu.S | GCC
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LoongArch/EnableFpu.S | GCC
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LoongArch/DisableFpu.S | GCC
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[Packages]
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MdePkg/MdePkg.dec
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@ -0,0 +1,17 @@
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#------------------------------------------------------------------------------
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#
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# DisableFloatingPointUnits() for LoongArch64
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#
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# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(DisableFloatingPointUnits)
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ASM_PFX(DisableFloatingPointUnits):
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li.w $t0, 0x1
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csrxchg $zero, $t0, 0x2
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jirl $zero, $ra, 0
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.end
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@ -0,0 +1,17 @@
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#------------------------------------------------------------------------------
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#
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# EnableFloatingPointUnits() for LoongArch64
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#
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# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(EnableFloatingPointUnits)
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ASM_PFX(EnableFloatingPointUnits):
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li.w $t0, 0x1
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csrxchg $t0, $t0, 0x2
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jirl $zero, $ra, 0
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.end
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@ -0,0 +1,51 @@
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#------------------------------------------------------------------------------
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#
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# InitializeFloatingPointUnits() for LoongArch64
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#
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# Copyright (c) 2024, Loongson Technology Corporation Limited. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
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ASM_PFX(InitializeFloatingPointUnits):
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li.d $t0, 0x0 // RNE mode
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movgr2fcsr $r0, $t0
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li.d $t1, -1 // SNaN
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movgr2fr.d $f0, $t1
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movgr2fr.d $f1, $t1
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movgr2fr.d $f2, $t1
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movgr2fr.d $f3, $t1
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movgr2fr.d $f4, $t1
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movgr2fr.d $f5, $t1
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movgr2fr.d $f6, $t1
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movgr2fr.d $f7, $t1
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movgr2fr.d $f8, $t1
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movgr2fr.d $f9, $t1
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movgr2fr.d $f10, $t1
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movgr2fr.d $f11, $t1
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movgr2fr.d $f12, $t1
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movgr2fr.d $f13, $t1
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movgr2fr.d $f14, $t1
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movgr2fr.d $f15, $t1
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movgr2fr.d $f16, $t1
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movgr2fr.d $f17, $t1
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movgr2fr.d $f18, $t1
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movgr2fr.d $f19, $t1
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movgr2fr.d $f20, $t1
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movgr2fr.d $f21, $t1
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movgr2fr.d $f22, $t1
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movgr2fr.d $f23, $t1
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movgr2fr.d $f24, $t1
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movgr2fr.d $f25, $t1
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movgr2fr.d $f26, $t1
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movgr2fr.d $f27, $t1
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movgr2fr.d $f28, $t1
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movgr2fr.d $f29, $t1
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movgr2fr.d $f30, $t1
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movgr2fr.d $f31, $t1
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jirl $zero, $ra, 0
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.end
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