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UefiPayloadPkg: Apply uncrustify changes 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the UefiPayloadPkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
Michael Kubacki 2021-12-05 14:54:18 -08:00 committed by mergify[bot]
parent 053e878bfb
commit e5efcf8be8
76 changed files with 4281 additions and 4072 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
UefiPayloadPkg/BlSupportDxe/BlSupportDxe.c
View File

@ -30,7 +30,7 @@ ReserveResourceInGcd (
IN EFI_HANDLE ImageHandle
)
{
EFI_STATUS Status;
EFI_STATUS Status;
if (IsMMIO) {
Status = gDS->AddMemorySpace (
@ -47,6 +47,7 @@ ReserveResourceInGcd (
Length
));
}
Status = gDS->AllocateMemorySpace (
EfiGcdAllocateAddress,
GcdType,
@ -70,6 +71,7 @@ ReserveResourceInGcd (
Length
));
}
Status = gDS->AllocateIoSpace (
EfiGcdAllocateAddress,
GcdType,
@ -80,10 +82,10 @@ ReserveResourceInGcd (
NULL
);
}
return Status;
}
/**
Main entry for the bootloader support DXE module.
@ -97,11 +99,11 @@ ReserveResourceInGcd (
EFI_STATUS
EFIAPI
BlDxeEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_STATUS Status;
EFI_HOB_GUID_TYPE *GuidHob;
EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo;
ACPI_BOARD_INFO *AcpiBoardInfo;
@ -120,7 +122,7 @@ BlDxeEntryPoint (
GuidHob = GetFirstGuidHob (&gEfiGraphicsInfoHobGuid);
if (GuidHob != NULL) {
GfxInfo = (EFI_PEI_GRAPHICS_INFO_HOB *)GET_GUID_HOB_DATA (GuidHob);
Status = PcdSet32S (PcdVideoHorizontalResolution, GfxInfo->GraphicsMode.HorizontalResolution);
Status = PcdSet32S (PcdVideoHorizontalResolution, GfxInfo->GraphicsMode.HorizontalResolution);
ASSERT_EFI_ERROR (Status);
Status = PcdSet32S (PcdVideoVerticalResolution, GfxInfo->GraphicsMode.VerticalResolution);
ASSERT_EFI_ERROR (Status);
@ -136,7 +138,7 @@ BlDxeEntryPoint (
GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);
if (GuidHob != NULL) {
AcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
Status = PcdSet64S (PcdPciExpressBaseAddress, AcpiBoardInfo->PcieBaseAddress);
Status = PcdSet64S (PcdPciExpressBaseAddress, AcpiBoardInfo->PcieBaseAddress);
ASSERT_EFI_ERROR (Status);
Status = PcdSet64S (PcdPciExpressBaseSize, AcpiBoardInfo->PcieBaseSize);
ASSERT_EFI_ERROR (Status);
@ -144,4 +146,3 @@ BlDxeEntryPoint (
return EFI_SUCCESS;
}

1
UefiPayloadPkg/BlSupportDxe/BlSupportDxe.h
View File

@ -5,6 +5,7 @@ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __DXE_BOOTLOADER_SUPPORT_H__
#define __DXE_BOOTLOADER_SUPPORT_H__

128
UefiPayloadPkg/BlSupportSmm/BlSupportSmm.c
View File

@ -13,10 +13,10 @@
#include <BlSupportSmm.h>
PLD_S3_COMMUNICATION mPldS3Hob;
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *mSmramHob = NULL;
PLD_SMM_REGISTERS *mSmmRegisterHob = NULL;;
UINT64 mSmmFeatureControl = 0;
PLD_S3_COMMUNICATION mPldS3Hob;
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *mSmramHob = NULL;
PLD_SMM_REGISTERS *mSmmRegisterHob = NULL;
UINT64 mSmmFeatureControl = 0;
/**
Save SMM rebase and SMI handler information to SMM communication area
@ -33,24 +33,26 @@ UINT64 mSmmFeatureControl = 0;
**/
EFI_STATUS
SaveSmmInfoForS3 (
IN UINT8 BlSwSmiHandlerInput
IN UINT8 BlSwSmiHandlerInput
)
{
EFI_STATUS Status;
EFI_PROCESSOR_INFORMATION ProcessorInfo;
EFI_MP_SERVICES_PROTOCOL *MpService;
CPU_SMMBASE *SmmBaseInfo;
PLD_TO_BL_SMM_INFO *PldSmmInfo;
UINTN Index;
EFI_STATUS Status;
EFI_PROCESSOR_INFORMATION ProcessorInfo;
EFI_MP_SERVICES_PROTOCOL *MpService;
CPU_SMMBASE *SmmBaseInfo;
PLD_TO_BL_SMM_INFO *PldSmmInfo;
UINTN Index;
PldSmmInfo = (PLD_TO_BL_SMM_INFO *)(UINTN)mPldS3Hob.CommBuffer.PhysicalStart;
PldSmmInfo = (PLD_TO_BL_SMM_INFO *)(UINTN)mPldS3Hob.CommBuffer.PhysicalStart;
PldSmmInfo->Header.Header.HobLength = (UINT16)(sizeof (PLD_TO_BL_SMM_INFO) + gSmst->NumberOfCpus * sizeof (CPU_SMMBASE));
for (Index = 0; Index < mSmramHob->NumberOfSmmReservedRegions; Index++) {
if ((mPldS3Hob.CommBuffer.PhysicalStart >= mSmramHob->Descriptor[Index].PhysicalStart) &&
(mPldS3Hob.CommBuffer.PhysicalStart < mSmramHob->Descriptor[Index].PhysicalStart + mSmramHob->Descriptor[Index].PhysicalSize)) {
(mPldS3Hob.CommBuffer.PhysicalStart < mSmramHob->Descriptor[Index].PhysicalStart + mSmramHob->Descriptor[Index].PhysicalSize))
{
break;
}
}
if (Index == mSmramHob->NumberOfSmmReservedRegions) {
return EFI_NOT_FOUND;
}
@ -76,14 +78,15 @@ SaveSmmInfoForS3 (
// Save APIC ID and SMM base
//
Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&MpService);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
PldSmmInfo->S3Info.CpuCount = (UINT32)gSmst->NumberOfCpus;
SmmBaseInfo = &PldSmmInfo->S3Info.SmmBase[0];
PldSmmInfo->S3Info.CpuCount = (UINT32)gSmst->NumberOfCpus;
SmmBaseInfo = &PldSmmInfo->S3Info.SmmBase[0];
for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
Status = MpService->GetProcessorInfo (MpService, Index, &ProcessorInfo);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
@ -96,7 +99,6 @@ SaveSmmInfoForS3 (
return EFI_SUCCESS;
}
/**
Get specified SMI register based on given register ID
@ -108,16 +110,17 @@ SaveSmmInfoForS3 (
**/
PLD_GENERIC_REGISTER *
GetRegisterById (
UINT64 Id
UINT64 Id
)
{
UINT32 Index;
UINT32 Index;
for (Index = 0; Index < mSmmRegisterHob->Count; Index++) {
if (mSmmRegisterHob->Registers[Index].Id == Id) {
return &mSmmRegisterHob->Registers[Index];
}
}
return NULL;
}
@ -130,9 +133,9 @@ LockSmiGlobalEn (
VOID
)
{
PLD_GENERIC_REGISTER *SmiLockReg;
PLD_GENERIC_REGISTER *SmiLockReg;
DEBUG ((DEBUG_ERROR, "LockSmiGlobalEn .....\n"));
DEBUG ((DEBUG_ERROR, "LockSmiGlobalEn .....\n"));
SmiLockReg = GetRegisterById (REGISTER_ID_SMI_GBL_EN_LOCK);
if (SmiLockReg == NULL) {
@ -147,7 +150,8 @@ LockSmiGlobalEn (
(SmiLockReg->Address.Address != 0) &&
(SmiLockReg->Address.RegisterBitWidth == 1) &&
(SmiLockReg->Address.AddressSpaceId == EFI_ACPI_3_0_SYSTEM_MEMORY) &&
(SmiLockReg->Value == 1)) {
(SmiLockReg->Value == 1))
{
DEBUG ((DEBUG_ERROR, "LockSmiGlobalEn ....is locked\n"));
MmioOr32 ((UINT32)SmiLockReg->Address.Address, 1 << SmiLockReg->Address.RegisterBitOffset);
@ -166,23 +170,21 @@ SmmFeatureLockOnS3 (
VOID
)
{
if (mSmmFeatureControl != 0) {
return;
}
mSmmFeatureControl = AsmReadMsr64(MSR_SMM_FEATURE_CONTROL);
mSmmFeatureControl = AsmReadMsr64 (MSR_SMM_FEATURE_CONTROL);
if ((mSmmFeatureControl & 0x5) != 0x5) {
//
// Set Lock bit [BIT0] for this register and SMM code check enable bit [BIT2]
//
AsmWriteMsr64 (MSR_SMM_FEATURE_CONTROL, mSmmFeatureControl | 0x5);
}
mSmmFeatureControl = AsmReadMsr64(MSR_SMM_FEATURE_CONTROL);
mSmmFeatureControl = AsmReadMsr64 (MSR_SMM_FEATURE_CONTROL);
}
/**
Function to program SMRR base and mask.
@ -190,7 +192,7 @@ SmmFeatureLockOnS3 (
**/
VOID
SetSmrr (
IN VOID *ProcedureArgument
IN VOID *ProcedureArgument
)
{
if (ProcedureArgument != NULL) {
@ -208,11 +210,11 @@ SetSmrrOnS3 (
VOID
)
{
EFI_STATUS Status;
SMRR_BASE_MASK Arguments;
UINTN Index;
UINT32 SmmBase;
UINT32 SmmSize;
EFI_STATUS Status;
SMRR_BASE_MASK Arguments;
UINTN Index;
UINT32 SmmBase;
UINT32 SmmSize;
if ((AsmReadMsr64 (MSR_IA32_SMRR_PHYSBASE) != 0) && ((AsmReadMsr64 (MSR_IA32_SMRR_PHYSMASK) & BIT11) != 0)) {
return;
@ -224,18 +226,19 @@ SetSmrrOnS3 (
DEBUG ((DEBUG_ERROR, "%d SMM ranges are not supported.\n", mSmramHob->NumberOfSmmReservedRegions));
return;
} else if (mSmramHob->NumberOfSmmReservedRegions == 2) {
if ((mSmramHob->Descriptor[1].PhysicalStart + mSmramHob->Descriptor[1].PhysicalSize) == SmmBase){
if ((mSmramHob->Descriptor[1].PhysicalStart + mSmramHob->Descriptor[1].PhysicalSize) == SmmBase) {
SmmBase = (UINT32)(UINTN)mSmramHob->Descriptor[1].PhysicalStart;
} else if (mSmramHob->Descriptor[1].PhysicalStart != (SmmBase + SmmSize)) {
DEBUG ((DEBUG_ERROR, "Two SMM regions are not continous.\n"));
return;
}
SmmSize += (UINT32)(UINTN)mSmramHob->Descriptor[1].PhysicalSize;
}
if ((SmmBase == 0) || (SmmSize < SIZE_4KB)) {
DEBUG ((DEBUG_ERROR, "Invalid SMM range.\n"));
return ;
return;
}
//
@ -244,7 +247,7 @@ SetSmrrOnS3 (
//
if ((SmmSize != GetPowerOfTwo32 (SmmSize)) || ((SmmBase & ~(SmmSize - 1)) != SmmBase)) {
DEBUG ((DEBUG_ERROR, " Invalid SMM range.\n"));
return ;
return;
}
//
@ -261,18 +264,17 @@ SetSmrrOnS3 (
//
// Program smrr base and mask on BSP first and then on APs
//
SetSmrr(&Arguments);
SetSmrr (&Arguments);
for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
if (Index != gSmst->CurrentlyExecutingCpu) {
Status = gSmst->SmmStartupThisAp (SetSmrr, Index, (VOID *)&Arguments);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Programming SMRR on AP# %d status: %r\n", Index, Status));
}
}
}
}
/**
Software SMI callback for restoring SMRR base and mask in S3 path.
@ -289,10 +291,10 @@ SetSmrrOnS3 (
EFI_STATUS
EFIAPI
BlSwSmiHandler (
IN EFI_HANDLE DispatchHandle,
IN CONST VOID *Context,
IN OUT VOID *CommBuffer,
IN OUT UINTN *CommBufferSize
IN EFI_HANDLE DispatchHandle,
IN CONST VOID *Context,
IN OUT VOID *CommBuffer,
IN OUT UINTN *CommBufferSize
)
{
SetSmrrOnS3 ();
@ -302,7 +304,6 @@ BlSwSmiHandler (
return EFI_SUCCESS;
}
/**
Lock SMI in this SMM ready to lock event.
@ -316,9 +317,9 @@ BlSwSmiHandler (
EFI_STATUS
EFIAPI
BlSupportSmmReadyToLockCallback (
IN CONST EFI_GUID *Protocol,
IN VOID *Interface,
IN EFI_HANDLE Handle
IN CONST EFI_GUID *Protocol,
IN VOID *Interface,
IN EFI_HANDLE Handle
)
{
//
@ -328,7 +329,6 @@ BlSupportSmmReadyToLockCallback (
return EFI_SUCCESS;
}
/**
The driver's entry point.
@ -342,8 +342,8 @@ BlSupportSmmReadyToLockCallback (
EFI_STATUS
EFIAPI
BlSupportSmm (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
@ -359,8 +359,8 @@ BlSupportSmm (
//
GuidHob = GetFirstGuidHob (&gS3CommunicationGuid);
if (GuidHob != NULL) {
SmmHob = (VOID *) (GET_GUID_HOB_DATA(GuidHob));
CopyMem (&mPldS3Hob, SmmHob, GET_GUID_HOB_DATA_SIZE(GuidHob));
SmmHob = (VOID *)(GET_GUID_HOB_DATA (GuidHob));
CopyMem (&mPldS3Hob, SmmHob, GET_GUID_HOB_DATA_SIZE (GuidHob));
} else {
return EFI_NOT_FOUND;
}
@ -375,12 +375,13 @@ BlSupportSmm (
//
GuidHob = GetFirstGuidHob (&gEfiSmmSmramMemoryGuid);
if (GuidHob != NULL) {
SmmHob = (VOID *) (GET_GUID_HOB_DATA(GuidHob));
mSmramHob = AllocatePool (GET_GUID_HOB_DATA_SIZE(GuidHob));
SmmHob = (VOID *)(GET_GUID_HOB_DATA (GuidHob));
mSmramHob = AllocatePool (GET_GUID_HOB_DATA_SIZE (GuidHob));
if (mSmramHob == NULL) {
return EFI_OUT_OF_RESOURCES;
}
CopyMem (mSmramHob, SmmHob, GET_GUID_HOB_DATA_SIZE(GuidHob));
CopyMem (mSmramHob, SmmHob, GET_GUID_HOB_DATA_SIZE (GuidHob));
} else {
return EFI_NOT_FOUND;
}
@ -390,12 +391,13 @@ BlSupportSmm (
//
GuidHob = GetFirstGuidHob (&gSmmRegisterInfoGuid);
if (GuidHob != NULL) {
SmmHob = (VOID *) (GET_GUID_HOB_DATA(GuidHob));
mSmmRegisterHob = AllocatePool (GET_GUID_HOB_DATA_SIZE(GuidHob));
SmmHob = (VOID *)(GET_GUID_HOB_DATA (GuidHob));
mSmmRegisterHob = AllocatePool (GET_GUID_HOB_DATA_SIZE (GuidHob));
if (mSmmRegisterHob == NULL) {
return EFI_OUT_OF_RESOURCES;
}
CopyMem (mSmmRegisterHob, SmmHob, GET_GUID_HOB_DATA_SIZE(GuidHob));
CopyMem (mSmmRegisterHob, SmmHob, GET_GUID_HOB_DATA_SIZE (GuidHob));
} else {
return EFI_NOT_FOUND;
}
@ -403,12 +405,13 @@ BlSupportSmm (
//
// Get the Sw dispatch protocol and register SMI handler.
//
Status = gSmst->SmmLocateProtocol (&gEfiSmmSwDispatch2ProtocolGuid, NULL, (VOID**)&SwDispatch);
Status = gSmst->SmmLocateProtocol (&gEfiSmmSwDispatch2ProtocolGuid, NULL, (VOID **)&SwDispatch);
if (EFI_ERROR (Status)) {
return Status;
}
SwContext.SwSmiInputValue = (UINTN) -1;
Status = SwDispatch->Register (SwDispatch, BlSwSmiHandler, &SwContext, &SwHandle);
SwContext.SwSmiInputValue = (UINTN)-1;
Status = SwDispatch->Register (SwDispatch, BlSwSmiHandler, &SwContext, &SwHandle);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Registering S3 smi handler failed: %r\n", Status));
return Status;
@ -428,4 +431,3 @@ BlSupportSmm (
return EFI_SUCCESS;
}

12
UefiPayloadPkg/BlSupportSmm/BlSupportSmm.h
View File

@ -5,6 +5,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef BL_SUPPORT_SMM_H_
#define BL_SUPPORT_SMM_H_
@ -28,14 +29,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Guid/SmmS3CommunicationInfoGuid.h>
#include <Guid/SmramMemoryReserve.h>
#define EFI_MSR_SMRR_MASK 0xFFFFF000
#define MSR_SMM_FEATURE_CONTROL 0x4E0
#define SMRAM_SAVE_STATE_MAP_OFFSET 0xFC00 /// Save state offset from SMBASE
#define EFI_MSR_SMRR_MASK 0xFFFFF000
#define MSR_SMM_FEATURE_CONTROL 0x4E0
#define SMRAM_SAVE_STATE_MAP_OFFSET 0xFC00 /// Save state offset from SMBASE
typedef struct {
UINT32 Base;
UINT32 Mask;
UINT32 Base;
UINT32 Mask;
} SMRR_BASE_MASK;
#endif

60
UefiPayloadPkg/FvbRuntimeDxe/FvbInfo.c
View File

@ -15,20 +15,20 @@
#include <Guid/NvVariableInfoGuid.h>
#include <Library/HobLib.h>
#define FVB_MEDIA_BLOCK_SIZE 0x1000
#define FVB_MEDIA_BLOCK_SIZE 0x1000
typedef struct {
EFI_FIRMWARE_VOLUME_HEADER FvInfo;
EFI_FV_BLOCK_MAP_ENTRY End[1];
EFI_FIRMWARE_VOLUME_HEADER FvInfo;
EFI_FV_BLOCK_MAP_ENTRY End[1];
} EFI_FVB2_MEDIA_INFO;
//
// This data structure contains a template of FV header which is used to restore
// Fv header if it's corrupted.
//
EFI_FVB2_MEDIA_INFO mFvbMediaInfo = {
EFI_FVB2_MEDIA_INFO mFvbMediaInfo = {
{
{0,}, // ZeroVector[16]
{ 0, }, // ZeroVector[16]
EFI_SYSTEM_NV_DATA_FV_GUID,
0,
EFI_FVH_SIGNATURE,
@ -36,7 +36,7 @@ EFI_FVB2_MEDIA_INFO mFvbMediaInfo = {
sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
0, // CheckSum which will be calucated dynamically.
0, // ExtHeaderOffset
{0,},
{ 0, },
EFI_FVH_REVISION,
{
{
@ -64,14 +64,14 @@ InitVariableStore (
VOID
)
{
EFI_STATUS Status;
UINT32 NvStorageBase;
UINT32 NvStorageSize;
UINT32 NvVariableSize;
UINT32 FtwWorkingSize;
UINT32 FtwSpareSize;
EFI_HOB_GUID_TYPE *GuidHob;
NV_VARIABLE_INFO *NvVariableInfo;
EFI_STATUS Status;
UINT32 NvStorageBase;
UINT32 NvStorageSize;
UINT32 NvVariableSize;
UINT32 FtwWorkingSize;
UINT32 FtwSpareSize;
EFI_HOB_GUID_TYPE *GuidHob;
NV_VARIABLE_INFO *NvVariableInfo;
//
// Find SPI flash variable hob
@ -81,7 +81,8 @@ InitVariableStore (
ASSERT (FALSE);
return EFI_NOT_FOUND;
}
NvVariableInfo = (NV_VARIABLE_INFO *) GET_GUID_HOB_DATA (GuidHob);
NvVariableInfo = (NV_VARIABLE_INFO *)GET_GUID_HOB_DATA (GuidHob);
//
// Get variable region base and size.
@ -104,27 +105,27 @@ InitVariableStore (
if (NvVariableSize >= 0x80000000) {
return EFI_INVALID_PARAMETER;
}
Status = PcdSet32S(PcdFlashNvStorageVariableSize, NvVariableSize);
Status = PcdSet32S (PcdFlashNvStorageVariableSize, NvVariableSize);
ASSERT_EFI_ERROR (Status);
Status = PcdSet32S(PcdFlashNvStorageVariableBase, NvStorageBase);
Status = PcdSet32S (PcdFlashNvStorageVariableBase, NvStorageBase);
ASSERT_EFI_ERROR (Status);
Status = PcdSet64S(PcdFlashNvStorageVariableBase64, NvStorageBase);
Status = PcdSet64S (PcdFlashNvStorageVariableBase64, NvStorageBase);
ASSERT_EFI_ERROR (Status);
Status = PcdSet32S(PcdFlashNvStorageFtwWorkingSize, FtwWorkingSize);
Status = PcdSet32S (PcdFlashNvStorageFtwWorkingSize, FtwWorkingSize);
ASSERT_EFI_ERROR (Status);
Status = PcdSet32S(PcdFlashNvStorageFtwWorkingBase, NvStorageBase + NvVariableSize);
Status = PcdSet32S (PcdFlashNvStorageFtwWorkingBase, NvStorageBase + NvVariableSize);
ASSERT_EFI_ERROR (Status);
Status = PcdSet32S(PcdFlashNvStorageFtwSpareSize, FtwSpareSize);
Status = PcdSet32S (PcdFlashNvStorageFtwSpareSize, FtwSpareSize);
ASSERT_EFI_ERROR (Status);
Status = PcdSet32S(PcdFlashNvStorageFtwSpareBase, NvStorageBase + FtwSpareSize);
Status = PcdSet32S (PcdFlashNvStorageFtwSpareBase, NvStorageBase + FtwSpareSize);
ASSERT_EFI_ERROR (Status);
return EFI_SUCCESS;
}
/**
Get a heathy FV header used for variable store recovery
@ -136,16 +137,15 @@ GetFvHeaderTemplate (
VOID
)
{
EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
UINTN FvSize;
EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
UINTN FvSize;
FvSize = PcdGet32(PcdFlashNvStorageFtwSpareSize) * 2;
FvSize = PcdGet32 (PcdFlashNvStorageFtwSpareSize) * 2;
FvHeader = &mFvbMediaInfo.FvInfo;
FvHeader->FvLength = FvSize;
FvHeader->BlockMap[0].NumBlocks = (UINT32) (FvSize / FvHeader->BlockMap[0].Length);
FvHeader->Checksum = 0;
FvHeader->Checksum = CalculateCheckSum16 ((UINT16 *) FvHeader, FvHeader->HeaderLength);
FvHeader->BlockMap[0].NumBlocks = (UINT32)(FvSize / FvHeader->BlockMap[0].Length);
FvHeader->Checksum = 0;
FvHeader->Checksum = CalculateCheckSum16 ((UINT16 *)FvHeader, FvHeader->HeaderLength);
return FvHeader;
}

419
UefiPayloadPkg/FvbRuntimeDxe/FvbService.c
View File

@ -12,9 +12,9 @@ Firmware Volume Block Driver to provide FVB service.
// Global variable for this FVB driver which contains
// the private data of all firmware volume block instances
//
FWB_GLOBAL mFvbModuleGlobal;
FWB_GLOBAL mFvbModuleGlobal;
FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
{
{
HARDWARE_DEVICE_PATH,
@ -25,8 +25,8 @@ FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
}
},
EfiMemoryMappedIO,
(EFI_PHYSICAL_ADDRESS) 0,
(EFI_PHYSICAL_ADDRESS) 0,
(EFI_PHYSICAL_ADDRESS)0,
(EFI_PHYSICAL_ADDRESS)0,
},
{
END_DEVICE_PATH_TYPE,
@ -38,7 +38,7 @@ FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate = {
}
};
FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
{
{
MEDIA_DEVICE_PATH,
@ -60,8 +60,7 @@ FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate = {
}
};
EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate = {
EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate = {
FVB_DEVICE_SIGNATURE,
NULL,
0, // Instance
@ -77,7 +76,6 @@ EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate = {
} // FwVolBlockInstance
};
/**
Get the pointer to EFI_FW_VOL_INSTANCE from the buffer pointed
by mFvbModuleGlobal.FvInstance based on a index.
@ -91,10 +89,10 @@ EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate = {
**/
EFI_FW_VOL_INSTANCE *
GetFvbInstance (
IN UINTN Instance
IN UINTN Instance
)
{
EFI_FW_VOL_INSTANCE *FwhRecord;
EFI_FW_VOL_INSTANCE *FwhRecord;
if ( Instance >= mFvbModuleGlobal.NumFv ) {
ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
@ -106,17 +104,15 @@ GetFvbInstance (
//
FwhRecord = mFvbModuleGlobal.FvInstance;
while ( Instance > 0 ) {
FwhRecord = (EFI_FW_VOL_INSTANCE *) ((UINTN)((UINT8 *)FwhRecord) +
FwhRecord->VolumeHeader.HeaderLength +
(sizeof (EFI_FW_VOL_INSTANCE) - sizeof (EFI_FIRMWARE_VOLUME_HEADER)));
FwhRecord = (EFI_FW_VOL_INSTANCE *)((UINTN)((UINT8 *)FwhRecord) +
FwhRecord->VolumeHeader.HeaderLength +
(sizeof (EFI_FW_VOL_INSTANCE) - sizeof (EFI_FIRMWARE_VOLUME_HEADER)));
Instance--;
}
return FwhRecord;
}
/**
Get the EFI_FVB_ATTRIBUTES_2 of a FV.
@ -128,11 +124,12 @@ GetFvbInstance (
STATIC
EFI_FVB_ATTRIBUTES_2
FvbGetVolumeAttributes (
IN UINTN Instance
IN UINTN Instance
)
{
EFI_FW_VOL_INSTANCE * FwInstance;
FwInstance = GetFvbInstance(Instance);
EFI_FW_VOL_INSTANCE *FwInstance;
FwInstance = GetFvbInstance (Instance);
ASSERT (FwInstance != NULL);
if (FwInstance == NULL) {
@ -142,8 +139,6 @@ FvbGetVolumeAttributes (
return FwInstance->VolumeHeader.Attributes;
}
/**
Retrieves the starting address of an LBA in an FV. It also
return a few other attribut of the FV.
@ -165,20 +160,20 @@ FvbGetVolumeAttributes (
STATIC
EFI_STATUS
FvbGetLbaAddress (
IN UINTN Instance,
IN EFI_LBA Lba,
OUT UINTN *LbaAddress,
OUT UINTN *LbaLength,
OUT UINTN *NumOfBlocks
IN UINTN Instance,
IN EFI_LBA Lba,
OUT UINTN *LbaAddress,
OUT UINTN *LbaLength,
OUT UINTN *NumOfBlocks
)
{
UINT32 NumBlocks;
UINT32 BlockLength;
UINTN Offset;
EFI_LBA StartLba;
EFI_LBA NextLba;
EFI_FW_VOL_INSTANCE *FwhInstance;
EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
UINT32 NumBlocks;
UINT32 BlockLength;
UINTN Offset;
EFI_LBA StartLba;
EFI_LBA NextLba;
EFI_FW_VOL_INSTANCE *FwhInstance;
EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
//
// Find the right instance of the FVB private data
@ -188,9 +183,9 @@ FvbGetLbaAddress (
return EFI_INVALID_PARAMETER;
}
StartLba = 0;
Offset = 0;
BlockMap = &FwhInstance->VolumeHeader.BlockMap[0];
StartLba = 0;
Offset = 0;
BlockMap = &FwhInstance->VolumeHeader.BlockMap[0];
ASSERT (BlockMap != NULL);
//
@ -202,7 +197,7 @@ FvbGetLbaAddress (
BlockLength = BlockMap->Length;
}
if ( NumBlocks == 0 || BlockLength == 0) {
if ((NumBlocks == 0) || (BlockLength == 0)) {
return EFI_INVALID_PARAMETER;
}
@ -211,8 +206,8 @@ FvbGetLbaAddress (
//
// The map entry found
//
if (Lba >= StartLba && Lba < NextLba) {
Offset = Offset + (UINTN)MultU64x32((Lba - StartLba), BlockLength);
if ((Lba >= StartLba) && (Lba < NextLba)) {
Offset = Offset + (UINTN)MultU64x32 ((Lba - StartLba), BlockLength);
if (LbaAddress != NULL) {
*LbaAddress = FwhInstance->FvBase + Offset;
}
@ -224,16 +219,16 @@ FvbGetLbaAddress (
if (NumOfBlocks != NULL) {
*NumOfBlocks = (UINTN)(NextLba - Lba);
}
return EFI_SUCCESS;
}
StartLba = NextLba;
Offset = Offset + NumBlocks * BlockLength;
StartLba = NextLba;
Offset = Offset + NumBlocks * BlockLength;
BlockMap++;
}
}
/**
Reads specified number of bytes into a buffer from the specified block
@ -261,55 +256,55 @@ FvbGetLbaAddress (
STATIC
EFI_STATUS
FvbReadBlock (
IN UINTN Instance,
IN EFI_LBA Lba,
IN UINTN BlockOffset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
IN UINTN Instance,
IN EFI_LBA Lba,
IN UINTN BlockOffset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
)
{
EFI_FVB_ATTRIBUTES_2 Attributes;
UINTN LbaAddress;
UINTN LbaLength;
EFI_STATUS Status;
EFI_STATUS ReadStatus;
EFI_FVB_ATTRIBUTES_2 Attributes;
UINTN LbaAddress;
UINTN LbaLength;
EFI_STATUS Status;
EFI_STATUS ReadStatus;
if ( (NumBytes == NULL) || (Buffer == NULL)) {
if ((NumBytes == NULL) || (Buffer == NULL)) {
return (EFI_INVALID_PARAMETER);
}
if (*NumBytes == 0) {
return (EFI_INVALID_PARAMETER);
}
Status = FvbGetLbaAddress (Instance, Lba, &LbaAddress, &LbaLength, NULL);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
Attributes = FvbGetVolumeAttributes (Instance);
if ( (Attributes & EFI_FVB2_READ_STATUS) == 0) {
if ((Attributes & EFI_FVB2_READ_STATUS) == 0) {
return (EFI_ACCESS_DENIED);
}
if (BlockOffset > LbaLength) {
return (EFI_INVALID_PARAMETER);
return (EFI_INVALID_PARAMETER);
}
if (LbaLength < ( *NumBytes + BlockOffset ) ) {
*NumBytes = (UINT32) (LbaLength - BlockOffset);
Status = EFI_BAD_BUFFER_SIZE;
if (LbaLength < (*NumBytes + BlockOffset)) {
*NumBytes = (UINT32)(LbaLength - BlockOffset);
Status = EFI_BAD_BUFFER_SIZE;
}
ReadStatus = LibFvbFlashDeviceRead (LbaAddress + BlockOffset, NumBytes, Buffer);
if (EFI_ERROR(ReadStatus)) {
if (EFI_ERROR (ReadStatus)) {
return ReadStatus;
}
return Status;
}
/**
Writes specified number of bytes from the input buffer to the block
@ -333,27 +328,28 @@ FvbReadBlock (
**/
EFI_STATUS
FvbWriteBlock (
IN UINTN Instance,
IN EFI_LBA Lba,
IN UINTN BlockOffset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
IN UINTN Instance,
IN EFI_LBA Lba,
IN UINTN BlockOffset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
)
{
EFI_FVB_ATTRIBUTES_2 Attributes;
UINTN LbaAddress;
UINTN LbaLength;
EFI_STATUS Status;
EFI_FVB_ATTRIBUTES_2 Attributes;
UINTN LbaAddress;
UINTN LbaLength;
EFI_STATUS Status;
if ( (NumBytes == NULL) || (Buffer == NULL)) {
if ((NumBytes == NULL) || (Buffer == NULL)) {
return (EFI_INVALID_PARAMETER);
}
if (*NumBytes == 0) {
return (EFI_INVALID_PARAMETER);
}
Status = FvbGetLbaAddress (Instance, Lba, &LbaAddress, &LbaLength, NULL);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
@ -361,7 +357,7 @@ FvbWriteBlock (
// Check if the FV is write enabled
//
Attributes = FvbGetVolumeAttributes (Instance);
if ( (Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
return EFI_ACCESS_DENIED;
}
@ -372,11 +368,14 @@ FvbWriteBlock (
return EFI_INVALID_PARAMETER;
}
if ( LbaLength < ( *NumBytes + BlockOffset ) ) {
DEBUG ((DEBUG_ERROR,
if ( LbaLength < (*NumBytes + BlockOffset)) {
DEBUG ((
DEBUG_ERROR,
"FvWriteBlock: Reducing Numbytes from 0x%x to 0x%x\n",
*NumBytes, (UINT32)(LbaLength - BlockOffset)));
*NumBytes = (UINT32) (LbaLength - BlockOffset);
*NumBytes,
(UINT32)(LbaLength - BlockOffset)
));
*NumBytes = (UINT32)(LbaLength - BlockOffset);
return EFI_BAD_BUFFER_SIZE;
}
@ -384,11 +383,10 @@ FvbWriteBlock (
Status = LibFvbFlashDeviceWrite (LbaAddress + BlockOffset, NumBytes, Buffer);
LibFvbFlashDeviceBlockLock (LbaAddress, LbaLength, TRUE);
WriteBackInvalidateDataCacheRange ((VOID *) (LbaAddress + BlockOffset), *NumBytes);
WriteBackInvalidateDataCacheRange ((VOID *)(LbaAddress + BlockOffset), *NumBytes);
return Status;
}
/**
Erases and initializes a firmware volume block
@ -405,22 +403,21 @@ FvbWriteBlock (
**/
EFI_STATUS
FvbEraseBlock (
IN UINTN Instance,
IN EFI_LBA Lba
IN UINTN Instance,
IN EFI_LBA Lba
)
{
EFI_FVB_ATTRIBUTES_2 Attributes;
UINTN LbaAddress;
UINTN LbaLength;
EFI_STATUS Status;
EFI_FVB_ATTRIBUTES_2 Attributes;
UINTN LbaAddress;
UINTN LbaLength;
EFI_STATUS Status;
//
// Check if the FV is write enabled
//
Attributes = FvbGetVolumeAttributes (Instance);
if( (Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
if ((Attributes & EFI_FVB2_WRITE_STATUS) == 0) {
return (EFI_ACCESS_DENIED);
}
@ -428,7 +425,7 @@ FvbEraseBlock (
// Get the starting address of the block for erase.
//
Status = FvbGetLbaAddress (Instance, Lba, &LbaAddress, &LbaLength, NULL);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
@ -438,7 +435,7 @@ FvbEraseBlock (
LibFvbFlashDeviceBlockLock (LbaAddress, LbaLength, TRUE);
WriteBackInvalidateDataCacheRange ((VOID *) LbaAddress, LbaLength);
WriteBackInvalidateDataCacheRange ((VOID *)LbaAddress, LbaLength);
return Status;
}
@ -464,17 +461,17 @@ FvbEraseBlock (
STATIC
EFI_STATUS
FvbSetVolumeAttributes (
IN UINTN Instance,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
IN UINTN Instance,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
)
{
EFI_FW_VOL_INSTANCE *FwhInstance;
EFI_FVB_ATTRIBUTES_2 OldAttributes;
EFI_FVB_ATTRIBUTES_2 *AttribPtr;
EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;
UINT32 Capabilities;
UINT32 OldStatus;
UINT32 NewStatus;
EFI_FW_VOL_INSTANCE *FwhInstance;
EFI_FVB_ATTRIBUTES_2 OldAttributes;
EFI_FVB_ATTRIBUTES_2 *AttribPtr;
EFI_FVB_ATTRIBUTES_2 UnchangedAttributes;
UINT32 Capabilities;
UINT32 OldStatus;
UINT32 NewStatus;
//
// Find the right instance of the FVB private data
@ -484,7 +481,7 @@ FvbSetVolumeAttributes (
return EFI_INVALID_PARAMETER;
}
AttribPtr = (EFI_FVB_ATTRIBUTES_2 *) &(FwhInstance->VolumeHeader.Attributes);
AttribPtr = (EFI_FVB_ATTRIBUTES_2 *)&(FwhInstance->VolumeHeader.Attributes);
ASSERT (AttribPtr != NULL);
if ( AttribPtr == NULL) {
return EFI_INVALID_PARAMETER;
@ -575,7 +572,6 @@ FvbSetVolumeAttributes (
return EFI_SUCCESS;
}
/**
Retrieves the physical address of the device.
@ -589,15 +585,15 @@ FvbSetVolumeAttributes (
EFI_STATUS
EFIAPI
FvbProtocolGetPhysicalAddress (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_PHYSICAL_ADDRESS *Address
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_PHYSICAL_ADDRESS *Address
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FW_VOL_INSTANCE *FwhInstance;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FW_VOL_INSTANCE *FwhInstance;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
FwhInstance = GetFvbInstance(FvbDevice->Instance);
FwhInstance = GetFvbInstance (FvbDevice->Instance);
if (FwhInstance == NULL) {
return EFI_INVALID_PARAMETER;
}
@ -606,8 +602,6 @@ FvbProtocolGetPhysicalAddress (
return EFI_SUCCESS;
}
/**
Retrieve the size of a logical block
@ -626,19 +620,18 @@ FvbProtocolGetPhysicalAddress (
EFI_STATUS
EFIAPI
FvbProtocolGetBlockSize (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
OUT UINTN *BlockSize,
OUT UINTN *NumOfBlocks
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
OUT UINTN *BlockSize,
OUT UINTN *NumOfBlocks
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
return FvbGetLbaAddress (FvbDevice->Instance, Lba, NULL, BlockSize, NumOfBlocks);
}
/**
Retrieves Volume attributes. No polarity translations are done.
@ -651,19 +644,18 @@ FvbProtocolGetBlockSize (
EFI_STATUS
EFIAPI
FvbProtocolGetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_FVB_ATTRIBUTES_2 *Attributes
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_FVB_ATTRIBUTES_2 *Attributes
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
FvbDevice = FVB_DEVICE_FROM_THIS (This);
*Attributes = FvbGetVolumeAttributes (FvbDevice->Instance);
return EFI_SUCCESS;
}
/**
Sets Volume attributes. No polarity translations are done.
@ -676,20 +668,18 @@ FvbProtocolGetAttributes (
EFI_STATUS
EFIAPI
FvbProtocolSetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
)
{
EFI_STATUS Status;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_STATUS Status;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
Status = FvbSetVolumeAttributes (FvbDevice->Instance, Attributes);
return Status;
}
/**
This function erases one or more blocks as denoted by the
variable argument list. The entire parameter list of blocks must be verified
@ -712,20 +702,20 @@ FvbProtocolSetAttributes (
EFI_STATUS
EFIAPI
FvbProtocolEraseBlocks (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
...
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FW_VOL_INSTANCE *FwhInstance;
UINTN NumOfBlocks;
VA_LIST args;
EFI_LBA StartingLba;
UINTN NumOfLba;
EFI_STATUS Status;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FW_VOL_INSTANCE *FwhInstance;
UINTN NumOfBlocks;
VA_LIST args;
EFI_LBA StartingLba;
UINTN NumOfLba;
EFI_STATUS Status;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
FwhInstance = GetFvbInstance (FvbDevice->Instance);
FvbDevice = FVB_DEVICE_FROM_THIS (This);
FwhInstance = GetFvbInstance (FvbDevice->Instance);
if (FwhInstance == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@ -749,10 +739,10 @@ FvbProtocolEraseBlocks (
return EFI_INVALID_PARAMETER;
}
if ( ( StartingLba + NumOfLba ) > NumOfBlocks ) {
if ((StartingLba + NumOfLba) > NumOfBlocks ) {
return EFI_INVALID_PARAMETER;
}
} while ( 1 );
} while (1);
VA_END (args);
@ -767,22 +757,21 @@ FvbProtocolEraseBlocks (
while ( NumOfLba > 0 ) {
Status = FvbEraseBlock (FvbDevice->Instance, StartingLba);
if ( EFI_ERROR(Status)) {
if ( EFI_ERROR (Status)) {
VA_END (args);
return Status;
}
StartingLba++;
NumOfLba--;
}
} while ( 1 );
} while (1);
VA_END (args);
return EFI_SUCCESS;
}
/**
Writes data beginning at Lba:Offset from FV. The write terminates either
when *NumBytes of data have been written, or when a block boundary is
@ -811,26 +800,31 @@ FvbProtocolEraseBlocks (
EFI_STATUS
EFIAPI
FvbProtocolWrite (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_STATUS Status;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_STATUS Status;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
Status = FvbWriteBlock (FvbDevice->Instance, Lba, Offset, NumBytes, Buffer);
DEBUG((DEBUG_VERBOSE,
DEBUG ((
DEBUG_VERBOSE,
"FvbWrite: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x Status:%r\n",
Lba, Offset, *NumBytes, Buffer, Status));
Lba,
Offset,
*NumBytes,
Buffer,
Status
));
return Status;
}
/**
Reads data beginning at Lba:Offset from FV. The Read terminates either
when *NumBytes of data have been read, or when a block boundary is
@ -862,22 +856,27 @@ Returns:
EFI_STATUS
EFIAPI
FvbProtocolRead (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_STATUS Status;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_STATUS Status;
FvbDevice = FVB_DEVICE_FROM_THIS (This);
Status = FvbReadBlock (FvbDevice->Instance, Lba, Offset, NumBytes, Buffer);
DEBUG((DEBUG_VERBOSE,
DEBUG ((
DEBUG_VERBOSE,
"FvbRead: Lba: 0x%lx Offset: 0x%x NumBytes: 0x%x, Buffer: 0x%x, Status:%r\n",
Lba, Offset, *NumBytes, Buffer, Status));
Lba,
Offset,
*NumBytes,
Buffer,
Status
));
return Status;
}
@ -893,44 +892,44 @@ FvbProtocolRead (
**/
BOOLEAN
IsFvHeaderValid (
IN EFI_PHYSICAL_ADDRESS FvBase
IN EFI_PHYSICAL_ADDRESS FvBase
)
{
UINT16 Sum;
EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;
UINT16 Sum;
EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;
FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) FvBase;
if (FvBase == PcdGet32(PcdFlashNvStorageVariableBase)) {
if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, sizeof(EFI_GUID)) != 0 ) {
DEBUG((DEBUG_INFO, " --FileSystemGuid not match: %g\n", &FwVolHeader->FileSystemGuid));
FwVolHeader = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)FvBase;
if (FvBase == PcdGet32 (PcdFlashNvStorageVariableBase)) {
if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid, sizeof (EFI_GUID)) != 0 ) {
DEBUG ((DEBUG_INFO, " --FileSystemGuid not match: %g\n", &FwVolHeader->FileSystemGuid));
return FALSE;
}
} else {
if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
DEBUG((DEBUG_INFO, " --not expected guid.\n"));
if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof (EFI_GUID)) != 0 ) {
DEBUG ((DEBUG_INFO, " --not expected guid.\n"));
return FALSE;
}
}
if ( (FwVolHeader->Revision != EFI_FVH_REVISION) ||
(FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||
(FwVolHeader->FvLength == ((UINTN) -1)) ||
((FwVolHeader->HeaderLength & 0x01 ) !=0) ) {
DEBUG((DEBUG_INFO, " -- >Revision = 0x%x, Signature = 0x%x\n", FwVolHeader->Revision, FwVolHeader->Signature ));
DEBUG((DEBUG_INFO, " -- >FvLength = 0x%lx, HeaderLength = 0x%x\n", FwVolHeader->FvLength, FwVolHeader->HeaderLength ));
if ((FwVolHeader->Revision != EFI_FVH_REVISION) ||
(FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||
(FwVolHeader->FvLength == ((UINTN)-1)) ||
((FwVolHeader->HeaderLength & 0x01) != 0))
{
DEBUG ((DEBUG_INFO, " -- >Revision = 0x%x, Signature = 0x%x\n", FwVolHeader->Revision, FwVolHeader->Signature));
DEBUG ((DEBUG_INFO, " -- >FvLength = 0x%lx, HeaderLength = 0x%x\n", FwVolHeader->FvLength, FwVolHeader->HeaderLength));
return FALSE;
}
Sum = CalculateSum16 ((UINT16 *) FwVolHeader, FwVolHeader->HeaderLength);
Sum = CalculateSum16 ((UINT16 *)FwVolHeader, FwVolHeader->HeaderLength);
if (Sum != 0) {
DEBUG((DEBUG_INFO, "error: checksum: 0x%04X (expect 0x0)\n", Sum));
DEBUG ((DEBUG_INFO, "error: checksum: 0x%04X (expect 0x0)\n", Sum));
return FALSE;
}
return TRUE;
}
/**
Get intial variable data.
@ -944,8 +943,8 @@ IsFvHeaderValid (
**/
EFI_STATUS
GetInitialVariableData (
OUT VOID **VarData,
OUT UINTN *VarSize
OUT VOID **VarData,
OUT UINTN *VarSize
)
{
EFI_STATUS Status;
@ -961,22 +960,23 @@ GetInitialVariableData (
return EFI_INVALID_PARAMETER;
}
Status = GetSectionFromAnyFv (PcdGetPtr(PcdNvsDataFile), EFI_SECTION_RAW, 0, &ImageData, &ImageSize);
Status = GetSectionFromAnyFv (PcdGetPtr (PcdNvsDataFile), EFI_SECTION_RAW, 0, &ImageData, &ImageSize);
if (EFI_ERROR (Status)) {
return Status;
}
FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) ImageData;
VariableStore = (VARIABLE_STORE_HEADER *) ((UINT8 *)ImageData + FvHeader->HeaderLength);
FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *)ImageData;
VariableStore = (VARIABLE_STORE_HEADER *)((UINT8 *)ImageData + FvHeader->HeaderLength);
VarEndAddr = (UINTN)VariableStore + VariableStore->Size;
Variable = (AUTHENTICATED_VARIABLE_HEADER *) HEADER_ALIGN (VariableStore + 1);
Variable = (AUTHENTICATED_VARIABLE_HEADER *)HEADER_ALIGN (VariableStore + 1);
*VarData = (VOID *)Variable;
while (((UINTN)Variable < VarEndAddr)) {
if (Variable->StartId != VARIABLE_DATA) {
break;
}
VariableSize = sizeof (AUTHENTICATED_VARIABLE_HEADER) + Variable->DataSize + Variable->NameSize;
Variable = (AUTHENTICATED_VARIABLE_HEADER *) HEADER_ALIGN ((UINTN) Variable + VariableSize);
Variable = (AUTHENTICATED_VARIABLE_HEADER *)HEADER_ALIGN ((UINTN)Variable + VariableSize);
}
*VarSize = (UINTN)Variable - HEADER_ALIGN (VariableStore + 1);
@ -997,20 +997,20 @@ FvbInitialize (
VOID
)
{
EFI_FW_VOL_INSTANCE *FwVolInstance;
EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
EFI_PHYSICAL_ADDRESS BaseAddress;
UINTN WriteAddr;
EFI_STATUS Status;
UINTN BufferSize;
UINTN Length;
VARIABLE_STORE_HEADER VariableStore;
VOID *VarData;
EFI_FW_VOL_INSTANCE *FwVolInstance;
EFI_FIRMWARE_VOLUME_HEADER *FvHeader;
EFI_FV_BLOCK_MAP_ENTRY *BlockMap;
EFI_PHYSICAL_ADDRESS BaseAddress;
UINTN WriteAddr;
EFI_STATUS Status;
UINTN BufferSize;
UINTN Length;
VARIABLE_STORE_HEADER VariableStore;
VOID *VarData;
InitVariableStore ();
BaseAddress = PcdGet32(PcdFlashNvStorageVariableBase);
FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) BaseAddress;
BaseAddress = PcdGet32 (PcdFlashNvStorageVariableBase);
FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)BaseAddress;
//
// Check FV header and variable store header
@ -1024,47 +1024,48 @@ FvbInitialize (
LibFvbFlashDeviceBlockLock ((UINTN)BaseAddress, FvHeader->BlockMap->Length, FALSE);
Status = LibFvbFlashDeviceBlockErase ((UINTN)BaseAddress, FvHeader->BlockMap->Length);
ASSERT_EFI_ERROR(Status);
ASSERT_EFI_ERROR (Status);
Length = FvHeader->HeaderLength;
WriteAddr = (UINTN)BaseAddress;
Status = LibFvbFlashDeviceWrite (WriteAddr, &Length, (UINT8 *) FvHeader);
Length = FvHeader->HeaderLength;
WriteAddr = (UINTN)BaseAddress;
Status = LibFvbFlashDeviceWrite (WriteAddr, &Length, (UINT8 *)FvHeader);
WriteAddr += Length;
ASSERT_EFI_ERROR(Status);
ASSERT_EFI_ERROR (Status);
//
// Write back variable store header
//
VariableStore.Size = PcdGet32(PcdFlashNvStorageVariableSize) - FvHeader->HeaderLength;
VariableStore.Size = PcdGet32 (PcdFlashNvStorageVariableSize) - FvHeader->HeaderLength;
VariableStore.Format = VARIABLE_STORE_FORMATTED;
VariableStore.State = VARIABLE_STORE_HEALTHY;
CopyGuid (&VariableStore.Signature, &gEfiAuthenticatedVariableGuid);
BufferSize = sizeof (VARIABLE_STORE_HEADER);
Status = LibFvbFlashDeviceWrite (WriteAddr, &BufferSize, (UINT8 *) &VariableStore);
Status = LibFvbFlashDeviceWrite (WriteAddr, &BufferSize, (UINT8 *)&VariableStore);
WriteAddr += BufferSize;
ASSERT_EFI_ERROR(Status);
ASSERT_EFI_ERROR (Status);
//
// Write initial variable data if found
//
Status = GetInitialVariableData (&VarData, &Length);
if (!EFI_ERROR (Status)) {
Status = LibFvbFlashDeviceWrite (WriteAddr, &Length, (UINT8 *) VarData);
ASSERT_EFI_ERROR(Status);
Status = LibFvbFlashDeviceWrite (WriteAddr, &Length, (UINT8 *)VarData);
ASSERT_EFI_ERROR (Status);
}
LibFvbFlashDeviceBlockLock ((UINTN)BaseAddress, FvHeader->BlockMap->Length, TRUE);
WriteBackInvalidateDataCacheRange ((VOID *) (UINTN) BaseAddress, FvHeader->BlockMap->Length);
WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)BaseAddress, FvHeader->BlockMap->Length);
}
//
// Create a new FW volume instance for NVS variable
//
BufferSize = FvHeader->HeaderLength + sizeof (EFI_FW_VOL_INSTANCE) - sizeof (EFI_FIRMWARE_VOLUME_HEADER);
FwVolInstance = (EFI_FW_VOL_INSTANCE *) AllocateRuntimeZeroPool (BufferSize);
FwVolInstance = (EFI_FW_VOL_INSTANCE *)AllocateRuntimeZeroPool (BufferSize);
if (FwVolInstance == NULL) {
return EFI_OUT_OF_RESOURCES;
}
FwVolInstance->FvBase = (UINTN)BaseAddress;
CopyMem (&FwVolInstance->VolumeHeader, FvHeader, FvHeader->HeaderLength);
@ -1072,7 +1073,7 @@ FvbInitialize (
// Process the block map for each FV. Assume it has same block size.
//
FwVolInstance->NumOfBlocks = 0;
FvHeader = &FwVolInstance->VolumeHeader;
FvHeader = &FwVolInstance->VolumeHeader;
for (BlockMap = FvHeader->BlockMap; BlockMap->NumBlocks != 0; BlockMap++) {
FwVolInstance->NumOfBlocks += BlockMap->NumBlocks;
}

80
UefiPayloadPkg/FvbRuntimeDxe/FvbService.h
View File

@ -36,43 +36,41 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// Define two helper macro to extract the Capability field or Status field in FVB
// bit fields
//
#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \
#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP |\
EFI_FVB2_READ_ENABLED_CAP | \
EFI_FVB2_WRITE_DISABLED_CAP | \
EFI_FVB2_WRITE_ENABLED_CAP | \
EFI_FVB2_LOCK_CAP \
)
#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_STATUS | EFI_FVB2_LOCK_STATUS)
typedef struct {
UINTN FvBase;
UINTN NumOfBlocks;
UINTN FvBase;
UINTN NumOfBlocks;
//
// Note!!!: VolumeHeader must be the last element
// of the structure.
//
EFI_FIRMWARE_VOLUME_HEADER VolumeHeader;
EFI_FIRMWARE_VOLUME_HEADER VolumeHeader;
} EFI_FW_VOL_INSTANCE;
typedef struct {
EFI_FW_VOL_INSTANCE *FvInstance;
UINT32 NumFv;
UINT32 Flags;
EFI_FW_VOL_INSTANCE *FvInstance;
UINT32 NumFv;
UINT32 Flags;
} FWB_GLOBAL;
//
// Fvb Protocol instance data
//
#define FVB_DEVICE_FROM_THIS(a) CR(a, EFI_FW_VOL_BLOCK_DEVICE, FwVolBlockInstance, FVB_DEVICE_SIGNATURE)
#define FVB_EXTEND_DEVICE_FROM_THIS(a) CR(a, EFI_FW_VOL_BLOCK_DEVICE, FvbExtension, FVB_DEVICE_SIGNATURE)
#define FVB_DEVICE_SIGNATURE SIGNATURE_32('F','V','B','C')
#define FVB_DEVICE_FROM_THIS(a) CR(a, EFI_FW_VOL_BLOCK_DEVICE, FwVolBlockInstance, FVB_DEVICE_SIGNATURE)
#define FVB_EXTEND_DEVICE_FROM_THIS(a) CR(a, EFI_FW_VOL_BLOCK_DEVICE, FvbExtension, FVB_DEVICE_SIGNATURE)
#define FVB_DEVICE_SIGNATURE SIGNATURE_32('F','V','B','C')
typedef struct {
MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
EFI_DEVICE_PATH_PROTOCOL EndDevPath;
MEDIA_FW_VOL_DEVICE_PATH FvDevPath;
EFI_DEVICE_PATH_PROTOCOL EndDevPath;
} FV_PIWG_DEVICE_PATH;
typedef struct {
@ -109,69 +107,69 @@ InitVariableStore (
EFI_STATUS
EFIAPI
FvbProtocolGetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_FVB_ATTRIBUTES_2 *Attributes
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_FVB_ATTRIBUTES_2 *Attributes
);
EFI_STATUS
EFIAPI
FvbProtocolSetAttributes (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes
);
EFI_STATUS
EFIAPI
FvbProtocolGetPhysicalAddress (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
OUT EFI_PHYSICAL_ADDRESS *Address
OUT EFI_PHYSICAL_ADDRESS *Address
);
EFI_STATUS
EFIAPI
FvbProtocolGetBlockSize (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
OUT UINTN *BlockSize,
OUT UINTN *NumOfBlocks
IN EFI_LBA Lba,
OUT UINTN *BlockSize,
OUT UINTN *NumOfBlocks
);
EFI_STATUS
EFIAPI
FvbProtocolRead (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
);
EFI_STATUS
EFIAPI
FvbProtocolWrite (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN EFI_LBA Lba,
IN UINTN Offset,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
);
EFI_STATUS
EFIAPI
FvbProtocolEraseBlocks (
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
IN CONST EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
...
);
EFI_FW_VOL_INSTANCE *
GetFvbInstance (
IN UINTN Instance
IN UINTN Instance
);
EFI_STATUS
InstallFvbProtocol (
IN EFI_FW_VOL_INSTANCE *FwhInstance,
IN UINTN InstanceNum
IN EFI_FW_VOL_INSTANCE *FwhInstance,
IN UINTN InstanceNum
);
EFI_STATUS
@ -179,9 +177,9 @@ FvbInitialize (
VOID
);
extern FWB_GLOBAL mFvbModuleGlobal;
extern EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate;
extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate;
extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;
extern FWB_GLOBAL mFvbModuleGlobal;
extern EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate;
extern FV_MEMMAP_DEVICE_PATH mFvMemmapDevicePathTemplate;
extern FV_PIWG_DEVICE_PATH mFvPIWGDevicePathTemplate;
#endif

64
UefiPayloadPkg/FvbRuntimeDxe/FvbServiceSmm.c
View File

@ -26,21 +26,21 @@
**/
EFI_STATUS
InstallFvbProtocol (
IN EFI_FW_VOL_INSTANCE *FwhInstance,
IN UINTN InstanceNum
IN EFI_FW_VOL_INSTANCE *FwhInstance,
IN UINTN InstanceNum
)
{
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;
EFI_STATUS Status;
EFI_HANDLE FvbHandle;
FV_MEMMAP_DEVICE_PATH *FvDevicePath;
VOID *TempPtr;
EFI_FW_VOL_BLOCK_DEVICE *FvbDevice;
EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader;
EFI_STATUS Status;
EFI_HANDLE FvbHandle;
FV_MEMMAP_DEVICE_PATH *FvDevicePath;
VOID *TempPtr;
FvbDevice = (EFI_FW_VOL_BLOCK_DEVICE *) AllocateRuntimeCopyPool (
sizeof (EFI_FW_VOL_BLOCK_DEVICE),
&mFvbDeviceTemplate
);
FvbDevice = (EFI_FW_VOL_BLOCK_DEVICE *)AllocateRuntimeCopyPool (
sizeof (EFI_FW_VOL_BLOCK_DEVICE),
&mFvbDeviceTemplate
);
if (FvbDevice == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@ -55,18 +55,19 @@ InstallFvbProtocol (
//
// FV does not contains extension header, then produce MEMMAP_DEVICE_PATH
//
TempPtr = AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) TempPtr;
TempPtr = AllocateRuntimeCopyPool (sizeof (FV_MEMMAP_DEVICE_PATH), &mFvMemmapDevicePathTemplate);
FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)TempPtr;
if (FvbDevice->DevicePath == NULL) {
ASSERT (FALSE);
return EFI_OUT_OF_RESOURCES;
}
FvDevicePath = (FV_MEMMAP_DEVICE_PATH *) FvbDevice->DevicePath;
FvDevicePath = (FV_MEMMAP_DEVICE_PATH *)FvbDevice->DevicePath;
FvDevicePath->MemMapDevPath.StartingAddress = FwhInstance->FvBase;
FvDevicePath->MemMapDevPath.EndingAddress = FwhInstance->FvBase + FwVolHeader->FvLength - 1;
} else {
TempPtr = AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);
FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *) TempPtr;
TempPtr = AllocateRuntimeCopyPool (sizeof (FV_PIWG_DEVICE_PATH), &mFvPIWGDevicePathTemplate);
FvbDevice->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)TempPtr;
if (FvbDevice->DevicePath == NULL) {
ASSERT (FALSE);
return EFI_OUT_OF_RESOURCES;
@ -82,12 +83,12 @@ InstallFvbProtocol (
// Install the SMM Firmware Volume Block Protocol and Device Path Protocol
//
FvbHandle = NULL;
Status = gSmst->SmmInstallProtocolInterface (
&FvbHandle,
&gEfiSmmFirmwareVolumeBlockProtocolGuid,
EFI_NATIVE_INTERFACE,
&FvbDevice->FwVolBlockInstance
);
Status = gSmst->SmmInstallProtocolInterface (
&FvbHandle,
&gEfiSmmFirmwareVolumeBlockProtocolGuid,
EFI_NATIVE_INTERFACE,
&FvbDevice->FwVolBlockInstance
);
ASSERT_EFI_ERROR (Status);
Status = gSmst->SmmInstallProtocolInterface (
@ -102,17 +103,16 @@ InstallFvbProtocol (
// Notify the Fvb wrapper driver SMM fvb is ready
//
FvbHandle = NULL;
Status = gBS->InstallProtocolInterface (
&FvbHandle,
&gEfiSmmFirmwareVolumeBlockProtocolGuid,
EFI_NATIVE_INTERFACE,
&FvbDevice->FwVolBlockInstance
);
Status = gBS->InstallProtocolInterface (
&FvbHandle,
&gEfiSmmFirmwareVolumeBlockProtocolGuid,
EFI_NATIVE_INTERFACE,
&FvbDevice->FwVolBlockInstance
);
return Status;
}
/**
The driver entry point for SMM Firmware Volume Block Driver.
@ -129,8 +129,8 @@ InstallFvbProtocol (
EFI_STATUS
EFIAPI
FvbSmmInitialize (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
FvbInitialize ();

51
UefiPayloadPkg/FvbRuntimeDxe/FvbSmmCommon.h
View File

@ -11,21 +11,20 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Protocol/SmmFirmwareVolumeBlock.h>
#define EFI_FUNCTION_GET_ATTRIBUTES 1
#define EFI_FUNCTION_SET_ATTRIBUTES 2
#define EFI_FUNCTION_GET_PHYSICAL_ADDRESS 3
#define EFI_FUNCTION_GET_BLOCK_SIZE 4
#define EFI_FUNCTION_READ 5
#define EFI_FUNCTION_WRITE 6
#define EFI_FUNCTION_ERASE_BLOCKS 7
#define EFI_FUNCTION_GET_ATTRIBUTES 1
#define EFI_FUNCTION_SET_ATTRIBUTES 2
#define EFI_FUNCTION_GET_PHYSICAL_ADDRESS 3
#define EFI_FUNCTION_GET_BLOCK_SIZE 4
#define EFI_FUNCTION_READ 5
#define EFI_FUNCTION_WRITE 6
#define EFI_FUNCTION_ERASE_BLOCKS 7
typedef struct {
UINTN Function;
EFI_STATUS ReturnStatus;
UINT8 Data[1];
UINTN Function;
EFI_STATUS ReturnStatus;
UINT8 Data[1];
} SMM_FVB_COMMUNICATE_FUNCTION_HEADER;
///
/// Size of SMM communicate header, without including the payload.
///
@ -37,33 +36,33 @@ typedef struct {
#define SMM_FVB_COMMUNICATE_HEADER_SIZE (OFFSET_OF (SMM_FVB_COMMUNICATE_FUNCTION_HEADER, Data))
typedef struct {
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_FVB_ATTRIBUTES_2 Attributes;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_FVB_ATTRIBUTES_2 Attributes;
} SMM_FVB_ATTRIBUTES_HEADER;
typedef struct {
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_PHYSICAL_ADDRESS Address;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_PHYSICAL_ADDRESS Address;
} SMM_FVB_PHYSICAL_ADDRESS_HEADER;
typedef struct {
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_LBA Lba;
UINTN BlockSize;
UINTN NumOfBlocks;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_LBA Lba;
UINTN BlockSize;
UINTN NumOfBlocks;
} SMM_FVB_BLOCK_SIZE_HEADER;
typedef struct {
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_LBA Lba;
UINTN Offset;
UINTN NumBytes;
EFI_SMM_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_LBA Lba;
UINTN Offset;
UINTN NumBytes;
} SMM_FVB_READ_WRITE_HEADER;
typedef struct {
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_LBA StartLba;
UINTN NumOfLba;
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *SmmFvb;
EFI_LBA StartLba;
UINTN NumOfLba;
} SMM_FVB_BLOCKS_HEADER;
#endif

24
UefiPayloadPkg/GraphicsOutputDxe/ComponentName.c
View File

@ -10,14 +10,14 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <PiDxe.h>
#include <Library/UefiLib.h>
extern EFI_COMPONENT_NAME_PROTOCOL mGraphicsOutputComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2;
extern EFI_COMPONENT_NAME_PROTOCOL mGraphicsOutputComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2;
//
// Driver name table for GraphicsOutput module.
// It is shared by the implementation of ComponentName & ComponentName2 Protocol.
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mGraphicsOutputDriverNameTable[] = {
GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mGraphicsOutputDriverNameTable[] = {
{
"eng;en",
L"Generic Graphics Output Driver"
@ -80,7 +80,7 @@ GraphicsOutputComponentNameGetDriverName (
This->SupportedLanguages,
mGraphicsOutputDriverNameTable,
DriverName,
(BOOLEAN) (This == &mGraphicsOutputComponentName)
(BOOLEAN)(This == &mGraphicsOutputComponentName)
);
}
@ -155,11 +155,11 @@ GraphicsOutputComponentNameGetDriverName (
EFI_STATUS
EFIAPI
GraphicsOutputComponentNameGetControllerName (
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
IN EFI_COMPONENT_NAME_PROTOCOL *This,
IN EFI_HANDLE ControllerHandle,
IN EFI_HANDLE ChildHandle OPTIONAL,
IN CHAR8 *Language,
OUT CHAR16 **ControllerName
)
{
return EFI_UNSUPPORTED;
@ -177,8 +177,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL mGraphicsOutputCompon
//
// EFI Component Name 2 Protocol
//
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME) GraphicsOutputComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) GraphicsOutputComponentNameGetControllerName,
GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2 = {
(EFI_COMPONENT_NAME2_GET_DRIVER_NAME)GraphicsOutputComponentNameGetDriverName,
(EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)GraphicsOutputComponentNameGetControllerName,
"en"
};

250
UefiPayloadPkg/GraphicsOutputDxe/GraphicsOutput.c
View File

@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "GraphicsOutput.h"
CONST ACPI_ADR_DEVICE_PATH mGraphicsOutputAdrNode = {
CONST ACPI_ADR_DEVICE_PATH mGraphicsOutputAdrNode = {
{
ACPI_DEVICE_PATH,
ACPI_ADR_DP,
@ -17,7 +17,7 @@ CONST ACPI_ADR_DEVICE_PATH mGraphicsOutputAdrNode = {
ACPI_DISPLAY_ADR (1, 0, 0, 1, 0, ACPI_ADR_DISPLAY_TYPE_VGA, 0, 0)
};
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB mDefaultGraphicsDeviceInfo = {
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB mDefaultGraphicsDeviceInfo = {
MAX_UINT16, MAX_UINT16, MAX_UINT16, MAX_UINT16, MAX_UINT8, MAX_UINT8
};
@ -25,7 +25,7 @@ EFI_PEI_GRAPHICS_DEVICE_INFO_HOB mDefaultGraphicsDeviceInfo = {
// The driver should only start on one graphics controller.
// So a global flag is used to remember that the driver is already started.
//
BOOLEAN mDriverStarted = FALSE;
BOOLEAN mDriverStarted = FALSE;
/**
Returns information for an available graphics mode that the graphics device
@ -50,7 +50,7 @@ GraphicsOutputQueryMode (
OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info
)
{
if (This == NULL || Info == NULL || SizeOfInfo == NULL || ModeNumber >= This->Mode->MaxMode) {
if ((This == NULL) || (Info == NULL) || (SizeOfInfo == NULL) || (ModeNumber >= This->Mode->MaxMode)) {
return EFI_INVALID_PARAMETER;
}
@ -74,13 +74,13 @@ GraphicsOutputQueryMode (
EFI_STATUS
EFIAPI
GraphicsOutputSetMode (
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
IN UINT32 ModeNumber
)
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
IN UINT32 ModeNumber
)
{
RETURN_STATUS Status;
EFI_GRAPHICS_OUTPUT_BLT_PIXEL Black;
GRAPHICS_OUTPUT_PRIVATE_DATA *Private;
RETURN_STATUS Status;
EFI_GRAPHICS_OUTPUT_BLT_PIXEL Black;
GRAPHICS_OUTPUT_PRIVATE_DATA *Private;
if (ModeNumber >= This->Mode->MaxMode) {
return EFI_UNSUPPORTED;
@ -88,17 +88,19 @@ GraphicsOutputSetMode (
Private = GRAPHICS_OUTPUT_PRIVATE_FROM_THIS (This);
Black.Blue = 0;
Black.Green = 0;
Black.Red = 0;
Black.Blue = 0;
Black.Green = 0;
Black.Red = 0;
Black.Reserved = 0;
Status = FrameBufferBlt (
Private->FrameBufferBltLibConfigure,
&Black,
EfiBltVideoFill,
0, 0,
0, 0,
0,
0,
0,
0,
This->Mode->Info->HorizontalResolution,
This->Mode->Info->VerticalResolution,
0
@ -132,21 +134,21 @@ GraphicsOutputSetMode (
EFI_STATUS
EFIAPI
GraphicsOutputBlt (
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,
IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,
IN UINTN SourceX,
IN UINTN SourceY,
IN UINTN DestinationX,
IN UINTN DestinationY,
IN UINTN Width,
IN UINTN Height,
IN UINTN Delta OPTIONAL
IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer OPTIONAL,
IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,
IN UINTN SourceX,
IN UINTN SourceY,
IN UINTN DestinationX,
IN UINTN DestinationY,
IN UINTN Width,
IN UINTN Height,
IN UINTN Delta OPTIONAL
)
{
RETURN_STATUS Status;
EFI_TPL Tpl;
GRAPHICS_OUTPUT_PRIVATE_DATA *Private;
RETURN_STATUS Status;
EFI_TPL Tpl;
GRAPHICS_OUTPUT_PRIVATE_DATA *Private;
Private = GRAPHICS_OUTPUT_PRIVATE_FROM_THIS (This);
//
@ -154,13 +156,17 @@ GraphicsOutputBlt (
// We would not want a timer based event (Cursor, ...) to come in while we are
// doing this operation.
//
Tpl = gBS->RaiseTPL (TPL_NOTIFY);
Tpl = gBS->RaiseTPL (TPL_NOTIFY);
Status = FrameBufferBlt (
Private->FrameBufferBltLibConfigure,
BltBuffer,
BltOperation,
SourceX, SourceY,
DestinationX, DestinationY, Width, Height,
SourceX,
SourceY,
DestinationX,
DestinationY,
Width,
Height,
Delta
);
gBS->RestoreTPL (Tpl);
@ -168,7 +174,7 @@ GraphicsOutputBlt (
return RETURN_ERROR (Status) ? EFI_INVALID_PARAMETER : EFI_SUCCESS;
}
CONST GRAPHICS_OUTPUT_PRIVATE_DATA mGraphicsOutputInstanceTemplate = {
CONST GRAPHICS_OUTPUT_PRIVATE_DATA mGraphicsOutputInstanceTemplate = {
GRAPHICS_OUTPUT_PRIVATE_DATA_SIGNATURE, // Signature
NULL, // GraphicsOutputHandle
{
@ -206,14 +212,14 @@ CONST GRAPHICS_OUTPUT_PRIVATE_DATA mGraphicsOutputInstanceTemplate = {
EFI_STATUS
EFIAPI
GraphicsOutputDriverBindingSupported (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
//
// Since there is only one GraphicsInfo HOB, the driver only manages one video device.
@ -228,7 +234,7 @@ GraphicsOutputDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
(VOID **) &PciIo,
(VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@ -236,9 +242,11 @@ GraphicsOutputDriverBindingSupported (
if (Status == EFI_ALREADY_STARTED) {
Status = EFI_SUCCESS;
}
if (EFI_ERROR (Status)) {
return Status;
}
gBS->CloseProtocol (
Controller,
&gEfiPciIoProtocolGuid,
@ -252,7 +260,7 @@ GraphicsOutputDriverBindingSupported (
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
(VOID **) &DevicePath,
(VOID **)&DevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@ -260,9 +268,11 @@ GraphicsOutputDriverBindingSupported (
if (Status == EFI_ALREADY_STARTED) {
Status = EFI_SUCCESS;
}
if (EFI_ERROR (Status)) {
return Status;
}
gBS->CloseProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
@ -272,7 +282,8 @@ GraphicsOutputDriverBindingSupported (
if ((RemainingDevicePath == NULL) ||
IsDevicePathEnd (RemainingDevicePath) ||
CompareMem (RemainingDevicePath, &mGraphicsOutputAdrNode, sizeof (mGraphicsOutputAdrNode)) == 0) {
(CompareMem (RemainingDevicePath, &mGraphicsOutputAdrNode, sizeof (mGraphicsOutputAdrNode)) == 0))
{
return EFI_SUCCESS;
} else {
return EFI_INVALID_PARAMETER;
@ -293,29 +304,29 @@ GraphicsOutputDriverBindingSupported (
EFI_STATUS
EFIAPI
GraphicsOutputDriverBindingStart (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
EFI_STATUS Status;
RETURN_STATUS ReturnStatus;
GRAPHICS_OUTPUT_PRIVATE_DATA *Private;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_DEVICE_PATH *PciDevicePath;
PCI_TYPE00 Pci;
UINT8 Index;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Resources;
VOID *HobStart;
EFI_PEI_GRAPHICS_INFO_HOB *GraphicsInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *DeviceInfo;
EFI_PHYSICAL_ADDRESS FrameBufferBase;
EFI_STATUS Status;
RETURN_STATUS ReturnStatus;
GRAPHICS_OUTPUT_PRIVATE_DATA *Private;
EFI_PCI_IO_PROTOCOL *PciIo;
EFI_DEVICE_PATH *PciDevicePath;
PCI_TYPE00 Pci;
UINT8 Index;
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Resources;
VOID *HobStart;
EFI_PEI_GRAPHICS_INFO_HOB *GraphicsInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *DeviceInfo;
EFI_PHYSICAL_ADDRESS FrameBufferBase;
FrameBufferBase = 0;
HobStart = GetFirstGuidHob (&gEfiGraphicsInfoHobGuid);
ASSERT ((HobStart != NULL) && (GET_GUID_HOB_DATA_SIZE (HobStart) == sizeof (EFI_PEI_GRAPHICS_INFO_HOB)));
GraphicsInfo = (EFI_PEI_GRAPHICS_INFO_HOB *) (GET_GUID_HOB_DATA (HobStart));
GraphicsInfo = (EFI_PEI_GRAPHICS_INFO_HOB *)(GET_GUID_HOB_DATA (HobStart));
HobStart = GetFirstGuidHob (&gEfiGraphicsDeviceInfoHobGuid);
if ((HobStart == NULL) || (GET_GUID_HOB_DATA_SIZE (HobStart) < sizeof (*DeviceInfo))) {
@ -325,15 +336,21 @@ GraphicsOutputDriverBindingStart (
DeviceInfo = &mDefaultGraphicsDeviceInfo;
DEBUG ((DEBUG_INFO, "[%a]: GraphicsDeviceInfo HOB doesn't exist!\n", gEfiCallerBaseName));
} else {
DeviceInfo = (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *) (GET_GUID_HOB_DATA (HobStart));
DEBUG ((DEBUG_INFO, "[%a]: GraphicsDeviceInfo HOB:\n"
" VendorId = %04x, DeviceId = %04x,\n"
" RevisionId = %02x, BarIndex = %x,\n"
" SubsystemVendorId = %04x, SubsystemId = %04x\n",
gEfiCallerBaseName,
DeviceInfo->VendorId, DeviceInfo->DeviceId,
DeviceInfo->RevisionId, DeviceInfo->BarIndex,
DeviceInfo->SubsystemVendorId, DeviceInfo->SubsystemId));
DeviceInfo = (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *)(GET_GUID_HOB_DATA (HobStart));
DEBUG ((
DEBUG_INFO,
"[%a]: GraphicsDeviceInfo HOB:\n"
" VendorId = %04x, DeviceId = %04x,\n"
" RevisionId = %02x, BarIndex = %x,\n"
" SubsystemVendorId = %04x, SubsystemId = %04x\n",
gEfiCallerBaseName,
DeviceInfo->VendorId,
DeviceInfo->DeviceId,
DeviceInfo->RevisionId,
DeviceInfo->BarIndex,
DeviceInfo->SubsystemVendorId,
DeviceInfo->SubsystemId
));
}
//
@ -342,7 +359,7 @@ GraphicsOutputDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
(VOID **) &PciIo,
(VOID **)&PciIo,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@ -350,12 +367,13 @@ GraphicsOutputDriverBindingStart (
if (Status == EFI_ALREADY_STARTED) {
Status = EFI_SUCCESS;
}
ASSERT_EFI_ERROR (Status);
Status = gBS->OpenProtocol (
Controller,
&gEfiDevicePathProtocolGuid,
(VOID **) &PciDevicePath,
(VOID **)&PciDevicePath,
This->DriverBindingHandle,
Controller,
EFI_OPEN_PROTOCOL_BY_DRIVER
@ -363,6 +381,7 @@ GraphicsOutputDriverBindingStart (
if (Status == EFI_ALREADY_STARTED) {
Status = EFI_SUCCESS;
}
ASSERT_EFI_ERROR (Status);
//
@ -371,13 +390,14 @@ GraphicsOutputDriverBindingStart (
Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint8, 0, sizeof (Pci), &Pci);
if (!EFI_ERROR (Status)) {
if (!IS_PCI_DISPLAY (&Pci) || (
((DeviceInfo->VendorId != MAX_UINT16) && (DeviceInfo->VendorId != Pci.Hdr.VendorId)) ||
((DeviceInfo->DeviceId != MAX_UINT16) && (DeviceInfo->DeviceId != Pci.Hdr.DeviceId)) ||
((DeviceInfo->RevisionId != MAX_UINT8) && (DeviceInfo->RevisionId != Pci.Hdr.RevisionID)) ||
((DeviceInfo->SubsystemVendorId != MAX_UINT16) && (DeviceInfo->SubsystemVendorId != Pci.Device.SubsystemVendorID)) ||
((DeviceInfo->SubsystemId != MAX_UINT16) && (DeviceInfo->SubsystemId != Pci.Device.SubsystemID))
((DeviceInfo->VendorId != MAX_UINT16) && (DeviceInfo->VendorId != Pci.Hdr.VendorId)) ||
((DeviceInfo->DeviceId != MAX_UINT16) && (DeviceInfo->DeviceId != Pci.Hdr.DeviceId)) ||
((DeviceInfo->RevisionId != MAX_UINT8) && (DeviceInfo->RevisionId != Pci.Hdr.RevisionID)) ||
((DeviceInfo->SubsystemVendorId != MAX_UINT16) && (DeviceInfo->SubsystemVendorId != Pci.Device.SubsystemVendorID)) ||
((DeviceInfo->SubsystemId != MAX_UINT16) && (DeviceInfo->SubsystemId != Pci.Device.SubsystemID))
)
)
) {
{
//
// It's not a video device, or device infomation doesn't match.
//
@ -393,18 +413,27 @@ GraphicsOutputDriverBindingStart (
if ((DeviceInfo->BarIndex != MAX_UINT8) && (DeviceInfo->BarIndex != Index)) {
continue;
}
Status = PciIo->GetBarAttributes (PciIo, Index, NULL, (VOID**) &Resources);
Status = PciIo->GetBarAttributes (PciIo, Index, NULL, (VOID **)&Resources);
if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "[%a]: BAR[%d]: Base = %lx, Length = %lx\n",
gEfiCallerBaseName, Index, Resources->AddrRangeMin, Resources->AddrLen));
DEBUG ((
DEBUG_INFO,
"[%a]: BAR[%d]: Base = %lx, Length = %lx\n",
gEfiCallerBaseName,
Index,
Resources->AddrRangeMin,
Resources->AddrLen
));
if ((Resources->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) &&
(Resources->Len == (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3)) &&
(Resources->Len == (UINT16)(sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3)) &&
(Resources->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) &&
(Resources->AddrLen >= GraphicsInfo->FrameBufferSize)
) {
)
{
if (FrameBufferBase == 0) {
FrameBufferBase = Resources->AddrRangeMin;
}
if (DeviceInfo->BarIndex == MAX_UINT8) {
if (Resources->AddrRangeMin == GraphicsInfo->FrameBufferBase) {
FrameBufferBase = Resources->AddrRangeMin;
@ -416,6 +445,7 @@ GraphicsOutputDriverBindingStart (
}
}
}
if (Index == MAX_PCI_BAR) {
Status = EFI_UNSUPPORTED;
} else {
@ -440,7 +470,7 @@ GraphicsOutputDriverBindingStart (
Private->GraphicsOutputMode.FrameBufferBase = FrameBufferBase;
Private->GraphicsOutputMode.FrameBufferSize = GraphicsInfo->FrameBufferSize;
Private->GraphicsOutputMode.Info = &GraphicsInfo->GraphicsMode;
Private->GraphicsOutputMode.Info = &GraphicsInfo->GraphicsMode;
//
// Fix up Mode pointer in GraphicsOutput
@ -473,7 +503,7 @@ GraphicsOutputDriverBindingStart (
// Create the FrameBufferBltLib configuration.
//
ReturnStatus = FrameBufferBltConfigure (
(VOID *) (UINTN) Private->GraphicsOutput.Mode->FrameBufferBase,
(VOID *)(UINTN)Private->GraphicsOutput.Mode->FrameBufferBase,
Private->GraphicsOutput.Mode->Info,
Private->FrameBufferBltLibConfigure,
&Private->FrameBufferBltLibConfigureSize
@ -482,19 +512,20 @@ GraphicsOutputDriverBindingStart (
Private->FrameBufferBltLibConfigure = AllocatePool (Private->FrameBufferBltLibConfigureSize);
if (Private->FrameBufferBltLibConfigure != NULL) {
ReturnStatus = FrameBufferBltConfigure (
(VOID *) (UINTN) Private->GraphicsOutput.Mode->FrameBufferBase,
(VOID *)(UINTN)Private->GraphicsOutput.Mode->FrameBufferBase,
Private->GraphicsOutput.Mode->Info,
Private->FrameBufferBltLibConfigure,
&Private->FrameBufferBltLibConfigureSize
);
}
}
if (RETURN_ERROR (ReturnStatus)) {
Status = EFI_OUT_OF_RESOURCES;
goto RestorePciAttributes;
}
Private->DevicePath = AppendDevicePathNode (PciDevicePath, (EFI_DEVICE_PATH_PROTOCOL *) &mGraphicsOutputAdrNode);
Private->DevicePath = AppendDevicePathNode (PciDevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&mGraphicsOutputAdrNode);
if (Private->DevicePath == NULL) {
Status = EFI_OUT_OF_RESOURCES;
goto RestorePciAttributes;
@ -502,8 +533,10 @@ GraphicsOutputDriverBindingStart (
Status = gBS->InstallMultipleProtocolInterfaces (
&Private->GraphicsOutputHandle,
&gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid, Private->DevicePath,
&gEfiGraphicsOutputProtocolGuid,
&Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid,
Private->DevicePath,
NULL
);
@ -511,7 +544,7 @@ GraphicsOutputDriverBindingStart (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
(VOID **) &Private->PciIo,
(VOID **)&Private->PciIo,
This->DriverBindingHandle,
Private->GraphicsOutputHandle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
@ -521,8 +554,10 @@ GraphicsOutputDriverBindingStart (
} else {
gBS->UninstallMultipleProtocolInterfaces (
Private->GraphicsOutputHandle,
&gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid, Private->DevicePath,
&gEfiGraphicsOutputProtocolGuid,
&Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid,
Private->DevicePath,
NULL
);
}
@ -547,9 +582,11 @@ FreeMemory:
if (Private->DevicePath != NULL) {
FreePool (Private->DevicePath);
}
if (Private->FrameBufferBltLibConfigure != NULL) {
FreePool (Private->FrameBufferBltLibConfigure);
}
FreePool (Private);
}
}
@ -576,6 +613,7 @@ CloseProtocols:
Controller
);
}
return Status;
}
@ -594,18 +632,17 @@ CloseProtocols:
EFI_STATUS
EFIAPI
GraphicsOutputDriverBindingStop (
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN UINTN NumberOfChildren,
IN EFI_HANDLE *ChildHandleBuffer
IN EFI_DRIVER_BINDING_PROTOCOL *This,
IN EFI_HANDLE Controller,
IN UINTN NumberOfChildren,
IN EFI_HANDLE *ChildHandleBuffer
)
{
EFI_STATUS Status;
EFI_GRAPHICS_OUTPUT_PROTOCOL *Gop;
GRAPHICS_OUTPUT_PRIVATE_DATA *Private;
EFI_STATUS Status;
EFI_GRAPHICS_OUTPUT_PROTOCOL *Gop;
GRAPHICS_OUTPUT_PRIVATE_DATA *Private;
if (NumberOfChildren == 0) {
//
// Close the PCI I/O Protocol
//
@ -631,7 +668,7 @@ GraphicsOutputDriverBindingStop (
Status = gBS->OpenProtocol (
ChildHandleBuffer[0],
&gEfiGraphicsOutputProtocolGuid,
(VOID **) &Gop,
(VOID **)&Gop,
This->DriverBindingHandle,
ChildHandleBuffer[0],
EFI_OPEN_PROTOCOL_GET_PROTOCOL
@ -654,8 +691,10 @@ GraphicsOutputDriverBindingStop (
//
Status = gBS->UninstallMultipleProtocolInterfaces (
Private->GraphicsOutputHandle,
&gEfiGraphicsOutputProtocolGuid, &Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid, Private->DevicePath,
&gEfiGraphicsOutputProtocolGuid,
&Private->GraphicsOutput,
&gEfiDevicePathProtocolGuid,
Private->DevicePath,
NULL
);
if (!EFI_ERROR (Status)) {
@ -677,17 +716,18 @@ GraphicsOutputDriverBindingStop (
Status = gBS->OpenProtocol (
Controller,
&gEfiPciIoProtocolGuid,
(VOID **) &Private->PciIo,
(VOID **)&Private->PciIo,
This->DriverBindingHandle,
Private->GraphicsOutputHandle,
EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
);
ASSERT_EFI_ERROR (Status);
}
return Status;
}
EFI_DRIVER_BINDING_PROTOCOL mGraphicsOutputDriverBinding = {
EFI_DRIVER_BINDING_PROTOCOL mGraphicsOutputDriverBinding = {
GraphicsOutputDriverBindingSupported,
GraphicsOutputDriverBindingStart,
GraphicsOutputDriverBindingStop,
@ -712,12 +752,12 @@ EFI_DRIVER_BINDING_PROTOCOL mGraphicsOutputDriverBinding = {
EFI_STATUS
EFIAPI
InitializeGraphicsOutput (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
VOID *HobStart;
EFI_STATUS Status;
VOID *HobStart;
HobStart = GetFirstGuidHob (&gEfiGraphicsInfoHobGuid);

23
UefiPayloadPkg/GraphicsOutputDxe/GraphicsOutput.h
View File

@ -6,6 +6,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _GRAPHICS_OUTPUT_DXE_H_
#define _GRAPHICS_OUTPUT_DXE_H_
#include <PiDxe.h>
@ -33,21 +34,21 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#define MAX_PCI_BAR 6
typedef struct {
UINT32 Signature;
EFI_HANDLE GraphicsOutputHandle;
EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;
EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE GraphicsOutputMode;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 PciAttributes;
FRAME_BUFFER_CONFIGURE *FrameBufferBltLibConfigure;
UINTN FrameBufferBltLibConfigureSize;
UINT32 Signature;
EFI_HANDLE GraphicsOutputHandle;
EFI_GRAPHICS_OUTPUT_PROTOCOL GraphicsOutput;
EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE GraphicsOutputMode;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_PCI_IO_PROTOCOL *PciIo;
UINT64 PciAttributes;
FRAME_BUFFER_CONFIGURE *FrameBufferBltLibConfigure;
UINTN FrameBufferBltLibConfigureSize;
} GRAPHICS_OUTPUT_PRIVATE_DATA;
#define GRAPHICS_OUTPUT_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('g', 'g', 'o', 'p')
#define GRAPHICS_OUTPUT_PRIVATE_FROM_THIS(a) \
CR(a, GRAPHICS_OUTPUT_PRIVATE_DATA, GraphicsOutput, GRAPHICS_OUTPUT_PRIVATE_DATA_SIGNATURE)
extern EFI_COMPONENT_NAME_PROTOCOL mGraphicsOutputComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2;
extern EFI_COMPONENT_NAME_PROTOCOL mGraphicsOutputComponentName;
extern EFI_COMPONENT_NAME2_PROTOCOL mGraphicsOutputComponentName2;
#endif

238
UefiPayloadPkg/Include/Coreboot.h
View File

@ -35,205 +35,205 @@
* SUCH DAMAGE.
*/
#ifndef _COREBOOT_PEI_H_INCLUDED_
#define _COREBOOT_PEI_H_INCLUDED_
#if defined(_MSC_VER)
#pragma warning( disable : 4200 )
#if defined (_MSC_VER)
#pragma warning( disable : 4200 )
#endif
#define DYN_CBMEM_ALIGN_SIZE (4096)
#define DYN_CBMEM_ALIGN_SIZE (4096)
#define IMD_ENTRY_MAGIC (~0xC0389481)
#define CBMEM_ENTRY_MAGIC (~0xC0389479)
#define IMD_ENTRY_MAGIC (~0xC0389481)
#define CBMEM_ENTRY_MAGIC (~0xC0389479)
struct cbmem_entry {
UINT32 magic;
UINT32 start;
UINT32 size;
UINT32 id;
UINT32 magic;
UINT32 start;
UINT32 size;
UINT32 id;
};
struct cbmem_root {
UINT32 max_entries;
UINT32 num_entries;
UINT32 locked;
UINT32 size;
struct cbmem_entry entries[0];
UINT32 max_entries;
UINT32 num_entries;
UINT32 locked;
UINT32 size;
struct cbmem_entry entries[0];
};
struct imd_entry {
UINT32 magic;
UINT32 start_offset;
UINT32 size;
UINT32 id;
UINT32 magic;
UINT32 start_offset;
UINT32 size;
UINT32 id;
};
struct imd_root {
UINT32 max_entries;
UINT32 num_entries;
UINT32 flags;
UINT32 entry_align;
UINT32 max_offset;
struct imd_entry entries[0];
UINT32 max_entries;
UINT32 num_entries;
UINT32 flags;
UINT32 entry_align;
UINT32 max_offset;
struct imd_entry entries[0];
};
struct cbuint64 {
UINT32 lo;
UINT32 hi;
UINT32 lo;
UINT32 hi;
};
#define CB_HEADER_SIGNATURE 0x4F49424C
#define CB_HEADER_SIGNATURE 0x4F49424C
struct cb_header {
UINT32 signature;
UINT32 header_bytes;
UINT32 header_checksum;
UINT32 table_bytes;
UINT32 table_checksum;
UINT32 table_entries;
UINT32 signature;
UINT32 header_bytes;
UINT32 header_checksum;
UINT32 table_bytes;
UINT32 table_checksum;
UINT32 table_entries;
};
struct cb_record {
UINT32 tag;
UINT32 size;
UINT32 tag;
UINT32 size;
};
#define CB_TAG_UNUSED 0x0000
#define CB_TAG_MEMORY 0x0001
#define CB_TAG_UNUSED 0x0000
#define CB_TAG_MEMORY 0x0001
struct cb_memory_range {
struct cbuint64 start;
struct cbuint64 size;
UINT32 type;
struct cbuint64 start;
struct cbuint64 size;
UINT32 type;
};
#define CB_MEM_RAM 1
#define CB_MEM_RAM 1
#define CB_MEM_RESERVED 2
#define CB_MEM_ACPI 3
#define CB_MEM_NVS 4
#define CB_MEM_ACPI 3
#define CB_MEM_NVS 4
#define CB_MEM_UNUSABLE 5
#define CB_MEM_VENDOR_RSVD 6
#define CB_MEM_TABLE 16
#define CB_MEM_TABLE 16
struct cb_memory {
UINT32 tag;
UINT32 size;
struct cb_memory_range map[0];
UINT32 tag;
UINT32 size;
struct cb_memory_range map[0];
};
#define CB_TAG_MAINBOARD 0x0003
struct cb_mainboard {
UINT32 tag;
UINT32 size;
UINT8 vendor_idx;
UINT8 part_number_idx;
UINT8 strings[0];
UINT32 tag;
UINT32 size;
UINT8 vendor_idx;
UINT8 part_number_idx;
UINT8 strings[0];
};
#define CB_TAG_VERSION 0x0004
#define CB_TAG_EXTRA_VERSION 0x0005
#define CB_TAG_BUILD 0x0006
#define CB_TAG_COMPILE_TIME 0x0007
#define CB_TAG_COMPILE_BY 0x0008
#define CB_TAG_COMPILE_HOST 0x0009
#define CB_TAG_COMPILE_DOMAIN 0x000a
#define CB_TAG_COMPILER 0x000b
#define CB_TAG_LINKER 0x000c
#define CB_TAG_ASSEMBLER 0x000d
#define CB_TAG_VERSION 0x0004
#define CB_TAG_EXTRA_VERSION 0x0005
#define CB_TAG_BUILD 0x0006
#define CB_TAG_COMPILE_TIME 0x0007
#define CB_TAG_COMPILE_BY 0x0008
#define CB_TAG_COMPILE_HOST 0x0009
#define CB_TAG_COMPILE_DOMAIN 0x000a
#define CB_TAG_COMPILER 0x000b
#define CB_TAG_LINKER 0x000c
#define CB_TAG_ASSEMBLER 0x000d
struct cb_string {
UINT32 tag;
UINT32 size;
UINT8 string[0];
UINT32 tag;
UINT32 size;
UINT8 string[0];
};
#define CB_TAG_SERIAL 0x000f
#define CB_TAG_SERIAL 0x000f
struct cb_serial {
UINT32 tag;
UINT32 size;
#define CB_SERIAL_TYPE_IO_MAPPED 1
#define CB_SERIAL_TYPE_MEMORY_MAPPED 2
UINT32 type;
UINT32 baseaddr;
UINT32 baud;
UINT32 regwidth;
UINT32 tag;
UINT32 size;
#define CB_SERIAL_TYPE_IO_MAPPED 1
#define CB_SERIAL_TYPE_MEMORY_MAPPED 2
UINT32 type;
UINT32 baseaddr;
UINT32 baud;
UINT32 regwidth;
// Crystal or input frequency to the chip containing the UART.
// Provide the board specific details to allow the payload to
// initialize the chip containing the UART and make independent
// decisions as to which dividers to select and their values
// to eventually arrive at the desired console baud-rate.
UINT32 input_hertz;
UINT32 input_hertz;
// UART PCI address: bus, device, function
// 1 << 31 - Valid bit, PCI UART in use
// Bus << 20
// Device << 15
// Function << 12
UINT32 uart_pci_addr;
UINT32 uart_pci_addr;
};
#define CB_TAG_CONSOLE 0x00010
#define CB_TAG_CONSOLE 0x00010
struct cb_console {
UINT32 tag;
UINT32 size;
UINT16 type;
UINT32 tag;
UINT32 size;
UINT16 type;
};
#define CB_TAG_CONSOLE_SERIAL8250 0
#define CB_TAG_CONSOLE_VGA 1 // OBSOLETE
#define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE
#define CB_TAG_CONSOLE_LOGBUF 3
#define CB_TAG_CONSOLE_SROM 4 // OBSOLETE
#define CB_TAG_CONSOLE_EHCI 5
#define CB_TAG_CONSOLE_SERIAL8250 0
#define CB_TAG_CONSOLE_VGA 1 // OBSOLETE
#define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE
#define CB_TAG_CONSOLE_LOGBUF 3
#define CB_TAG_CONSOLE_SROM 4// OBSOLETE
#define CB_TAG_CONSOLE_EHCI 5
#define CB_TAG_FORWARD 0x00011
#define CB_TAG_FORWARD 0x00011
struct cb_forward {
UINT32 tag;
UINT32 size;
UINT64 forward;
UINT32 tag;
UINT32 size;
UINT64 forward;
};
#define CB_TAG_FRAMEBUFFER 0x0012
#define CB_TAG_FRAMEBUFFER 0x0012
struct cb_framebuffer {
UINT32 tag;
UINT32 size;
UINT32 tag;
UINT32 size;
UINT64 physical_address;
UINT32 x_resolution;
UINT32 y_resolution;
UINT32 bytes_per_line;
UINT8 bits_per_pixel;
UINT8 red_mask_pos;
UINT8 red_mask_size;
UINT8 green_mask_pos;
UINT8 green_mask_size;
UINT8 blue_mask_pos;
UINT8 blue_mask_size;
UINT8 reserved_mask_pos;
UINT8 reserved_mask_size;
UINT64 physical_address;
UINT32 x_resolution;
UINT32 y_resolution;
UINT32 bytes_per_line;
UINT8 bits_per_pixel;
UINT8 red_mask_pos;
UINT8 red_mask_size;
UINT8 green_mask_pos;
UINT8 green_mask_size;
UINT8 blue_mask_pos;
UINT8 blue_mask_size;
UINT8 reserved_mask_pos;
UINT8 reserved_mask_size;
};
#define CB_TAG_VDAT 0x0015
#define CB_TAG_VDAT 0x0015
struct cb_vdat {
UINT32 tag;
UINT32 size; /* size of the entire entry */
UINT64 vdat_addr;
UINT32 vdat_size;
UINT32 tag;
UINT32 size; /* size of the entire entry */
UINT64 vdat_addr;
UINT32 vdat_size;
};
#define CB_TAG_TIMESTAMPS 0x0016
#define CB_TAG_CBMEM_CONSOLE 0x0017
#define CB_TAG_MRC_CACHE 0x0018
#define CB_TAG_TIMESTAMPS 0x0016
#define CB_TAG_CBMEM_CONSOLE 0x0017
#define CB_TAG_MRC_CACHE 0x0018
struct cb_cbmem_tab {
UINT32 tag;
UINT32 size;
UINT64 cbmem_tab;
UINT32 tag;
UINT32 size;
UINT64 cbmem_tab;
};
/* Helpful macros */
@ -245,6 +245,6 @@ struct cb_cbmem_tab {
(void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \
+ (sizeof((_rec)->map[0]) * (_idx)))
typedef struct cb_memory CB_MEMORY;
typedef struct cb_memory CB_MEMORY;
#endif // _COREBOOT_PEI_H_INCLUDED_

22
UefiPayloadPkg/Include/Guid/AcpiBoardInfoGuid.h
View File

@ -12,19 +12,19 @@
///
/// Board information GUID
///
extern EFI_GUID gUefiAcpiBoardInfoGuid;
extern EFI_GUID gUefiAcpiBoardInfoGuid;
typedef struct {
UINT8 Revision;
UINT8 Reserved0[2];
UINT8 ResetValue;
UINT64 PmEvtBase;
UINT64 PmGpeEnBase;
UINT64 PmCtrlRegBase;
UINT64 PmTimerRegBase;
UINT64 ResetRegAddress;
UINT64 PcieBaseAddress;
UINT64 PcieBaseSize;
UINT8 Revision;
UINT8 Reserved0[2];
UINT8 ResetValue;
UINT64 PmEvtBase;
UINT64 PmGpeEnBase;
UINT64 PmCtrlRegBase;
UINT64 PmTimerRegBase;
UINT64 ResetRegAddress;
UINT64 PcieBaseAddress;
UINT64 PcieBaseSize;
} ACPI_BOARD_INFO;
#endif

8
UefiPayloadPkg/Include/Guid/BootManagerMenu.h
View File

@ -15,13 +15,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#pragma pack (1)
typedef struct {
UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;
GUID FileName;
UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;
GUID FileName;
} UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU;
#pragma pack()
#define UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU_REVISION 1
#define UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU_REVISION 1
extern GUID gEdkiiBootManagerMenuFileGuid;
extern GUID gEdkiiBootManagerMenuFileGuid;
#endif

20
UefiPayloadPkg/Include/Guid/MemoryMapInfoGuid.h
View File

@ -14,22 +14,22 @@
///
/// Memory Map Information GUID
///
extern EFI_GUID gLoaderMemoryMapInfoGuid;
extern EFI_GUID gLoaderMemoryMapInfoGuid;
#pragma pack(1)
typedef struct {
UINT64 Base;
UINT64 Size;
UINT8 Type;
UINT8 Flag;
UINT8 Reserved[6];
UINT64 Base;
UINT64 Size;
UINT8 Type;
UINT8 Flag;
UINT8 Reserved[6];
} MEMORY_MAP_ENTRY;
typedef struct {
UINT8 Revision;
UINT8 Reserved0[3];
UINT32 Count;
MEMORY_MAP_ENTRY Entry[0];
UINT8 Revision;
UINT8 Reserved0[3];
UINT32 Count;
MEMORY_MAP_ENTRY Entry[0];
} MEMORY_MAP_INFO;
#pragma pack()

10
UefiPayloadPkg/Include/Guid/NvVariableInfoGuid.h
View File

@ -12,13 +12,13 @@
//
// NV variable hob info GUID
//
extern EFI_GUID gNvVariableInfoGuid;
extern EFI_GUID gNvVariableInfoGuid;
typedef struct {
UINT8 Revision;
UINT8 Reserved[3];
UINT32 VariableStoreBase;
UINT32 VariableStoreSize;
UINT8 Revision;
UINT8 Reserved[3];
UINT32 VariableStoreBase;
UINT32 VariableStoreSize;
} NV_VARIABLE_INFO;
#endif

22
UefiPayloadPkg/Include/Guid/SerialPortInfoGuid.h
View File

@ -12,20 +12,20 @@
///
/// Serial Port Information GUID
///
extern EFI_GUID gUefiSerialPortInfoGuid;
extern EFI_GUID gUefiSerialPortInfoGuid;
#define PLD_SERIAL_TYPE_IO_MAPPED 1
#define PLD_SERIAL_TYPE_MEMORY_MAPPED 2
#define PLD_SERIAL_TYPE_IO_MAPPED 1
#define PLD_SERIAL_TYPE_MEMORY_MAPPED 2
typedef struct {
UINT8 Revision;
UINT8 Reserved0[3];
UINT32 Type;
UINT32 BaseAddr;
UINT32 Baud;
UINT32 RegWidth;
UINT32 InputHertz;
UINT32 UartPciAddr;
UINT8 Revision;
UINT8 Reserved0[3];
UINT32 Type;
UINT32 BaseAddr;
UINT32 Baud;
UINT32 RegWidth;
UINT32 InputHertz;
UINT32 UartPciAddr;
} SERIAL_PORT_INFO;
#endif

29
UefiPayloadPkg/Include/Guid/SmmRegisterInfoGuid.h
View File

@ -14,35 +14,34 @@
///
/// SMM Information GUID
///
extern EFI_GUID gSmmRegisterInfoGuid;
extern EFI_GUID gSmmRegisterInfoGuid;
///
/// Reuse ACPI definition
/// AddressSpaceId(0xC0-0xFF) is defined by OEM for MSR and other spaces
///
typedef EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE PLD_GENERIC_ADDRESS;
typedef EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE PLD_GENERIC_ADDRESS;
#define REGISTER_ID_SMI_GBL_EN 1
#define REGISTER_ID_SMI_GBL_EN_LOCK 2
#define REGISTER_ID_SMI_EOS 3
#define REGISTER_ID_SMI_APM_EN 4
#define REGISTER_ID_SMI_APM_STS 5
#define REGISTER_ID_SMI_GBL_EN 1
#define REGISTER_ID_SMI_GBL_EN_LOCK 2
#define REGISTER_ID_SMI_EOS 3
#define REGISTER_ID_SMI_APM_EN 4
#define REGISTER_ID_SMI_APM_STS 5
#pragma pack(1)
typedef struct {
UINT64 Id;
UINT64 Value;
PLD_GENERIC_ADDRESS Address;
UINT64 Id;
UINT64 Value;
PLD_GENERIC_ADDRESS Address;
} PLD_GENERIC_REGISTER;
typedef struct {
UINT16 Revision;
UINT16 Reserved;
UINT32 Count;
PLD_GENERIC_REGISTER Registers[0];
UINT16 Revision;
UINT16 Reserved;
UINT32 Count;
PLD_GENERIC_REGISTER Registers[0];
} PLD_SMM_REGISTERS;
#pragma pack()
#endif

24
UefiPayloadPkg/Include/Guid/SmmS3CommunicationInfoGuid.h
View File

@ -9,13 +9,13 @@
#ifndef PAYLOAD_S3_COMMUNICATION_GUID_H_
#define PAYLOAD_S3_COMMUNICATION_GUID_H_
extern EFI_GUID gS3CommunicationGuid;
extern EFI_GUID gS3CommunicationGuid;
#pragma pack(1)
typedef struct {
EFI_SMRAM_DESCRIPTOR CommBuffer;
BOOLEAN PldAcpiS3Enable;
EFI_SMRAM_DESCRIPTOR CommBuffer;
BOOLEAN PldAcpiS3Enable;
} PLD_S3_COMMUNICATION;
///
@ -27,16 +27,16 @@ typedef struct {
///
typedef struct {
UINT32 ApicId;
UINT32 SmmBase;
UINT32 ApicId;
UINT32 SmmBase;
} CPU_SMMBASE;
typedef struct {
UINT8 SwSmiData;
UINT8 SwSmiTriggerValue;
UINT16 Reserved;
UINT32 CpuCount;
CPU_SMMBASE SmmBase[0];
UINT8 SwSmiData;
UINT8 SwSmiTriggerValue;
UINT16 Reserved;
UINT32 CpuCount;
CPU_SMMBASE SmmBase[0];
} SMM_S3_INFO;
//
@ -45,8 +45,8 @@ typedef struct {
// to trigger SMI to let payload to restore S3.
//
typedef struct {
EFI_HOB_GUID_TYPE Header;
SMM_S3_INFO S3Info;
EFI_HOB_GUID_TYPE Header;
SMM_S3_INFO S3Info;
} PLD_TO_BL_SMM_INFO;
#pragma pack()

16
UefiPayloadPkg/Include/Guid/SpiFlashInfoGuid.h
View File

@ -13,26 +13,26 @@
//
// SPI Flash infor hob GUID
//
extern EFI_GUID gSpiFlashInfoGuid;
extern EFI_GUID gSpiFlashInfoGuid;
//
// Set this bit if platform need disable SMM write protection when writing flash
// in SMM mode using this method: -- AsmWriteMsr32 (0x1FE, MmioRead32 (0xFED30880) | BIT0);
//
#define FLAGS_SPI_DISABLE_SMM_WRITE_PROTECT BIT0
#define FLAGS_SPI_DISABLE_SMM_WRITE_PROTECT BIT0
//
// Reuse ACPI definition
//
typedef EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE PLD_GENERIC_ADDRESS;
#define SPACE_ID_PCI_CONFIGURATION EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE
#define REGISTER_BIT_WIDTH_DWORD EFI_ACPI_3_0_DWORD
#define SPACE_ID_PCI_CONFIGURATION EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE
#define REGISTER_BIT_WIDTH_DWORD EFI_ACPI_3_0_DWORD
typedef struct {
UINT8 Revision;
UINT8 Reserved;
UINT16 Flags;
PLD_GENERIC_ADDRESS SpiAddress;
UINT8 Revision;
UINT8 Reserved;
UINT16 Flags;
PLD_GENERIC_ADDRESS SpiAddress;
} SPI_FLASH_INFO;
#endif

23
UefiPayloadPkg/Include/Library/BlParseLib.h
View File

@ -6,6 +6,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef BOOTLOADER_PARSE_LIB_
#define BOOTLOADER_PARSE_LIB_
@ -17,10 +18,13 @@
#include <UniversalPayload/AcpiTable.h>
#include <UniversalPayload/SmbiosTable.h>
#define GET_BOOTLOADER_PARAMETER() PcdGet64 (PcdBootloaderParameter)
#define GET_BOOTLOADER_PARAMETER() PcdGet64 (PcdBootloaderParameter)
typedef RETURN_STATUS \
(*BL_MEM_INFO_CALLBACK) (MEMORY_MAP_ENTRY *MemoryMapEntry, VOID *Param);
(*BL_MEM_INFO_CALLBACK) (
MEMORY_MAP_ENTRY *MemoryMapEntry,
VOID *Param
);
/**
This function retrieves the parameter base address from boot loader.
@ -51,8 +55,8 @@ GetParameterBase (
RETURN_STATUS
EFIAPI
ParseMemoryInfo (
IN BL_MEM_INFO_CALLBACK MemInfoCallback,
IN VOID *Params
IN BL_MEM_INFO_CALLBACK MemInfoCallback,
IN VOID *Params
);
/**
@ -67,7 +71,7 @@ ParseMemoryInfo (
RETURN_STATUS
EFIAPI
ParseSmbiosTable (
OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable
OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable
);
/**
@ -82,7 +86,7 @@ ParseSmbiosTable (
RETURN_STATUS
EFIAPI
ParseAcpiTableInfo (
OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob
OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob
);
/**
@ -97,10 +101,9 @@ ParseAcpiTableInfo (
RETURN_STATUS
EFIAPI
ParseSerialInfo (
OUT SERIAL_PORT_INFO *SerialPortInfo
OUT SERIAL_PORT_INFO *SerialPortInfo
);
/**
Find the video frame buffer information
@ -113,7 +116,7 @@ ParseSerialInfo (
RETURN_STATUS
EFIAPI
ParseGfxInfo (
OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo
OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo
);
/**
@ -128,7 +131,7 @@ ParseGfxInfo (
RETURN_STATUS
EFIAPI
ParseGfxDeviceInfo (
OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo
OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo
);
/**

1
UefiPayloadPkg/Include/Library/DxeHobListLib.h
View File

@ -24,4 +24,3 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
extern VOID *gHobList;
#endif

32
UefiPayloadPkg/Include/Library/FlashDeviceLib.h
View File

@ -6,7 +6,6 @@
**/
#ifndef FLASHDEVICE_LIB_H_
#define FLASHDEVICE_LIB_H_
@ -26,12 +25,11 @@
EFI_STATUS
EFIAPI
LibFvbFlashDeviceRead (
IN UINTN PAddress,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
IN UINTN PAddress,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
);
/**
Write NumBytes bytes of data from Buffer to the address specified by
PAddresss.
@ -48,12 +46,11 @@ LibFvbFlashDeviceRead (
EFI_STATUS
EFIAPI
LibFvbFlashDeviceWrite (
IN UINTN PAddress,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
IN UINTN PAddress,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
);
/**
Erase the block starting at PAddress.
@ -72,10 +69,9 @@ LibFvbFlashDeviceWrite (
EFI_STATUS
EFIAPI
LibFvbFlashDeviceBlockErase (
IN UINTN PAddress,
IN UINTN LbaLength
);
IN UINTN PAddress,
IN UINTN LbaLength
);
/**
Lock or unlock the block starting at PAddress.
@ -95,14 +91,14 @@ LibFvbFlashDeviceBlockErase (
EFI_STATUS
EFIAPI
LibFvbFlashDeviceBlockLock (
IN UINTN PAddress,
IN UINTN LbaLength,
IN BOOLEAN Lock
);
IN UINTN PAddress,
IN UINTN LbaLength,
IN BOOLEAN Lock
);
PHYSICAL_ADDRESS
EFIAPI
LibFvbFlashDeviceMemoryMap (
);
);
#endif

1
UefiPayloadPkg/Include/Library/PlatformSupportLib.h
View File

@ -25,4 +25,3 @@ ParsePlatformInfo (
);
#endif // __BOOTLOADER_PLATFORM_SUPPORT_LIB__

27
UefiPayloadPkg/Include/Library/SpiFlashLib.h
View File

@ -38,9 +38,9 @@ typedef enum {
EFI_STATUS
EFIAPI
SpiFlashReadSfdp (
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *SfdpData
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *SfdpData
);
/**
@ -58,9 +58,9 @@ SpiFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiFlashReadJedecId (
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
);
/**
@ -76,8 +76,8 @@ SpiFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiFlashWriteStatus (
IN UINT32 ByteCount,
IN UINT8 *StatusValue
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
/**
@ -93,8 +93,8 @@ SpiFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiFlashReadStatus (
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
/**
@ -112,12 +112,11 @@ SpiFlashReadStatus (
EFI_STATUS
EFIAPI
SpiReadPchSoftStrap (
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT UINT8 *SoftStrapValue
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT UINT8 *SoftStrapValue
);
/**
Read data from the flash part.

19
UefiPayloadPkg/Include/Protocol/PlatformBootManagerOverride.h
View File

@ -8,7 +8,6 @@
#ifndef __PLATFORM_BOOT_MANAGER_OVERRIDE_H__
#define __PLATFORM_BOOT_MANAGER_OVERRIDE_H__
/**
Do the platform specific action before the console is connected.
@ -21,7 +20,7 @@
**/
typedef
VOID
(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_BEFORE_CONSOLE) (
(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_BEFORE_CONSOLE)(
VOID
);
@ -39,7 +38,7 @@ VOID
**/
typedef
VOID
(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_AFTER_CONSOLE) (
(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_AFTER_CONSOLE)(
VOID
);
@ -51,7 +50,7 @@ VOID
**/
typedef
VOID
(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_WAIT_CALLBACK) (
(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_WAIT_CALLBACK)(
UINT16 TimeoutRemain
);
@ -65,7 +64,7 @@ VOID
**/
typedef
VOID
(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_UNABLE_TO_BOOT) (
(EFIAPI *UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_UNABLE_TO_BOOT)(
VOID
);
@ -74,12 +73,12 @@ VOID
/// so platform can provide its own platform specific logic through this protocol
///
typedef struct {
UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_BEFORE_CONSOLE BeforeConsole;
UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_AFTER_CONSOLE AfterConsole;
UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_WAIT_CALLBACK WaitCallback;
UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_UNABLE_TO_BOOT UnableToBoot;
UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_BEFORE_CONSOLE BeforeConsole;
UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_AFTER_CONSOLE AfterConsole;
UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_WAIT_CALLBACK WaitCallback;
UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_UNABLE_TO_BOOT UnableToBoot;
} UNIVERSAL_PAYLOAD_PLATFORM_BOOT_MANAGER_OVERRIDE_PROTOCOL;
extern GUID gUniversalPayloadPlatformBootManagerOverrideProtocolGuid;
extern GUID gUniversalPayloadPlatformBootManagerOverrideProtocolGuid;
#endif

33
UefiPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c
View File

@ -18,7 +18,7 @@
#define ACPI_TIMER_COUNT_SIZE BIT24
UINTN mPmTimerReg = 0;
UINTN mPmTimerReg = 0;
/**
The constructor function enables ACPI IO space.
@ -67,6 +67,7 @@ InternalAcpiGetTimerTick (
if (mPmTimerReg == 0) {
AcpiTimerLibConstructor ();
}
return IoRead32 (mPmTimerReg);
}
@ -81,20 +82,20 @@ InternalAcpiGetTimerTick (
**/
VOID
InternalAcpiDelay (
IN UINT32 Delay
IN UINT32 Delay
)
{
UINT32 Ticks;
UINT32 Times;
UINT32 Ticks;
UINT32 Times;
Times = Delay >> 22;
Delay &= BIT22 - 1;
Times = Delay >> 22;
Delay &= BIT22 - 1;
do {
//
// The target timer count is calculated here
//
Ticks = InternalAcpiGetTimerTick () + Delay;
Delay = BIT22;
Ticks = InternalAcpiGetTimerTick () + Delay;
Delay = BIT22;
//
// Wait until time out
// Delay >= 2^23 could not be handled by this function
@ -119,7 +120,7 @@ InternalAcpiDelay (
UINTN
EFIAPI
MicroSecondDelay (
IN UINTN MicroSeconds
IN UINTN MicroSeconds
)
{
InternalAcpiDelay (
@ -147,7 +148,7 @@ MicroSecondDelay (
UINTN
EFIAPI
NanoSecondDelay (
IN UINTN NanoSeconds
IN UINTN NanoSeconds
)
{
InternalAcpiDelay (
@ -209,8 +210,8 @@ GetPerformanceCounter (
UINT64
EFIAPI
GetPerformanceCounterProperties (
OUT UINT64 *StartValue OPTIONAL,
OUT UINT64 *EndValue OPTIONAL
OUT UINT64 *StartValue OPTIONAL,
OUT UINT64 *EndValue OPTIONAL
)
{
if (StartValue != NULL) {
@ -238,7 +239,7 @@ GetPerformanceCounterProperties (
UINT64
EFIAPI
GetTimeInNanoSecond (
IN UINT64 Ticks
IN UINT64 Ticks
)
{
UINT64 Frequency;
@ -260,9 +261,9 @@ GetTimeInNanoSecond (
// Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
// i.e. highest bit set in Remainder should <= 33.
//
Shift = MAX (0, HighBitSet64 (Remainder) - 33);
Remainder = RShiftU64 (Remainder, (UINTN) Shift);
Frequency = RShiftU64 (Frequency, (UINTN) Shift);
Shift = MAX (0, HighBitSet64 (Remainder) - 33);
Remainder = RShiftU64 (Remainder, (UINTN)Shift);
Frequency = RShiftU64 (Frequency, (UINTN)Shift);
NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
return NanoSeconds;

177
UefiPayloadPkg/Library/CbParseLib/CbParseLib.c
View File

@ -17,7 +17,6 @@
#include <IndustryStandard/Acpi.h>
#include <Coreboot.h>
/**
Convert a packed value from cbuint64 to a UINT64 value.
@ -28,13 +27,12 @@
**/
UINT64
cb_unpack64 (
IN struct cbuint64 val
IN struct cbuint64 val
)
{
return LShiftU64 (val.hi, 32) | val.lo;
}
/**
Returns the sum of all elements in a buffer of 16-bit values. During
calculation, the carry bits are also been added.
@ -47,19 +45,19 @@ cb_unpack64 (
**/
UINT16
CbCheckSum16 (
IN UINT16 *Buffer,
IN UINTN Length
IN UINT16 *Buffer,
IN UINTN Length
)
{
UINT32 Sum;
UINT32 TmpValue;
UINTN Idx;
UINT8 *TmpPtr;
UINT32 Sum;
UINT32 TmpValue;
UINTN Idx;
UINT8 *TmpPtr;
Sum = 0;
Sum = 0;
TmpPtr = (UINT8 *)Buffer;
for(Idx = 0; Idx < Length; Idx++) {
TmpValue = TmpPtr[Idx];
for (Idx = 0; Idx < Length; Idx++) {
TmpValue = TmpPtr[Idx];
if (Idx % 2 == 1) {
TmpValue <<= 8;
}
@ -75,7 +73,6 @@ CbCheckSum16 (
return (UINT16)((~Sum) & 0xFFFF);
}
/**
Check the coreboot table if it is valid.
@ -87,10 +84,10 @@ CbCheckSum16 (
**/
BOOLEAN
IsValidCbTable (
IN struct cb_header *Header
IN struct cb_header *Header
)
{
UINT16 CheckSum;
UINT16 CheckSum;
if ((Header == NULL) || (Header->table_bytes == 0)) {
return FALSE;
@ -118,7 +115,6 @@ IsValidCbTable (
return TRUE;
}
/**
This function retrieves the parameter base address from boot loader.
@ -135,12 +131,12 @@ GetParameterBase (
VOID
)
{
struct cb_header *Header;
struct cb_record *Record;
UINT8 *TmpPtr;
UINT8 *CbTablePtr;
UINTN Idx;
EFI_STATUS Status;
struct cb_header *Header;
struct cb_record *Record;
UINT8 *TmpPtr;
UINT8 *CbTablePtr;
UINTN Idx;
EFI_STATUS Status;
//
// coreboot could pass coreboot table to UEFI payload
@ -177,13 +173,14 @@ GetParameterBase (
// Find full coreboot table in high memory
//
CbTablePtr = NULL;
TmpPtr = (UINT8 *)Header + Header->header_bytes;
TmpPtr = (UINT8 *)Header + Header->header_bytes;
for (Idx = 0; Idx < Header->table_entries; Idx++) {
Record = (struct cb_record *)TmpPtr;
if (Record->tag == CB_TAG_FORWARD) {
CbTablePtr = (VOID *)(UINTN)((struct cb_forward *)(UINTN)Record)->forward;
break;
}
TmpPtr += Record->size;
}
@ -200,7 +197,6 @@ GetParameterBase (
return CbTablePtr;
}
/**
Find coreboot record with given Tag.
@ -212,16 +208,16 @@ GetParameterBase (
**/
VOID *
FindCbTag (
IN UINT32 Tag
IN UINT32 Tag
)
{
struct cb_header *Header;
struct cb_record *Record;
UINT8 *TmpPtr;
UINT8 *TagPtr;
UINTN Idx;
struct cb_header *Header;
struct cb_record *Record;
UINT8 *TmpPtr;
UINT8 *TagPtr;
UINTN Idx;
Header = (struct cb_header *) GetParameterBase ();
Header = (struct cb_header *)GetParameterBase ();
TagPtr = NULL;
TmpPtr = (UINT8 *)Header + Header->header_bytes;
@ -231,13 +227,13 @@ FindCbTag (
TagPtr = TmpPtr;
break;
}
TmpPtr += Record->size;
}
return TagPtr;
}
/**
Find the given table with TableId from the given coreboot memory Root.
@ -259,13 +255,14 @@ FindCbMemTable (
OUT UINT32 *MemTableSize
)
{
UINTN Idx;
BOOLEAN IsImdEntry;
struct cbmem_entry *Entries;
UINTN Idx;
BOOLEAN IsImdEntry;
struct cbmem_entry *Entries;
if ((Root == NULL) || (MemTable == NULL)) {
return RETURN_INVALID_PARAMETER;
}
//
// Check if the entry is CBMEM or IMD
// and handle them separately
@ -285,16 +282,22 @@ FindCbMemTable (
for (Idx = 0; Idx < Root->num_entries; Idx++) {
if (Entries[Idx].id == TableId) {
if (IsImdEntry) {
*MemTable = (VOID *) ((UINTN)Entries[Idx].start + (UINTN)Root);
*MemTable = (VOID *)((UINTN)Entries[Idx].start + (UINTN)Root);
} else {
*MemTable = (VOID *) (UINTN)Entries[Idx].start;
*MemTable = (VOID *)(UINTN)Entries[Idx].start;
}
if (MemTableSize != NULL) {
*MemTableSize = Entries[Idx].size;
}
DEBUG ((DEBUG_INFO, "Find CbMemTable Id 0x%x, base %p, size 0x%x\n",
TableId, *MemTable, Entries[Idx].size));
DEBUG ((
DEBUG_INFO,
"Find CbMemTable Id 0x%x, base %p, size 0x%x\n",
TableId,
*MemTable,
Entries[Idx].size
));
return RETURN_SUCCESS;
}
}
@ -316,18 +319,18 @@ FindCbMemTable (
**/
RETURN_STATUS
ParseCbMemTable (
IN UINT32 TableId,
OUT VOID **MemTable,
OUT UINT32 *MemTableSize
IN UINT32 TableId,
OUT VOID **MemTable,
OUT UINT32 *MemTableSize
)
{
EFI_STATUS Status;
CB_MEMORY *Rec;
struct cb_memory_range *Range;
UINT64 Start;
UINT64 Size;
UINTN Index;
struct cbmem_root *CbMemRoot;
EFI_STATUS Status;
CB_MEMORY *Rec;
struct cb_memory_range *Range;
UINT64 Start;
UINT64 Size;
UINTN Index;
struct cbmem_root *CbMemRoot;
if (MemTable == NULL) {
return RETURN_INVALID_PARAMETER;
@ -344,14 +347,14 @@ ParseCbMemTable (
return Status;
}
for (Index = 0; Index < MEM_RANGE_COUNT(Rec); Index++) {
Range = MEM_RANGE_PTR(Rec, Index);
Start = cb_unpack64(Range->start);
Size = cb_unpack64(Range->size);
for (Index = 0; Index < MEM_RANGE_COUNT (Rec); Index++) {
Range = MEM_RANGE_PTR (Rec, Index);
Start = cb_unpack64 (Range->start);
Size = cb_unpack64 (Range->size);
if ((Range->type == CB_MEM_TABLE) && (Start > 0x1000)) {
CbMemRoot = (struct cbmem_root *)(UINTN)(Start + Size - DYN_CBMEM_ALIGN_SIZE);
Status = FindCbMemTable (CbMemRoot, TableId, MemTable, MemTableSize);
Status = FindCbMemTable (CbMemRoot, TableId, MemTable, MemTableSize);
if (!EFI_ERROR (Status)) {
break;
}
@ -361,8 +364,6 @@ ParseCbMemTable (
return Status;
}
/**
Acquire the memory information from the coreboot table in memory.
@ -380,10 +381,10 @@ ParseMemoryInfo (
IN VOID *Params
)
{
CB_MEMORY *Rec;
struct cb_memory_range *Range;
UINTN Index;
MEMORY_MAP_ENTRY MemoryMap;
CB_MEMORY *Rec;
struct cb_memory_range *Range;
UINTN Index;
MEMORY_MAP_ENTRY MemoryMap;
//
// Get the coreboot memory table
@ -393,14 +394,20 @@ ParseMemoryInfo (
return RETURN_NOT_FOUND;
}
for (Index = 0; Index < MEM_RANGE_COUNT(Rec); Index++) {
Range = MEM_RANGE_PTR(Rec, Index);
MemoryMap.Base = cb_unpack64(Range->start);
MemoryMap.Size = cb_unpack64(Range->size);
for (Index = 0; Index < MEM_RANGE_COUNT (Rec); Index++) {
Range = MEM_RANGE_PTR (Rec, Index);
MemoryMap.Base = cb_unpack64 (Range->start);
MemoryMap.Size = cb_unpack64 (Range->size);
MemoryMap.Type = (UINT8)Range->type;
MemoryMap.Flag = 0;
DEBUG ((DEBUG_INFO, "%d. %016lx - %016lx [%02x]\n",
Index, MemoryMap.Base, MemoryMap.Base + MemoryMap.Size - 1, MemoryMap.Type));
DEBUG ((
DEBUG_INFO,
"%d. %016lx - %016lx [%02x]\n",
Index,
MemoryMap.Base,
MemoryMap.Base + MemoryMap.Size - 1,
MemoryMap.Type
));
MemInfoCallback (&MemoryMap, Params);
}
@ -408,7 +415,6 @@ ParseMemoryInfo (
return RETURN_SUCCESS;
}
/**
Acquire SMBIOS table from coreboot.
@ -421,23 +427,23 @@ ParseMemoryInfo (
RETURN_STATUS
EFIAPI
ParseSmbiosTable (
OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable
OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable
)
{
EFI_STATUS Status;
VOID *MemTable;
UINT32 MemTableSize;
EFI_STATUS Status;
VOID *MemTable;
UINT32 MemTableSize;
Status = ParseCbMemTable (SIGNATURE_32 ('T', 'B', 'M', 'S'), &MemTable, &MemTableSize);
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
SmbiosTable->SmBiosEntryPoint = (UINT64) (UINTN)MemTable;
SmbiosTable->SmBiosEntryPoint = (UINT64)(UINTN)MemTable;
return RETURN_SUCCESS;
}
/**
Acquire ACPI table from coreboot.
@ -450,23 +456,23 @@ ParseSmbiosTable (
RETURN_STATUS
EFIAPI
ParseAcpiTableInfo (
OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob
OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob
)
{
EFI_STATUS Status;
VOID *MemTable;
UINT32 MemTableSize;
EFI_STATUS Status;
VOID *MemTable;
UINT32 MemTableSize;
Status = ParseCbMemTable (SIGNATURE_32 ('I', 'P', 'C', 'A'), &MemTable, &MemTableSize);
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
AcpiTableHob->Rsdp = (UINT64) (UINTN)MemTable;
AcpiTableHob->Rsdp = (UINT64)(UINTN)MemTable;
return RETURN_SUCCESS;
}
/**
Find the serial port information
@ -479,10 +485,10 @@ ParseAcpiTableInfo (
RETURN_STATUS
EFIAPI
ParseSerialInfo (
OUT SERIAL_PORT_INFO *SerialPortInfo
OUT SERIAL_PORT_INFO *SerialPortInfo
)
{
struct cb_serial *CbSerial;
struct cb_serial *CbSerial;
CbSerial = FindCbTag (CB_TAG_SERIAL);
if (CbSerial == NULL) {
@ -511,7 +517,7 @@ ParseSerialInfo (
RETURN_STATUS
EFIAPI
ParseGfxInfo (
OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo
OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo
)
{
struct cb_framebuffer *CbFbRec;
@ -542,7 +548,7 @@ ParseGfxInfo (
DEBUG ((DEBUG_INFO, "reserved_mask_size: 0x%x\n", CbFbRec->reserved_mask_size));
DEBUG ((DEBUG_INFO, "reserved_mask_pos: 0x%x\n", CbFbRec->reserved_mask_pos));
GfxMode = &GfxInfo->GraphicsMode;
GfxMode = &GfxInfo->GraphicsMode;
GfxMode->Version = 0;
GfxMode->HorizontalResolution = CbFbRec->x_resolution;
GfxMode->VerticalResolution = CbFbRec->y_resolution;
@ -550,8 +556,9 @@ ParseGfxInfo (
if ((CbFbRec->red_mask_pos == 0) && (CbFbRec->green_mask_pos == 8) && (CbFbRec->blue_mask_pos == 16)) {
GfxMode->PixelFormat = PixelRedGreenBlueReserved8BitPerColor;
} else if ((CbFbRec->blue_mask_pos == 0) && (CbFbRec->green_mask_pos == 8) && (CbFbRec->red_mask_pos == 16)) {
GfxMode->PixelFormat = PixelBlueGreenRedReserved8BitPerColor;
GfxMode->PixelFormat = PixelBlueGreenRedReserved8BitPerColor;
}
GfxMode->PixelInformation.RedMask = ((1 << CbFbRec->red_mask_size) - 1) << CbFbRec->red_mask_pos;
GfxMode->PixelInformation.GreenMask = ((1 << CbFbRec->green_mask_size) - 1) << CbFbRec->green_mask_pos;
GfxMode->PixelInformation.BlueMask = ((1 << CbFbRec->blue_mask_size) - 1) << CbFbRec->blue_mask_pos;
@ -575,7 +582,7 @@ ParseGfxInfo (
RETURN_STATUS
EFIAPI
ParseGfxDeviceInfo (
OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo
OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo
)
{
return RETURN_NOT_FOUND;

96
UefiPayloadPkg/Library/DxeHobLib/HobLib.c
View File

@ -59,15 +59,15 @@ GetHobList (
VOID *
EFIAPI
GetNextHob (
IN UINT16 Type,
IN CONST VOID *HobStart
IN UINT16 Type,
IN CONST VOID *HobStart
)
{
EFI_PEI_HOB_POINTERS Hob;
ASSERT (HobStart != NULL);
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
//
// Parse the HOB list until end of list or matching type is found.
//
@ -75,8 +75,10 @@ GetNextHob (
if (Hob.Header->HobType == Type) {
return Hob.Raw;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
return NULL;
}
@ -96,10 +98,10 @@ GetNextHob (
VOID *
EFIAPI
GetFirstHob (
IN UINT16 Type
IN UINT16 Type
)
{
VOID *HobList;
VOID *HobList;
HobList = GetHobList ();
return GetNextHob (Type, HobList);
@ -130,19 +132,21 @@ GetFirstHob (
VOID *
EFIAPI
GetNextGuidHob (
IN CONST EFI_GUID *Guid,
IN CONST VOID *HobStart
IN CONST EFI_GUID *Guid,
IN CONST VOID *HobStart
)
{
EFI_PEI_HOB_POINTERS GuidHob;
GuidHob.Raw = (UINT8 *) HobStart;
GuidHob.Raw = (UINT8 *)HobStart;
while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
break;
}
GuidHob.Raw = GET_NEXT_HOB (GuidHob);
}
return GuidHob.Raw;
}
@ -167,10 +171,10 @@ GetNextGuidHob (
VOID *
EFIAPI
GetFirstGuidHob (
IN CONST EFI_GUID *Guid
IN CONST EFI_GUID *Guid
)
{
VOID *HobList;
VOID *HobList;
HobList = GetHobList ();
return GetNextGuidHob (Guid, HobList);
@ -195,11 +199,11 @@ GetBootModeHob (
VOID
)
{
EFI_HOB_HANDOFF_INFO_TABLE *HandOffHob;
EFI_HOB_HANDOFF_INFO_TABLE *HandOffHob;
HandOffHob = (EFI_HOB_HANDOFF_INFO_TABLE *) GetHobList ();
HandOffHob = (EFI_HOB_HANDOFF_INFO_TABLE *)GetHobList ();
return HandOffHob->BootMode;
return HandOffHob->BootMode;
}
/**
@ -221,10 +225,10 @@ GetBootModeHob (
VOID
EFIAPI
BuildModuleHob (
IN CONST EFI_GUID *ModuleName,
IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,
IN UINT64 ModuleLength,
IN EFI_PHYSICAL_ADDRESS EntryPoint
IN CONST EFI_GUID *ModuleName,
IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,
IN UINT64 ModuleLength,
IN EFI_PHYSICAL_ADDRESS EntryPoint
)
{
//
@ -320,8 +324,8 @@ BuildResourceDescriptorHob (
VOID *
EFIAPI
BuildGuidHob (
IN CONST EFI_GUID *Guid,
IN UINTN DataLength
IN CONST EFI_GUID *Guid,
IN UINTN DataLength
)
{
//
@ -359,9 +363,9 @@ BuildGuidHob (
VOID *
EFIAPI
BuildGuidDataHob (
IN CONST EFI_GUID *Guid,
IN VOID *Data,
IN UINTN DataLength
IN CONST EFI_GUID *Guid,
IN VOID *Data,
IN UINTN DataLength
)
{
//
@ -388,8 +392,8 @@ BuildGuidDataHob (
VOID
EFIAPI
BuildFvHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
//
@ -417,10 +421,10 @@ BuildFvHob (
VOID
EFIAPI
BuildFv2Hob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN CONST EFI_GUID *FvName,
IN CONST EFI_GUID *FileName
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN CONST EFI_GUID *FvName,
IN CONST EFI_GUID *FileName
)
{
ASSERT (FALSE);
@ -450,12 +454,12 @@ BuildFv2Hob (
VOID
EFIAPI
BuildFv3Hob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT32 AuthenticationStatus,
IN BOOLEAN ExtractedFv,
IN CONST EFI_GUID *FvName OPTIONAL,
IN CONST EFI_GUID *FileName OPTIONAL
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT32 AuthenticationStatus,
IN BOOLEAN ExtractedFv,
IN CONST EFI_GUID *FvName OPTIONAL,
IN CONST EFI_GUID *FileName OPTIONAL
)
{
ASSERT (FALSE);
@ -478,8 +482,8 @@ BuildFv3Hob (
VOID
EFIAPI
BuildCvHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
//
@ -504,8 +508,8 @@ BuildCvHob (
VOID
EFIAPI
BuildCpuHob (
IN UINT8 SizeOfMemorySpace,
IN UINT8 SizeOfIoSpace
IN UINT8 SizeOfMemorySpace,
IN UINT8 SizeOfIoSpace
)
{
//
@ -530,8 +534,8 @@ BuildCpuHob (
VOID
EFIAPI
BuildStackHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
//
@ -557,9 +561,9 @@ BuildStackHob (
VOID
EFIAPI
BuildBspStoreHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN EFI_MEMORY_TYPE MemoryType
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN EFI_MEMORY_TYPE MemoryType
)
{
//
@ -585,9 +589,9 @@ BuildBspStoreHob (
VOID
EFIAPI
BuildMemoryAllocationHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN EFI_MEMORY_TYPE MemoryType
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN EFI_MEMORY_TYPE MemoryType
)
{
//

9
UefiPayloadPkg/Library/DxeHobListLib/DxeHobListLib.c
View File

@ -7,7 +7,6 @@
**/
#include <Uefi.h>
VOID *gHobList = NULL;
@ -33,10 +32,10 @@ LocalCompareGuid (
UINT64 *Left;
UINT64 *Right;
Left = (UINT64 *) Guid1;
Right = (UINT64 *) Guid2;
Left = (UINT64 *)Guid1;
Right = (UINT64 *)Guid2;
return (BOOLEAN) (Left[0] == Right[0] && Left[1] == Right[1]);
return (BOOLEAN)(Left[0] == Right[0] && Left[1] == Right[1]);
}
/**
@ -53,7 +52,7 @@ DxeHobListLibConstructor (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
UINTN Index;
UINTN Index;
for (Index = 0; Index < SystemTable->NumberOfTableEntries; Index++) {
if (LocalCompareGuid (&gEfiHobListGuid, &SystemTable->ConfigurationTable[Index].VendorGuid)) {

1
UefiPayloadPkg/Library/DxeHobListLibNull/DxeHobListLibNull.c
View File

@ -7,7 +7,6 @@
**/
#include <Uefi.h>
/**

49
UefiPayloadPkg/Library/FlashDeviceLib/FlashDeviceLib.c
View File

@ -27,7 +27,6 @@ LibFvbFlashDeviceInit (
return SpiConstructor ();
}
/**
Read NumBytes bytes of data from the address specified by
PAddress into Buffer.
@ -44,15 +43,15 @@ LibFvbFlashDeviceInit (
EFI_STATUS
EFIAPI
LibFvbFlashDeviceRead (
IN UINTN PAddress,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
IN UINTN PAddress,
IN OUT UINTN *NumBytes,
OUT UINT8 *Buffer
)
{
EFI_STATUS Status;
UINT32 ByteCount;
UINT32 RgnSize;
UINT32 AddrOffset;
EFI_STATUS Status;
UINT32 ByteCount;
UINT32 RgnSize;
UINT32 AddrOffset;
Status = SpiGetRegionAddress (FlashRegionBios, NULL, &RgnSize);
if (EFI_ERROR (Status)) {
@ -66,7 +65,6 @@ LibFvbFlashDeviceRead (
return SpiFlashRead (FlashRegionBios, AddrOffset, ByteCount, Buffer);
}
/**
Write NumBytes bytes of data from Buffer to the address specified by
PAddresss.
@ -83,15 +81,15 @@ LibFvbFlashDeviceRead (
EFI_STATUS
EFIAPI
LibFvbFlashDeviceWrite (
IN UINTN PAddress,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
IN UINTN PAddress,
IN OUT UINTN *NumBytes,
IN UINT8 *Buffer
)
{
EFI_STATUS Status;
UINT32 ByteCount;
UINT32 RgnSize;
UINT32 AddrOffset;
EFI_STATUS Status;
UINT32 ByteCount;
UINT32 RgnSize;
UINT32 AddrOffset;
Status = SpiGetRegionAddress (FlashRegionBios, NULL, &RgnSize);
if (EFI_ERROR (Status)) {
@ -105,7 +103,6 @@ LibFvbFlashDeviceWrite (
return SpiFlashWrite (FlashRegionBios, AddrOffset, ByteCount, Buffer);
}
/**
Erase the block starting at PAddress.
@ -121,13 +118,13 @@ LibFvbFlashDeviceWrite (
EFI_STATUS
EFIAPI
LibFvbFlashDeviceBlockErase (
IN UINTN PAddress,
IN UINTN LbaLength
IN UINTN PAddress,
IN UINTN LbaLength
)
{
EFI_STATUS Status;
UINT32 RgnSize;
UINT32 AddrOffset;
EFI_STATUS Status;
UINT32 RgnSize;
UINT32 AddrOffset;
Status = SpiGetRegionAddress (FlashRegionBios, NULL, &RgnSize);
if (EFI_ERROR (Status)) {
@ -140,7 +137,6 @@ LibFvbFlashDeviceBlockErase (
return SpiFlashErase (FlashRegionBios, AddrOffset, (UINT32)LbaLength);
}
/**
Lock or unlock the block starting at PAddress.
@ -155,11 +151,10 @@ LibFvbFlashDeviceBlockErase (
EFI_STATUS
EFIAPI
LibFvbFlashDeviceBlockLock (
IN UINTN PAddress,
IN UINTN LbaLength,
IN BOOLEAN Lock
IN UINTN PAddress,
IN UINTN LbaLength,
IN BOOLEAN Lock
)
{
return EFI_SUCCESS;
}

189
UefiPayloadPkg/Library/PayloadEntryHobLib/Hob.c
View File

@ -15,7 +15,7 @@
#include <Library/HobLib.h>
#include <Library/PcdLib.h>
VOID *mHobList;
VOID *mHobList;
/**
Returns the pointer to the HOB list.
@ -35,7 +35,6 @@ GetHobList (
return mHobList;
}
/**
Build a Handoff Information Table HOB
@ -51,13 +50,13 @@ GetHobList (
@return The pointer to the handoff HOB table.
**/
EFI_HOB_HANDOFF_INFO_TABLE*
EFI_HOB_HANDOFF_INFO_TABLE *
EFIAPI
HobConstructor (
IN VOID *EfiMemoryBottom,
IN VOID *EfiMemoryTop,
IN VOID *EfiFreeMemoryBottom,
IN VOID *EfiFreeMemoryTop
IN VOID *EfiMemoryBottom,
IN VOID *EfiMemoryTop,
IN VOID *EfiFreeMemoryBottom,
IN VOID *EfiFreeMemoryTop
)
{
EFI_HOB_HANDOFF_INFO_TABLE *Hob;
@ -66,22 +65,22 @@ HobConstructor (
Hob = EfiFreeMemoryBottom;
HobEnd = (EFI_HOB_GENERIC_HEADER *)(Hob+1);
Hob->Header.HobType = EFI_HOB_TYPE_HANDOFF;
Hob->Header.HobLength = sizeof(EFI_HOB_HANDOFF_INFO_TABLE);
Hob->Header.Reserved = 0;
Hob->Header.HobType = EFI_HOB_TYPE_HANDOFF;
Hob->Header.HobLength = sizeof (EFI_HOB_HANDOFF_INFO_TABLE);
Hob->Header.Reserved = 0;
HobEnd->HobType = EFI_HOB_TYPE_END_OF_HOB_LIST;
HobEnd->HobLength = sizeof(EFI_HOB_GENERIC_HEADER);
HobEnd->Reserved = 0;
HobEnd->HobType = EFI_HOB_TYPE_END_OF_HOB_LIST;
HobEnd->HobLength = sizeof (EFI_HOB_GENERIC_HEADER);
HobEnd->Reserved = 0;
Hob->Version = EFI_HOB_HANDOFF_TABLE_VERSION;
Hob->BootMode = BOOT_WITH_FULL_CONFIGURATION;
Hob->Version = EFI_HOB_HANDOFF_TABLE_VERSION;
Hob->BootMode = BOOT_WITH_FULL_CONFIGURATION;
Hob->EfiMemoryTop = (EFI_PHYSICAL_ADDRESS) (UINTN) EfiMemoryTop;
Hob->EfiMemoryBottom = (EFI_PHYSICAL_ADDRESS) (UINTN) EfiMemoryBottom;
Hob->EfiFreeMemoryTop = (EFI_PHYSICAL_ADDRESS) (UINTN) EfiFreeMemoryTop;
Hob->EfiFreeMemoryBottom = (EFI_PHYSICAL_ADDRESS) (UINTN) (HobEnd+1);
Hob->EfiEndOfHobList = (EFI_PHYSICAL_ADDRESS) (UINTN) HobEnd;
Hob->EfiMemoryTop = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiMemoryTop;
Hob->EfiMemoryBottom = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiMemoryBottom;
Hob->EfiFreeMemoryTop = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiFreeMemoryTop;
Hob->EfiFreeMemoryBottom = (EFI_PHYSICAL_ADDRESS)(UINTN)(HobEnd+1);
Hob->EfiEndOfHobList = (EFI_PHYSICAL_ADDRESS)(UINTN)HobEnd;
mHobList = Hob;
return Hob;
@ -100,8 +99,8 @@ HobConstructor (
VOID *
EFIAPI
CreateHob (
IN UINT16 HobType,
IN UINT16 HobLength
IN UINT16 HobType,
IN UINT16 HobLength
)
{
EFI_HOB_HANDOFF_INFO_TABLE *HandOffHob;
@ -116,22 +115,22 @@ CreateHob (
FreeMemory = HandOffHob->EfiFreeMemoryTop - HandOffHob->EfiFreeMemoryBottom;
if (FreeMemory < HobLength) {
return NULL;
return NULL;
}
Hob = (VOID*) (UINTN) HandOffHob->EfiEndOfHobList;
((EFI_HOB_GENERIC_HEADER*) Hob)->HobType = HobType;
((EFI_HOB_GENERIC_HEADER*) Hob)->HobLength = HobLength;
((EFI_HOB_GENERIC_HEADER*) Hob)->Reserved = 0;
Hob = (VOID *)(UINTN)HandOffHob->EfiEndOfHobList;
((EFI_HOB_GENERIC_HEADER *)Hob)->HobType = HobType;
((EFI_HOB_GENERIC_HEADER *)Hob)->HobLength = HobLength;
((EFI_HOB_GENERIC_HEADER *)Hob)->Reserved = 0;
HobEnd = (EFI_HOB_GENERIC_HEADER*) ((UINTN)Hob + HobLength);
HandOffHob->EfiEndOfHobList = (EFI_PHYSICAL_ADDRESS) (UINTN) HobEnd;
HobEnd = (EFI_HOB_GENERIC_HEADER *)((UINTN)Hob + HobLength);
HandOffHob->EfiEndOfHobList = (EFI_PHYSICAL_ADDRESS)(UINTN)HobEnd;
HobEnd->HobType = EFI_HOB_TYPE_END_OF_HOB_LIST;
HobEnd->HobLength = sizeof(EFI_HOB_GENERIC_HEADER);
HobEnd->HobLength = sizeof (EFI_HOB_GENERIC_HEADER);
HobEnd->Reserved = 0;
HobEnd++;
HandOffHob->EfiFreeMemoryBottom = (EFI_PHYSICAL_ADDRESS) (UINTN) HobEnd;
HandOffHob->EfiFreeMemoryBottom = (EFI_PHYSICAL_ADDRESS)(UINTN)HobEnd;
return Hob;
}
@ -160,7 +159,7 @@ BuildResourceDescriptorHob (
EFI_HOB_RESOURCE_DESCRIPTOR *Hob;
Hob = CreateHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, sizeof (EFI_HOB_RESOURCE_DESCRIPTOR));
ASSERT(Hob != NULL);
ASSERT (Hob != NULL);
Hob->ResourceType = ResourceType;
Hob->ResourceAttribute = ResourceAttribute;
@ -187,15 +186,15 @@ BuildResourceDescriptorHob (
VOID *
EFIAPI
GetNextHob (
IN UINT16 Type,
IN CONST VOID *HobStart
IN UINT16 Type,
IN CONST VOID *HobStart
)
{
EFI_PEI_HOB_POINTERS Hob;
ASSERT (HobStart != NULL);
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
//
// Parse the HOB list until end of list or matching type is found.
//
@ -203,13 +202,13 @@ GetNextHob (
if (Hob.Header->HobType == Type) {
return Hob.Raw;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
return NULL;
}
/**
Returns the first instance of a HOB type among the whole HOB list.
@ -224,16 +223,15 @@ GetNextHob (
VOID *
EFIAPI
GetFirstHob (
IN UINT16 Type
IN UINT16 Type
)
{
VOID *HobList;
VOID *HobList;
HobList = GetHobList ();
return GetNextHob (Type, HobList);
}
/**
This function searches the first instance of a HOB from the starting HOB pointer.
Such HOB should satisfy two conditions:
@ -256,23 +254,24 @@ GetFirstHob (
VOID *
EFIAPI
GetNextGuidHob (
IN CONST EFI_GUID *Guid,
IN CONST VOID *HobStart
IN CONST EFI_GUID *Guid,
IN CONST VOID *HobStart
)
{
EFI_PEI_HOB_POINTERS GuidHob;
GuidHob.Raw = (UINT8 *) HobStart;
GuidHob.Raw = (UINT8 *)HobStart;
while ((GuidHob.Raw = GetNextHob (EFI_HOB_TYPE_GUID_EXTENSION, GuidHob.Raw)) != NULL) {
if (CompareGuid (Guid, &GuidHob.Guid->Name)) {
break;
}
GuidHob.Raw = GET_NEXT_HOB (GuidHob);
}
return GuidHob.Raw;
}
/**
This function searches the first instance of a HOB among the whole HOB list.
Such HOB should satisfy two conditions:
@ -290,18 +289,15 @@ GetNextGuidHob (
VOID *
EFIAPI
GetFirstGuidHob (
IN CONST EFI_GUID *Guid
IN CONST EFI_GUID *Guid
)
{
VOID *HobList;
VOID *HobList;
HobList = GetHobList ();
return GetNextGuidHob (Guid, HobList);
}
/**
Builds a HOB for a loaded PE32 module.
@ -320,16 +316,18 @@ GetFirstGuidHob (
VOID
EFIAPI
BuildModuleHob (
IN CONST EFI_GUID *ModuleName,
IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,
IN UINT64 ModuleLength,
IN EFI_PHYSICAL_ADDRESS EntryPoint
IN CONST EFI_GUID *ModuleName,
IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,
IN UINT64 ModuleLength,
IN EFI_PHYSICAL_ADDRESS EntryPoint
)
{
EFI_HOB_MEMORY_ALLOCATION_MODULE *Hob;
ASSERT (((MemoryAllocationModule & (EFI_PAGE_SIZE - 1)) == 0) &&
((ModuleLength & (EFI_PAGE_SIZE - 1)) == 0));
ASSERT (
((MemoryAllocationModule & (EFI_PAGE_SIZE - 1)) == 0) &&
((ModuleLength & (EFI_PAGE_SIZE - 1)) == 0)
);
Hob = CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION_MODULE));
@ -368,23 +366,22 @@ BuildModuleHob (
VOID *
EFIAPI
BuildGuidHob (
IN CONST EFI_GUID *Guid,
IN UINTN DataLength
IN CONST EFI_GUID *Guid,
IN UINTN DataLength
)
{
EFI_HOB_GUID_TYPE *Hob;
EFI_HOB_GUID_TYPE *Hob;
//
// Make sure that data length is not too long.
//
ASSERT (DataLength <= (0xffff - sizeof (EFI_HOB_GUID_TYPE)));
Hob = CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, (UINT16) (sizeof (EFI_HOB_GUID_TYPE) + DataLength));
Hob = CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, (UINT16)(sizeof (EFI_HOB_GUID_TYPE) + DataLength));
CopyGuid (&Hob->Name, Guid);
return Hob + 1;
}
/**
Copies a data buffer to a newly-built HOB.
@ -408,9 +405,9 @@ BuildGuidHob (
VOID *
EFIAPI
BuildGuidDataHob (
IN CONST EFI_GUID *Guid,
IN VOID *Data,
IN UINTN DataLength
IN CONST EFI_GUID *Guid,
IN VOID *Data,
IN UINTN DataLength
)
{
VOID *HobData;
@ -422,7 +419,6 @@ BuildGuidDataHob (
return CopyMem (HobData, Data, DataLength);
}
/**
Builds a Firmware Volume HOB.
@ -438,8 +434,8 @@ BuildGuidDataHob (
VOID
EFIAPI
BuildFvHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
EFI_HOB_FIRMWARE_VOLUME *Hob;
@ -450,7 +446,6 @@ BuildFvHob (
Hob->Length = Length;
}
/**
Builds a EFI_HOB_TYPE_FV2 HOB.
@ -468,10 +463,10 @@ BuildFvHob (
VOID
EFIAPI
BuildFv2Hob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN CONST EFI_GUID *FvName,
IN CONST EFI_GUID *FileName
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN CONST EFI_GUID *FvName,
IN CONST EFI_GUID *FileName
)
{
EFI_HOB_FIRMWARE_VOLUME2 *Hob;
@ -507,12 +502,12 @@ BuildFv2Hob (
VOID
EFIAPI
BuildFv3Hob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT32 AuthenticationStatus,
IN BOOLEAN ExtractedFv,
IN CONST EFI_GUID *FvName OPTIONAL,
IN CONST EFI_GUID *FileName OPTIONAL
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN UINT32 AuthenticationStatus,
IN BOOLEAN ExtractedFv,
IN CONST EFI_GUID *FvName OPTIONAL,
IN CONST EFI_GUID *FileName OPTIONAL
)
{
EFI_HOB_FIRMWARE_VOLUME3 *Hob;
@ -529,7 +524,6 @@ BuildFv3Hob (
}
}
/**
Builds a HOB for the CPU.
@ -545,8 +539,8 @@ BuildFv3Hob (
VOID
EFIAPI
BuildCpuHob (
IN UINT8 SizeOfMemorySpace,
IN UINT8 SizeOfIoSpace
IN UINT8 SizeOfMemorySpace,
IN UINT8 SizeOfIoSpace
)
{
EFI_HOB_CPU *Hob;
@ -562,7 +556,6 @@ BuildCpuHob (
ZeroMem (Hob->Reserved, sizeof (Hob->Reserved));
}
/**
Builds a HOB for the Stack.
@ -578,14 +571,16 @@ BuildCpuHob (
VOID
EFIAPI
BuildStackHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
EFI_HOB_MEMORY_ALLOCATION_STACK *Hob;
ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
((Length & (EFI_PAGE_SIZE - 1)) == 0));
ASSERT (
((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
((Length & (EFI_PAGE_SIZE - 1)) == 0)
);
Hob = CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION_STACK));
@ -600,7 +595,6 @@ BuildStackHob (
ZeroMem (Hob->AllocDescriptor.Reserved, sizeof (Hob->AllocDescriptor.Reserved));
}
/**
Update the Stack Hob if the stack has been moved
@ -611,11 +605,11 @@ BuildStackHob (
VOID
EFIAPI
UpdateStackHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
)
{
EFI_PEI_HOB_POINTERS Hob;
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = GetHobList ();
while ((Hob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, Hob.Raw)) != NULL) {
@ -633,15 +627,14 @@ UpdateStackHob (
// Update the BSP Stack Hob to reflect the new stack info.
//
Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress = BaseAddress;
Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength = Length;
Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength = Length;
break;
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
}
/**
Builds a HOB for the memory allocation.
@ -658,15 +651,17 @@ UpdateStackHob (
VOID
EFIAPI
BuildMemoryAllocationHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN EFI_MEMORY_TYPE MemoryType
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length,
IN EFI_MEMORY_TYPE MemoryType
)
{
EFI_HOB_MEMORY_ALLOCATION *Hob;
ASSERT (((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
((Length & (EFI_PAGE_SIZE - 1)) == 0));
ASSERT (
((BaseAddress & (EFI_PAGE_SIZE - 1)) == 0) &&
((Length & (EFI_PAGE_SIZE - 1)) == 0)
);
Hob = CreateHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, sizeof (EFI_HOB_MEMORY_ALLOCATION));

41
UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridge.h
View File

@ -14,8 +14,8 @@
#include <UniversalPayload/PciRootBridges.h>
typedef struct {
ACPI_HID_DEVICE_PATH AcpiDevicePath;
EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
ACPI_HID_DEVICE_PATH AcpiDevicePath;
EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
} CB_PCI_ROOT_BRIDGE_DEVICE_PATH;
/**
@ -27,8 +27,8 @@ typedef struct {
**/
PCI_ROOT_BRIDGE *
ScanForRootBridges (
OUT UINTN *NumberOfRootBridges
);
OUT UINTN *NumberOfRootBridges
);
/**
Scan for all root bridges from Universal Payload PciRootBridgeInfoHob
@ -43,7 +43,7 @@ PCI_ROOT_BRIDGE *
RetrieveRootBridgeInfoFromHob (
IN UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo,
OUT UINTN *NumberOfRootBridges
);
);
/**
Initialize a PCI_ROOT_BRIDGE structure.
@ -88,18 +88,18 @@ RetrieveRootBridgeInfoFromHob (
**/
EFI_STATUS
InitRootBridge (
IN UINT64 Supports,
IN UINT64 Attributes,
IN UINT64 AllocAttributes,
IN UINT8 RootBusNumber,
IN UINT8 MaxSubBusNumber,
IN PCI_ROOT_BRIDGE_APERTURE *Io,
IN PCI_ROOT_BRIDGE_APERTURE *Mem,
IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
IN PCI_ROOT_BRIDGE_APERTURE *PMem,
IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
OUT PCI_ROOT_BRIDGE *RootBus
);
IN UINT64 Supports,
IN UINT64 Attributes,
IN UINT64 AllocAttributes,
IN UINT8 RootBusNumber,
IN UINT8 MaxSubBusNumber,
IN PCI_ROOT_BRIDGE_APERTURE *Io,
IN PCI_ROOT_BRIDGE_APERTURE *Mem,
IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
IN PCI_ROOT_BRIDGE_APERTURE *PMem,
IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
OUT PCI_ROOT_BRIDGE *RootBus
);
/**
Initialize DevicePath for a PCI_ROOT_BRIDGE.
@ -110,7 +110,8 @@ InitRootBridge (
**/
EFI_DEVICE_PATH_PROTOCOL *
CreateRootBridgeDevicePath (
IN UINT32 HID,
IN UINT32 UID
);
IN UINT32 HID,
IN UINT32 UID
);
#endif

106
UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
View File

@ -25,18 +25,18 @@
STATIC
CONST
CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {
CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {
{
{
ACPI_DEVICE_PATH,
ACPI_DP,
{
(UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
(UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
(UINT8)(sizeof (ACPI_HID_DEVICE_PATH)),
(UINT8)((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
}
},
EISA_PNP_ID(0x0A03), // HID
0 // UID
EISA_PNP_ID (0x0A03), // HID
0 // UID
},
{
@ -92,20 +92,20 @@ CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {
**/
EFI_STATUS
InitRootBridge (
IN UINT64 Supports,
IN UINT64 Attributes,
IN UINT64 AllocAttributes,
IN UINT8 RootBusNumber,
IN UINT8 MaxSubBusNumber,
IN PCI_ROOT_BRIDGE_APERTURE *Io,
IN PCI_ROOT_BRIDGE_APERTURE *Mem,
IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
IN PCI_ROOT_BRIDGE_APERTURE *PMem,
IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
OUT PCI_ROOT_BRIDGE *RootBus
)
IN UINT64 Supports,
IN UINT64 Attributes,
IN UINT64 AllocAttributes,
IN UINT8 RootBusNumber,
IN UINT8 MaxSubBusNumber,
IN PCI_ROOT_BRIDGE_APERTURE *Io,
IN PCI_ROOT_BRIDGE_APERTURE *Mem,
IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
IN PCI_ROOT_BRIDGE_APERTURE *PMem,
IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
OUT PCI_ROOT_BRIDGE *RootBus
)
{
CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
//
// Be safe if other fields are added to PCI_ROOT_BRIDGE later.
@ -120,8 +120,8 @@ InitRootBridge (
RootBus->DmaAbove4G = FALSE;
RootBus->AllocationAttributes = AllocAttributes;
RootBus->Bus.Base = RootBusNumber;
RootBus->Bus.Limit = MaxSubBusNumber;
RootBus->Bus.Base = RootBusNumber;
RootBus->Bus.Limit = MaxSubBusNumber;
CopyMem (&RootBus->Io, Io, sizeof (*Io));
CopyMem (&RootBus->Mem, Mem, sizeof (*Mem));
CopyMem (&RootBus->MemAbove4G, MemAbove4G, sizeof (*MemAbove4G));
@ -130,18 +130,25 @@ InitRootBridge (
RootBus->NoExtendedConfigSpace = FALSE;
DevicePath = AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate),
&mRootBridgeDevicePathTemplate);
DevicePath = AllocateCopyPool (
sizeof (mRootBridgeDevicePathTemplate),
&mRootBridgeDevicePathTemplate
);
if (DevicePath == NULL) {
DEBUG ((DEBUG_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));
return EFI_OUT_OF_RESOURCES;
}
DevicePath->AcpiDevicePath.UID = RootBusNumber;
RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;
DEBUG ((DEBUG_INFO,
"%a: populated root bus %d, with room for %d subordinate bus(es)\n",
__FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber));
DevicePath->AcpiDevicePath.UID = RootBusNumber;
RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;
DEBUG ((
DEBUG_INFO,
"%a: populated root bus %d, with room for %d subordinate bus(es)\n",
__FUNCTION__,
RootBusNumber,
MaxSubBusNumber - RootBusNumber
));
return EFI_SUCCESS;
}
@ -154,13 +161,16 @@ InitRootBridge (
**/
EFI_DEVICE_PATH_PROTOCOL *
CreateRootBridgeDevicePath (
IN UINT32 HID,
IN UINT32 UID
)
IN UINT32 HID,
IN UINT32 UID
)
{
CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
DevicePath = AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate),
&mRootBridgeDevicePathTemplate);
CB_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;
DevicePath = AllocateCopyPool (
sizeof (mRootBridgeDevicePathTemplate),
&mRootBridgeDevicePathTemplate
);
ASSERT (DevicePath != NULL);
DevicePath->AcpiDevicePath.HID = HID;
DevicePath->AcpiDevicePath.UID = UID;
@ -179,30 +189,32 @@ CreateRootBridgeDevicePath (
PCI_ROOT_BRIDGE *
EFIAPI
PciHostBridgeGetRootBridges (
UINTN *Count
)
UINTN *Count
)
{
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo;
EFI_HOB_GUID_TYPE *GuidHob;
UNIVERSAL_PAYLOAD_GENERIC_HEADER *GenericHeader;
//
// Find Universal Payload PCI Root Bridge Info hob
//
GuidHob = GetFirstGuidHob (&gUniversalPayloadPciRootBridgeInfoGuid);
if (GuidHob != NULL) {
GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *) GET_GUID_HOB_DATA (GuidHob);
if ((sizeof(UNIVERSAL_PAYLOAD_GENERIC_HEADER) <= GET_GUID_HOB_DATA_SIZE (GuidHob)) && (GenericHeader->Length <= GET_GUID_HOB_DATA_SIZE (GuidHob))) {
GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *)GET_GUID_HOB_DATA (GuidHob);
if ((sizeof (UNIVERSAL_PAYLOAD_GENERIC_HEADER) <= GET_GUID_HOB_DATA_SIZE (GuidHob)) && (GenericHeader->Length <= GET_GUID_HOB_DATA_SIZE (GuidHob))) {
if ((GenericHeader->Revision == UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION) && (GenericHeader->Length >= sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES))) {
//
// UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES structure is used when Revision equals to UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION
//
PciRootBridgeInfo = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *) GET_GUID_HOB_DATA (GuidHob);
if (PciRootBridgeInfo->Count <= (GET_GUID_HOB_DATA_SIZE (GuidHob) - sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES)) / sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE)) {
PciRootBridgeInfo = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *)GET_GUID_HOB_DATA (GuidHob);
if (PciRootBridgeInfo->Count <= (GET_GUID_HOB_DATA_SIZE (GuidHob) - sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES)) / sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE)) {
return RetrieveRootBridgeInfoFromHob (PciRootBridgeInfo, Count);
}
}
}
}
return ScanForRootBridges (Count);
}
@ -216,13 +228,14 @@ PciHostBridgeGetRootBridges (
VOID
EFIAPI
PciHostBridgeFreeRootBridges (
PCI_ROOT_BRIDGE *Bridges,
UINTN Count
)
PCI_ROOT_BRIDGE *Bridges,
UINTN Count
)
{
if (Bridges == NULL && Count == 0) {
if ((Bridges == NULL) && (Count == 0)) {
return;
}
ASSERT (Bridges != NULL && Count > 0);
do {
@ -233,7 +246,6 @@ PciHostBridgeFreeRootBridges (
FreePool (Bridges);
}
/**
Inform the platform that the resource conflict happens.
@ -251,9 +263,9 @@ PciHostBridgeFreeRootBridges (
VOID
EFIAPI
PciHostBridgeResourceConflict (
EFI_HANDLE HostBridgeHandle,
VOID *Configuration
)
EFI_HANDLE HostBridgeHandle,
VOID *Configuration
)
{
//
// coreboot UEFI Payload does not do PCI enumeration and should not call this

268
UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
View File

@ -33,12 +33,12 @@
**/
VOID
AdjustRootBridgeResource (
IN PCI_ROOT_BRIDGE_APERTURE *Io,
IN PCI_ROOT_BRIDGE_APERTURE *Mem,
IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
IN PCI_ROOT_BRIDGE_APERTURE *PMem,
IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G
)
IN PCI_ROOT_BRIDGE_APERTURE *Io,
IN PCI_ROOT_BRIDGE_APERTURE *Mem,
IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
IN PCI_ROOT_BRIDGE_APERTURE *PMem,
IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G
)
{
UINT64 Mask;
@ -61,22 +61,26 @@ AdjustRootBridgeResource (
if (MemAbove4G->Base < 0x100000000ULL) {
if (MemAbove4G->Base < Mem->Base) {
Mem->Base = MemAbove4G->Base;
Mem->Base = MemAbove4G->Base;
}
if (MemAbove4G->Limit > Mem->Limit) {
Mem->Limit = MemAbove4G->Limit;
}
MemAbove4G->Base = MAX_UINT64;
MemAbove4G->Limit = 0;
}
if (PMemAbove4G->Base < 0x100000000ULL) {
if (PMemAbove4G->Base < Mem->Base) {
Mem->Base = PMemAbove4G->Base;
Mem->Base = PMemAbove4G->Base;
}
if (PMemAbove4G->Limit > Mem->Limit) {
Mem->Limit = PMemAbove4G->Limit;
}
PMemAbove4G->Base = MAX_UINT64;
PMemAbove4G->Limit = 0;
}
@ -84,8 +88,8 @@ AdjustRootBridgeResource (
//
// Align IO resource at 4K boundary
//
Mask = 0xFFFULL;
Io->Limit = ((Io->Limit + Mask) & ~Mask) - 1;
Mask = 0xFFFULL;
Io->Limit = ((Io->Limit + Mask) & ~Mask) - 1;
if (Io->Base != MAX_UINT64) {
Io->Base &= ~Mask;
}
@ -93,8 +97,8 @@ AdjustRootBridgeResource (
//
// Align MEM resource at 1MB boundary
//
Mask = 0xFFFFFULL;
Mem->Limit = ((Mem->Limit + Mask) & ~Mask) - 1;
Mask = 0xFFFFFULL;
Mem->Limit = ((Mem->Limit + Mask) & ~Mask) - 1;
if (Mem->Base != MAX_UINT64) {
Mem->Base &= ~Mask;
}
@ -110,12 +114,12 @@ AdjustRootBridgeResource (
STATIC
VOID
PcatPciRootBridgeBarExisted (
IN UINT64 Address,
OUT UINT32 *OriginalValue,
OUT UINT32 *Value
)
IN UINT64 Address,
OUT UINT32 *OriginalValue,
OUT UINT32 *Value
)
{
UINTN PciAddress;
UINTN PciAddress;
PciAddress = (UINTN)Address;
@ -167,57 +171,61 @@ PcatPciRootBridgeBarExisted (
STATIC
VOID
PcatPciRootBridgeParseBars (
IN UINT16 Command,
IN UINTN Bus,
IN UINTN Device,
IN UINTN Function,
IN UINTN BarOffsetBase,
IN UINTN BarOffsetEnd,
IN PCI_ROOT_BRIDGE_APERTURE *Io,
IN PCI_ROOT_BRIDGE_APERTURE *Mem,
IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
IN PCI_ROOT_BRIDGE_APERTURE *PMem,
IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G
IN UINT16 Command,
IN UINTN Bus,
IN UINTN Device,
IN UINTN Function,
IN UINTN BarOffsetBase,
IN UINTN BarOffsetEnd,
IN PCI_ROOT_BRIDGE_APERTURE *Io,
IN PCI_ROOT_BRIDGE_APERTURE *Mem,
IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
IN PCI_ROOT_BRIDGE_APERTURE *PMem,
IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G
)
)
{
UINT32 OriginalValue;
UINT32 Value;
UINT32 OriginalUpperValue;
UINT32 UpperValue;
UINT64 Mask;
UINTN Offset;
UINTN LowBit;
UINT64 Base;
UINT64 Length;
UINT64 Limit;
PCI_ROOT_BRIDGE_APERTURE *MemAperture;
UINT32 OriginalValue;
UINT32 Value;
UINT32 OriginalUpperValue;
UINT32 UpperValue;
UINT64 Mask;
UINTN Offset;
UINTN LowBit;
UINT64 Base;
UINT64 Length;
UINT64 Limit;
PCI_ROOT_BRIDGE_APERTURE *MemAperture;
for (Offset = BarOffsetBase; Offset < BarOffsetEnd; Offset += sizeof (UINT32)) {
PcatPciRootBridgeBarExisted (
PCI_LIB_ADDRESS (Bus, Device, Function, Offset),
&OriginalValue, &Value
);
&OriginalValue,
&Value
);
if (Value == 0) {
continue;
}
if ((Value & BIT0) == BIT0) {
//
// IO Bar
//
if ((Command & EFI_PCI_COMMAND_IO_SPACE) != 0) {
Mask = 0xfffffffc;
Base = OriginalValue & Mask;
Mask = 0xfffffffc;
Base = OriginalValue & Mask;
Length = ((~(Value & Mask)) & Mask) + 0x04;
if (!(Value & 0xFFFF0000)) {
Length &= 0x0000FFFF;
}
Limit = Base + Length - 1;
if ((Base > 0) && (Base < Limit)) {
if (Io->Base > Base) {
Io->Base = Base;
}
if (Io->Limit < Limit) {
Io->Limit = Limit;
}
@ -228,9 +236,8 @@ PcatPciRootBridgeParseBars (
// Mem Bar
//
if ((Command & EFI_PCI_COMMAND_MEMORY_SPACE) != 0) {
Mask = 0xfffffff0;
Base = OriginalValue & Mask;
Mask = 0xfffffff0;
Base = OriginalValue & Mask;
Length = Value & Mask;
if ((Value & (BIT1 | BIT2)) == 0) {
@ -253,10 +260,10 @@ PcatPciRootBridgeParseBars (
PCI_LIB_ADDRESS (Bus, Device, Function, Offset),
&OriginalUpperValue,
&UpperValue
);
);
Base = Base | LShiftU64 ((UINT64) OriginalUpperValue, 32);
Length = Length | LShiftU64 ((UINT64) UpperValue, 32);
Base = Base | LShiftU64 ((UINT64)OriginalUpperValue, 32);
Length = Length | LShiftU64 ((UINT64)UpperValue, 32);
if (Length != 0) {
LowBit = LowBitSet64 (Length);
Length = LShiftU64 (1ULL, LowBit);
@ -274,6 +281,7 @@ PcatPciRootBridgeParseBars (
if (MemAperture->Base > Base) {
MemAperture->Base = Base;
}
if (MemAperture->Limit < Limit) {
MemAperture->Limit = Limit;
}
@ -292,32 +300,31 @@ PcatPciRootBridgeParseBars (
**/
PCI_ROOT_BRIDGE *
ScanForRootBridges (
OUT UINTN *NumberOfRootBridges
)
OUT UINTN *NumberOfRootBridges
)
{
UINTN PrimaryBus;
UINTN SubBus;
UINT8 Device;
UINT8 Function;
UINTN NumberOfDevices;
UINTN Address;
PCI_TYPE01 Pci;
UINT64 Attributes;
UINT64 Base;
UINT64 Limit;
UINT64 Value;
PCI_ROOT_BRIDGE_APERTURE Io;
PCI_ROOT_BRIDGE_APERTURE Mem;
PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
PCI_ROOT_BRIDGE_APERTURE PMem;
PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
PCI_ROOT_BRIDGE_APERTURE *MemAperture;
PCI_ROOT_BRIDGE *RootBridges;
UINTN BarOffsetEnd;
UINTN PrimaryBus;
UINTN SubBus;
UINT8 Device;
UINT8 Function;
UINTN NumberOfDevices;
UINTN Address;
PCI_TYPE01 Pci;
UINT64 Attributes;
UINT64 Base;
UINT64 Limit;
UINT64 Value;
PCI_ROOT_BRIDGE_APERTURE Io;
PCI_ROOT_BRIDGE_APERTURE Mem;
PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
PCI_ROOT_BRIDGE_APERTURE PMem;
PCI_ROOT_BRIDGE_APERTURE PMemAbove4G;
PCI_ROOT_BRIDGE_APERTURE *MemAperture;
PCI_ROOT_BRIDGE *RootBridges;
UINTN BarOffsetEnd;
*NumberOfRootBridges = 0;
RootBridges = NULL;
RootBridges = NULL;
//
// After scanning all the PCI devices on the PCI root bridge's primary bus,
@ -325,7 +332,7 @@ ScanForRootBridges (
// root bridge's subordinate bus number + 1.
//
for (PrimaryBus = 0; PrimaryBus <= PCI_MAX_BUS; PrimaryBus = SubBus + 1) {
SubBus = PrimaryBus;
SubBus = PrimaryBus;
Attributes = 0;
ZeroMem (&Io, sizeof (Io));
@ -338,9 +345,7 @@ ScanForRootBridges (
// Scan all the PCI devices on the primary bus of the PCI root bridge
//
for (Device = 0, NumberOfDevices = 0; Device <= PCI_MAX_DEVICE; Device++) {
for (Function = 0; Function <= PCI_MAX_FUNC; Function++) {
//
// Compute the PCI configuration address of the PCI device to probe
//
@ -407,16 +412,18 @@ ScanForRootBridges (
// Get the I/O range that the PPB is decoding
//
Value = Pci.Bridge.IoBase & 0x0f;
Base = ((UINT32) Pci.Bridge.IoBase & 0xf0) << 8;
Limit = (((UINT32) Pci.Bridge.IoLimit & 0xf0) << 8) | 0x0fff;
Base = ((UINT32)Pci.Bridge.IoBase & 0xf0) << 8;
Limit = (((UINT32)Pci.Bridge.IoLimit & 0xf0) << 8) | 0x0fff;
if (Value == BIT0) {
Base |= ((UINT32) Pci.Bridge.IoBaseUpper16 << 16);
Limit |= ((UINT32) Pci.Bridge.IoLimitUpper16 << 16);
Base |= ((UINT32)Pci.Bridge.IoBaseUpper16 << 16);
Limit |= ((UINT32)Pci.Bridge.IoLimitUpper16 << 16);
}
if ((Base > 0) && (Base < Limit)) {
if (Io.Base > Base) {
Io.Base = Base;
}
if (Io.Limit < Limit) {
Io.Limit = Limit;
}
@ -425,12 +432,13 @@ ScanForRootBridges (
//
// Get the Memory range that the PPB is decoding
//
Base = ((UINT32) Pci.Bridge.MemoryBase & 0xfff0) << 16;
Limit = (((UINT32) Pci.Bridge.MemoryLimit & 0xfff0) << 16) | 0xfffff;
Base = ((UINT32)Pci.Bridge.MemoryBase & 0xfff0) << 16;
Limit = (((UINT32)Pci.Bridge.MemoryLimit & 0xfff0) << 16) | 0xfffff;
if ((Base > 0) && (Base < Limit)) {
if (Mem.Base > Base) {
Mem.Base = Base;
}
if (Mem.Limit < Limit) {
Mem.Limit = Limit;
}
@ -440,19 +448,21 @@ ScanForRootBridges (
// Get the Prefetchable Memory range that the PPB is decoding
//
Value = Pci.Bridge.PrefetchableMemoryBase & 0x0f;
Base = ((UINT32) Pci.Bridge.PrefetchableMemoryBase & 0xfff0) << 16;
Limit = (((UINT32) Pci.Bridge.PrefetchableMemoryLimit & 0xfff0)
Base = ((UINT32)Pci.Bridge.PrefetchableMemoryBase & 0xfff0) << 16;
Limit = (((UINT32)Pci.Bridge.PrefetchableMemoryLimit & 0xfff0)
<< 16) | 0xfffff;
MemAperture = &PMem;
if (Value == BIT0) {
Base |= LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, 32);
Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32);
Base |= LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, 32);
Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32);
MemAperture = &PMemAbove4G;
}
if ((Base > 0) && (Base < Limit)) {
if (MemAperture->Base > Base) {
MemAperture->Base = Base;
}
if (MemAperture->Limit < Limit) {
MemAperture->Limit = Limit;
}
@ -462,18 +472,22 @@ ScanForRootBridges (
// Look at the PPB Configuration for legacy decoding attributes
//
if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_ISA)
== EFI_PCI_BRIDGE_CONTROL_ISA) {
== EFI_PCI_BRIDGE_CONTROL_ISA)
{
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO_16;
Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;
}
if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_VGA)
== EFI_PCI_BRIDGE_CONTROL_VGA) {
== EFI_PCI_BRIDGE_CONTROL_VGA)
{
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;
if ((Pci.Bridge.BridgeControl & EFI_PCI_BRIDGE_CONTROL_VGA_16)
!= 0) {
!= 0)
{
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO_16;
}
@ -498,22 +512,30 @@ ScanForRootBridges (
OFFSET_OF (PCI_TYPE00, Device.Bar),
BarOffsetEnd,
&Io,
&Mem, &MemAbove4G,
&PMem, &PMemAbove4G
);
&Mem,
&MemAbove4G,
&PMem,
&PMemAbove4G
);
//
// See if the PCI device is an IDE controller
//
if (IS_CLASS2 (&Pci, PCI_CLASS_MASS_STORAGE,
PCI_CLASS_MASS_STORAGE_IDE)) {
if (IS_CLASS2 (
&Pci,
PCI_CLASS_MASS_STORAGE,
PCI_CLASS_MASS_STORAGE_IDE
))
{
if (Pci.Hdr.ClassCode[0] & 0x80) {
Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;
Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;
}
if (Pci.Hdr.ClassCode[0] & 0x01) {
Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;
}
if (Pci.Hdr.ClassCode[0] & 0x04) {
Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;
}
@ -525,7 +547,8 @@ ScanForRootBridges (
//
if (IS_CLASS2 (&Pci, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA) ||
IS_CLASS2 (&Pci, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA)
) {
)
{
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;
@ -538,9 +561,10 @@ ScanForRootBridges (
// or ISA_POSITIVE_DECODE Bridge device
//
if (Pci.Hdr.ClassCode[2] == PCI_CLASS_BRIDGE) {
if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA ||
Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_EISA ||
Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE) {
if ((Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA) ||
(Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_EISA) ||
(Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE))
{
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;
Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO_16;
Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;
@ -551,7 +575,7 @@ ScanForRootBridges (
// If this device is not a multi function device, then skip the rest
// of this PCI device
//
if (Function == 0 && !IS_PCI_MULTI_FUNC (&Pci)) {
if ((Function == 0) && !IS_PCI_MULTI_FUNC (&Pci)) {
break;
}
}
@ -566,17 +590,24 @@ ScanForRootBridges (
(*NumberOfRootBridges) * sizeof (PCI_ROOT_BRIDGE),
(*NumberOfRootBridges + 1) * sizeof (PCI_ROOT_BRIDGE),
RootBridges
);
);
ASSERT (RootBridges != NULL);
AdjustRootBridgeResource (&Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G);
InitRootBridge (
Attributes, Attributes, 0,
(UINT8) PrimaryBus, (UINT8) SubBus,
&Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G,
Attributes,
Attributes,
0,
(UINT8)PrimaryBus,
(UINT8)SubBus,
&Io,
&Mem,
&MemAbove4G,
&PMem,
&PMemAbove4G,
&RootBridges[*NumberOfRootBridges]
);
);
RootBridges[*NumberOfRootBridges].ResourceAssigned = TRUE;
//
// Increment the index for the next PCI Root Bridge
@ -601,26 +632,29 @@ PCI_ROOT_BRIDGE *
RetrieveRootBridgeInfoFromHob (
IN UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo,
OUT UINTN *NumberOfRootBridges
)
)
{
PCI_ROOT_BRIDGE *PciRootBridges;
UINTN Size;
UINT8 Index;
PCI_ROOT_BRIDGE *PciRootBridges;
UINTN Size;
UINT8 Index;
ASSERT (PciRootBridgeInfo != NULL);
ASSERT (NumberOfRootBridges != NULL);
if (PciRootBridgeInfo == NULL) {
return NULL;
}
if (PciRootBridgeInfo->Count == 0) {
return NULL;
}
Size = PciRootBridgeInfo->Count * sizeof (PCI_ROOT_BRIDGE);
PciRootBridges = (PCI_ROOT_BRIDGE *) AllocatePool (Size);
Size = PciRootBridgeInfo->Count * sizeof (PCI_ROOT_BRIDGE);
PciRootBridges = (PCI_ROOT_BRIDGE *)AllocatePool (Size);
ASSERT (PciRootBridges != NULL);
if (PciRootBridges == NULL) {
return NULL;
}
ZeroMem (PciRootBridges, PciRootBridgeInfo->Count * sizeof (PCI_ROOT_BRIDGE));
//
@ -634,13 +668,13 @@ RetrieveRootBridgeInfoFromHob (
PciRootBridges[Index].NoExtendedConfigSpace = PciRootBridgeInfo->RootBridge[Index].NoExtendedConfigSpace;
PciRootBridges[Index].ResourceAssigned = PciRootBridgeInfo->ResourceAssigned;
PciRootBridges[Index].AllocationAttributes = PciRootBridgeInfo->RootBridge[Index].AllocationAttributes;
PciRootBridges[Index].DevicePath = CreateRootBridgeDevicePath(PciRootBridgeInfo->RootBridge[Index].HID, PciRootBridgeInfo->RootBridge[Index].UID);
CopyMem(&PciRootBridges[Index].Bus, &PciRootBridgeInfo->RootBridge[Index].Bus, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
CopyMem(&PciRootBridges[Index].Io, &PciRootBridgeInfo->RootBridge[Index].Io, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
CopyMem(&PciRootBridges[Index].Mem, &PciRootBridgeInfo->RootBridge[Index].Mem, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
CopyMem(&PciRootBridges[Index].MemAbove4G, &PciRootBridgeInfo->RootBridge[Index].MemAbove4G, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
CopyMem(&PciRootBridges[Index].PMem, &PciRootBridgeInfo->RootBridge[Index].PMem, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
CopyMem(&PciRootBridges[Index].PMemAbove4G, &PciRootBridgeInfo->RootBridge[Index].PMemAbove4G, sizeof(UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
PciRootBridges[Index].DevicePath = CreateRootBridgeDevicePath (PciRootBridgeInfo->RootBridge[Index].HID, PciRootBridgeInfo->RootBridge[Index].UID);
CopyMem (&PciRootBridges[Index].Bus, &PciRootBridgeInfo->RootBridge[Index].Bus, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
CopyMem (&PciRootBridges[Index].Io, &PciRootBridgeInfo->RootBridge[Index].Io, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
CopyMem (&PciRootBridges[Index].Mem, &PciRootBridgeInfo->RootBridge[Index].Mem, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
CopyMem (&PciRootBridges[Index].MemAbove4G, &PciRootBridgeInfo->RootBridge[Index].MemAbove4G, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
CopyMem (&PciRootBridges[Index].PMem, &PciRootBridgeInfo->RootBridge[Index].PMem, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
CopyMem (&PciRootBridges[Index].PMemAbove4G, &PciRootBridgeInfo->RootBridge[Index].PMemAbove4G, sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE));
}
*NumberOfRootBridges = PciRootBridgeInfo->Count;

5
UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.c
View File

@ -14,7 +14,7 @@
#include <Library/PciSegmentInfoLib.h>
#include <Library/DebugLib.h>
STATIC PCI_SEGMENT_INFO mPciSegment0 = {
STATIC PCI_SEGMENT_INFO mPciSegment0 = {
0, // Segment number
0, // To be fixed later
0, // Start bus number
@ -51,9 +51,10 @@ GetPciSegmentInfo (
GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);
ASSERT (GuidHob != NULL);
AcpiBoardInfo = (ACPI_BOARD_INFO *) GET_GUID_HOB_DATA (GuidHob);
AcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
mPciSegment0.BaseAddress = AcpiBoardInfo->PcieBaseAddress;
}
*Count = 1;
return &mPciSegment0;
}

119
UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.c
View File

@ -24,22 +24,22 @@ InstallReadyToLock (
VOID
)
{
EFI_STATUS Status;
EFI_HANDLE Handle;
EFI_SMM_ACCESS2_PROTOCOL *SmmAccess;
EFI_STATUS Status;
EFI_HANDLE Handle;
EFI_SMM_ACCESS2_PROTOCOL *SmmAccess;
DEBUG((DEBUG_INFO,"InstallReadyToLock entering......\n"));
DEBUG ((DEBUG_INFO, "InstallReadyToLock entering......\n"));
//
// Inform the SMM infrastructure that we're entering BDS and may run 3rd party code hereafter
// Since PI1.2.1, we need signal EndOfDxe as ExitPmAuth
//
EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
DEBUG((DEBUG_INFO,"All EndOfDxe callbacks have returned successfully\n"));
DEBUG ((DEBUG_INFO, "All EndOfDxe callbacks have returned successfully\n"));
//
// Install DxeSmmReadyToLock protocol in order to lock SMM
//
Status = gBS->LocateProtocol (&gEfiSmmAccess2ProtocolGuid, NULL, (VOID **) &SmmAccess);
Status = gBS->LocateProtocol (&gEfiSmmAccess2ProtocolGuid, NULL, (VOID **)&SmmAccess);
if (!EFI_ERROR (Status)) {
Handle = NULL;
Status = gBS->InstallProtocolInterface (
@ -51,7 +51,7 @@ InstallReadyToLock (
ASSERT_EFI_ERROR (Status);
}
DEBUG((DEBUG_INFO,"InstallReadyToLock end\n"));
DEBUG ((DEBUG_INFO, "InstallReadyToLock end\n"));
return;
}
@ -70,12 +70,12 @@ InstallReadyToLock (
**/
INTN
PlatformFindLoadOption (
IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Key,
IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Array,
IN UINTN Count
)
IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Key,
IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Array,
IN UINTN Count
)
{
UINTN Index;
UINTN Index;
for (Index = 0; Index < Count; Index++) {
if ((Key->OptionType == Array[Index].OptionType) &&
@ -83,8 +83,9 @@ PlatformFindLoadOption (
(StrCmp (Key->Description, Array[Index].Description) == 0) &&
(CompareMem (Key->FilePath, Array[Index].FilePath, GetDevicePathSize (Key->FilePath)) == 0) &&
(Key->OptionalDataSize == Array[Index].OptionalDataSize) &&
(CompareMem (Key->OptionalData, Array[Index].OptionalData, Key->OptionalDataSize) == 0)) {
return (INTN) Index;
(CompareMem (Key->OptionalData, Array[Index].OptionalData, Key->OptionalDataSize) == 0))
{
return (INTN)Index;
}
}
@ -100,28 +101,28 @@ PlatformFindLoadOption (
**/
VOID
PlatformRegisterFvBootOption (
EFI_GUID *FileGuid,
CHAR16 *Description,
UINT32 Attributes
)
EFI_GUID *FileGuid,
CHAR16 *Description,
UINT32 Attributes
)
{
EFI_STATUS Status;
UINTN OptionIndex;
EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
UINTN BootOptionCount;
MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_STATUS Status;
UINTN OptionIndex;
EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
UINTN BootOptionCount;
MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
Status = gBS->HandleProtocol (gImageHandle, &gEfiLoadedImageProtocolGuid, (VOID **) &LoadedImage);
Status = gBS->HandleProtocol (gImageHandle, &gEfiLoadedImageProtocolGuid, (VOID **)&LoadedImage);
ASSERT_EFI_ERROR (Status);
EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
DevicePath = AppendDevicePathNode (
DevicePathFromHandle (LoadedImage->DeviceHandle),
(EFI_DEVICE_PATH_PROTOCOL *) &FileNode
);
(EFI_DEVICE_PATH_PROTOCOL *)&FileNode
);
Status = EfiBootManagerInitializeLoadOption (
&NewOption,
@ -132,16 +133,17 @@ PlatformRegisterFvBootOption (
DevicePath,
NULL,
0
);
);
if (!EFI_ERROR (Status)) {
BootOptions = EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOptionTypeBoot);
OptionIndex = PlatformFindLoadOption (&NewOption, BootOptions, BootOptionCount);
if (OptionIndex == -1) {
Status = EfiBootManagerAddLoadOptionVariable (&NewOption, (UINTN) -1);
Status = EfiBootManagerAddLoadOptionVariable (&NewOption, (UINTN)-1);
ASSERT_EFI_ERROR (Status);
}
EfiBootManagerFreeLoadOption (&NewOption);
EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
}
@ -159,20 +161,21 @@ VOID
EFIAPI
PlatformBootManagerBeforeConsole (
VOID
)
)
{
EFI_INPUT_KEY Enter;
EFI_INPUT_KEY F2;
EFI_INPUT_KEY Down;
EFI_BOOT_MANAGER_LOAD_OPTION BootOption;
EFI_STATUS Status;
EFI_INPUT_KEY Enter;
EFI_INPUT_KEY F2;
EFI_INPUT_KEY Down;
EFI_BOOT_MANAGER_LOAD_OPTION BootOption;
EFI_STATUS Status;
Status = gBS->LocateProtocol (&gUniversalPayloadPlatformBootManagerOverrideProtocolGuid, NULL, (VOID **) &mUniversalPayloadPlatformBootManagerOverrideInstance);
Status = gBS->LocateProtocol (&gUniversalPayloadPlatformBootManagerOverrideProtocolGuid, NULL, (VOID **)&mUniversalPayloadPlatformBootManagerOverrideInstance);
if (EFI_ERROR (Status)) {
mUniversalPayloadPlatformBootManagerOverrideInstance = NULL;
}
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL){
mUniversalPayloadPlatformBootManagerOverrideInstance->BeforeConsole();
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {
mUniversalPayloadPlatformBootManagerOverrideInstance->BeforeConsole ();
return;
}
@ -189,7 +192,7 @@ PlatformBootManagerBeforeConsole (
F2.ScanCode = SCAN_F2;
F2.UnicodeChar = CHAR_NULL;
EfiBootManagerGetBootManagerMenu (&BootOption);
EfiBootManagerAddKeyOptionVariable (NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL);
EfiBootManagerAddKeyOptionVariable (NULL, (UINT16)BootOption.OptionNumber, 0, &F2, NULL);
//
// Also add Down key to Boot Manager Menu since some serial terminals don't support F2 key.
@ -197,7 +200,7 @@ PlatformBootManagerBeforeConsole (
Down.ScanCode = SCAN_DOWN;
Down.UnicodeChar = CHAR_NULL;
EfiBootManagerGetBootManagerMenu (&BootOption);
EfiBootManagerAddKeyOptionVariable (NULL, (UINT16) BootOption.OptionNumber, 0, &Down, NULL);
EfiBootManagerAddKeyOptionVariable (NULL, (UINT16)BootOption.OptionNumber, 0, &Down, NULL);
//
// Install ready to lock.
@ -227,15 +230,16 @@ VOID
EFIAPI
PlatformBootManagerAfterConsole (
VOID
)
)
{
EFI_GRAPHICS_OUTPUT_BLT_PIXEL Black;
EFI_GRAPHICS_OUTPUT_BLT_PIXEL White;
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL){
mUniversalPayloadPlatformBootManagerOverrideInstance->AfterConsole();
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {
mUniversalPayloadPlatformBootManagerOverrideInstance->AfterConsole ();
return;
}
Black.Blue = Black.Green = Black.Red = Black.Reserved = 0;
White.Blue = White.Green = White.Red = White.Reserved = 0xFF;
@ -252,8 +256,7 @@ PlatformBootManagerAfterConsole (
L"F2 or Down to enter Boot Manager Menu.\n"
L"ENTER to boot directly.\n"
L"\n"
);
);
}
/**
@ -264,12 +267,13 @@ PlatformBootManagerAfterConsole (
VOID
EFIAPI
PlatformBootManagerWaitCallback (
UINT16 TimeoutRemain
)
UINT16 TimeoutRemain
)
{
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL){
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {
mUniversalPayloadPlatformBootManagerOverrideInstance->WaitCallback (TimeoutRemain);
}
return;
}
@ -286,9 +290,10 @@ PlatformBootManagerUnableToBoot (
VOID
)
{
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL){
mUniversalPayloadPlatformBootManagerOverrideInstance->UnableToBoot();
if (mUniversalPayloadPlatformBootManagerOverrideInstance != NULL) {
mUniversalPayloadPlatformBootManagerOverrideInstance->UnableToBoot ();
}
return;
}
@ -307,7 +312,7 @@ EFIAPI
PlatformBootManagerLibConstructor (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
)
{
EFI_STATUS Status;
UINTN Size;
@ -324,16 +329,18 @@ PlatformBootManagerLibConstructor (
return EFI_SUCCESS;
}
GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *) GET_GUID_HOB_DATA (GuidHob);
GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *)GET_GUID_HOB_DATA (GuidHob);
if ((sizeof (UNIVERSAL_PAYLOAD_GENERIC_HEADER) > GET_GUID_HOB_DATA_SIZE (GuidHob)) || (GenericHeader->Length > GET_GUID_HOB_DATA_SIZE (GuidHob))) {
return EFI_NOT_FOUND;
}
if (GenericHeader->Revision == UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU_REVISION) {
BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *) GET_GUID_HOB_DATA (GuidHob);
BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *)GET_GUID_HOB_DATA (GuidHob);
if (BootManagerMenuFile->Header.Length < UNIVERSAL_PAYLOAD_SIZEOF_THROUGH_FIELD (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU, FileName)) {
return EFI_NOT_FOUND;
}
Size = sizeof (BootManagerMenuFile->FileName);
Size = sizeof (BootManagerMenuFile->FileName);
Status = PcdSetPtrS (PcdBootManagerMenuFile, &Size, &BootManagerMenuFile->FileName);
ASSERT_EFI_ERROR (Status);
} else {

60
UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformBootManager.h
View File

@ -29,8 +29,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Protocol/SmmAccess2.h>
typedef struct {
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
UINTN ConnectType;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
UINTN ConnectType;
} PLATFORM_CONSOLE_CONNECT_ENTRY;
extern PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[];
@ -42,42 +42,42 @@ extern PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[];
{ END_DEVICE_PATH_LENGTH, 0 },\
}
#define CONSOLE_OUT BIT0
#define CONSOLE_IN BIT1
#define STD_ERROR BIT2
#define CONSOLE_OUT BIT0
#define CONSOLE_IN BIT1
#define STD_ERROR BIT2
#define CLASS_HID 3
#define SUBCLASS_BOOT 1
#define PROTOCOL_KEYBOARD 1
#define CLASS_HID 3
#define SUBCLASS_BOOT 1
#define PROTOCOL_KEYBOARD 1
typedef struct {
USB_CLASS_DEVICE_PATH UsbClass;
EFI_DEVICE_PATH_PROTOCOL End;
USB_CLASS_DEVICE_PATH UsbClass;
EFI_DEVICE_PATH_PROTOCOL End;
} USB_CLASS_FORMAT_DEVICE_PATH;
typedef struct {
VENDOR_DEVICE_PATH VendorDevicePath;
UINT32 Instance;
VENDOR_DEVICE_PATH VendorDevicePath;
UINT32 Instance;
} WIN_NT_VENDOR_DEVICE_PATH_NODE;
//
// Below is the platform console device path
//
typedef struct {
VENDOR_DEVICE_PATH NtBus;
WIN_NT_VENDOR_DEVICE_PATH_NODE SerialDevice;
UART_DEVICE_PATH Uart;
VENDOR_DEVICE_PATH TerminalType;
EFI_DEVICE_PATH_PROTOCOL End;
VENDOR_DEVICE_PATH NtBus;
WIN_NT_VENDOR_DEVICE_PATH_NODE SerialDevice;
UART_DEVICE_PATH Uart;
VENDOR_DEVICE_PATH TerminalType;
EFI_DEVICE_PATH_PROTOCOL End;
} NT_ISA_SERIAL_DEVICE_PATH;
typedef struct {
VENDOR_DEVICE_PATH NtBus;
WIN_NT_VENDOR_DEVICE_PATH_NODE NtGopDevice;
EFI_DEVICE_PATH_PROTOCOL End;
VENDOR_DEVICE_PATH NtBus;
WIN_NT_VENDOR_DEVICE_PATH_NODE NtGopDevice;
EFI_DEVICE_PATH_PROTOCOL End;
} NT_PLATFORM_GOP_DEVICE_PATH;
extern USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath;
extern USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath;
/**
Use SystemTable Conout to stop video based Simple Text Out consoles from going
@ -92,7 +92,7 @@ extern USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath;
EFI_STATUS
PlatformBootManagerEnableQuietBoot (
IN EFI_GUID *LogoFile
);
);
/**
Use SystemTable Conout to turn on video based Simple Text Out consoles. The
@ -104,7 +104,7 @@ PlatformBootManagerEnableQuietBoot (
EFI_STATUS
PlatformBootManagerDisableQuietBoot (
VOID
);
);
/**
Show progress bar with title above it. It only works in Graphics mode.
@ -121,12 +121,12 @@ PlatformBootManagerDisableQuietBoot (
**/
EFI_STATUS
PlatformBootManagerShowProgress (
IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleForeground,
IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleBackground,
IN CHAR16 *Title,
IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL ProgressColor,
IN UINTN Progress,
IN UINTN PreviousValue
);
IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleForeground,
IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleBackground,
IN CHAR16 *Title,
IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL ProgressColor,
IN UINTN Progress,
IN UINTN PreviousValue
);
#endif // _PLATFORM_BOOT_MANAGER_H

236
UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.c
View File

@ -90,11 +90,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
DEVICE_PATH_MESSAGING_PC_ANSI \
}
ACPI_HID_DEVICE_PATH gPnpPs2KeyboardDeviceNode = gPnpPs2Keyboard;
ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode = gPnp16550ComPort;
UART_DEVICE_PATH gUartDeviceNode = gUart;
VENDOR_DEVICE_PATH gTerminalTypeDeviceNode = gPcAnsiTerminal;
VENDOR_DEVICE_PATH gUartDeviceVendorNode = gUartVendor;
ACPI_HID_DEVICE_PATH gPnpPs2KeyboardDeviceNode = gPnpPs2Keyboard;
ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode = gPnp16550ComPort;
UART_DEVICE_PATH gUartDeviceNode = gUart;
VENDOR_DEVICE_PATH gTerminalTypeDeviceNode = gPcAnsiTerminal;
VENDOR_DEVICE_PATH gUartDeviceVendorNode = gUartVendor;
//
// Predefined platform root bridge
@ -104,12 +104,12 @@ PLATFORM_ROOT_BRIDGE_DEVICE_PATH gPlatformRootBridge0 = {
gEndEntire
};
EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[] = {
(EFI_DEVICE_PATH_PROTOCOL *) &gPlatformRootBridge0,
EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[] = {
(EFI_DEVICE_PATH_PROTOCOL *)&gPlatformRootBridge0,
NULL
};
BOOLEAN mDetectVgaOnly;
BOOLEAN mDetectVgaOnly;
/**
Add IsaKeyboard to ConIn; add IsaSerial to ConOut, ConIn, ErrOut.
@ -124,22 +124,23 @@ BOOLEAN mDetectVgaOnly;
**/
EFI_STATUS
PrepareLpcBridgeDevicePath (
IN EFI_HANDLE DeviceHandle
)
IN EFI_HANDLE DeviceHandle
)
{
EFI_STATUS Status;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;
DevicePath = NULL;
Status = gBS->HandleProtocol (
DeviceHandle,
&gEfiDevicePathProtocolGuid,
(VOID*)&DevicePath
);
Status = gBS->HandleProtocol (
DeviceHandle,
&gEfiDevicePathProtocolGuid,
(VOID *)&DevicePath
);
if (EFI_ERROR (Status)) {
return Status;
}
TempDevicePath = DevicePath;
//
@ -175,19 +176,19 @@ PrepareLpcBridgeDevicePath (
**/
EFI_STATUS
GetGopDevicePath (
IN EFI_DEVICE_PATH_PROTOCOL *PciDevicePath,
OUT EFI_DEVICE_PATH_PROTOCOL **GopDevicePath
)
IN EFI_DEVICE_PATH_PROTOCOL *PciDevicePath,
OUT EFI_DEVICE_PATH_PROTOCOL **GopDevicePath
)
{
UINTN Index;
EFI_STATUS Status;
EFI_HANDLE PciDeviceHandle;
EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;
EFI_DEVICE_PATH_PROTOCOL *TempPciDevicePath;
UINTN GopHandleCount;
EFI_HANDLE *GopHandleBuffer;
UINTN Index;
EFI_STATUS Status;
EFI_HANDLE PciDeviceHandle;
EFI_DEVICE_PATH_PROTOCOL *TempDevicePath;
EFI_DEVICE_PATH_PROTOCOL *TempPciDevicePath;
UINTN GopHandleCount;
EFI_HANDLE *GopHandleBuffer;
if (PciDevicePath == NULL || GopDevicePath == NULL) {
if ((PciDevicePath == NULL) || (GopDevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
@ -198,10 +199,10 @@ GetGopDevicePath (
TempPciDevicePath = PciDevicePath;
Status = gBS->LocateDevicePath (
&gEfiDevicePathProtocolGuid,
&TempPciDevicePath,
&PciDeviceHandle
);
&gEfiDevicePathProtocolGuid,
&TempPciDevicePath,
&PciDeviceHandle
);
if (EFI_ERROR (Status)) {
return Status;
}
@ -209,26 +210,28 @@ GetGopDevicePath (
gBS->ConnectController (PciDeviceHandle, NULL, NULL, FALSE);
Status = gBS->LocateHandleBuffer (
ByProtocol,
&gEfiGraphicsOutputProtocolGuid,
NULL,
&GopHandleCount,
&GopHandleBuffer
);
ByProtocol,
&gEfiGraphicsOutputProtocolGuid,
NULL,
&GopHandleCount,
&GopHandleBuffer
);
if (!EFI_ERROR (Status)) {
//
// Add all the child handles as possible Console Device
//
for (Index = 0; Index < GopHandleCount; Index++) {
Status = gBS->HandleProtocol (GopHandleBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID*)&TempDevicePath);
Status = gBS->HandleProtocol (GopHandleBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID *)&TempDevicePath);
if (EFI_ERROR (Status)) {
continue;
}
if (CompareMem (
PciDevicePath,
TempDevicePath,
GetDevicePathSize (PciDevicePath) - END_DEVICE_PATH_LENGTH
) == 0) {
) == 0)
{
//
// In current implementation, we only enable one of the child handles
// as console device, i.e. sotre one of the child handle's device
@ -245,6 +248,7 @@ GetGopDevicePath (
EfiBootManagerUpdateConsoleVariable (ConOut, TempDevicePath, NULL);
}
}
gBS->FreePool (GopHandleBuffer);
}
@ -262,19 +266,19 @@ GetGopDevicePath (
**/
EFI_STATUS
PreparePciVgaDevicePath (
IN EFI_HANDLE DeviceHandle
)
IN EFI_HANDLE DeviceHandle
)
{
EFI_STATUS Status;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
EFI_DEVICE_PATH_PROTOCOL *GopDevicePath;
DevicePath = NULL;
Status = gBS->HandleProtocol (
DeviceHandle,
&gEfiDevicePathProtocolGuid,
(VOID*)&DevicePath
);
Status = gBS->HandleProtocol (
DeviceHandle,
&gEfiDevicePathProtocolGuid,
(VOID *)&DevicePath
);
if (EFI_ERROR (Status)) {
return Status;
}
@ -298,18 +302,18 @@ PreparePciVgaDevicePath (
**/
EFI_STATUS
PreparePciSerialDevicePath (
IN EFI_HANDLE DeviceHandle
)
IN EFI_HANDLE DeviceHandle
)
{
EFI_STATUS Status;
EFI_DEVICE_PATH_PROTOCOL *DevicePath;
DevicePath = NULL;
Status = gBS->HandleProtocol (
DeviceHandle,
&gEfiDevicePathProtocolGuid,
(VOID*)&DevicePath
);
Status = gBS->HandleProtocol (
DeviceHandle,
&gEfiDevicePathProtocolGuid,
(VOID *)&DevicePath
);
if (EFI_ERROR (Status)) {
return Status;
}
@ -318,13 +322,12 @@ PreparePciSerialDevicePath (
DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);
EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);
EfiBootManagerUpdateConsoleVariable (ConIn, DevicePath, NULL);
EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
return EFI_SUCCESS;
}
/**
For every PCI instance execute a callback function.
@ -341,26 +344,26 @@ VisitAllInstancesOfProtocol (
IN EFI_GUID *Id,
IN PROTOCOL_INSTANCE_CALLBACK CallBackFunction,
IN VOID *Context
)
)
{
EFI_STATUS Status;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
VOID *Instance;
EFI_STATUS Status;
UINTN HandleCount;
EFI_HANDLE *HandleBuffer;
UINTN Index;
VOID *Instance;
//
// Start to check all the PciIo to find all possible device
//
HandleCount = 0;
HandleCount = 0;
HandleBuffer = NULL;
Status = gBS->LocateHandleBuffer (
ByProtocol,
Id,
NULL,
&HandleCount,
&HandleBuffer
);
Status = gBS->LocateHandleBuffer (
ByProtocol,
Id,
NULL,
&HandleCount,
&HandleBuffer
);
if (EFI_ERROR (Status)) {
return Status;
}
@ -371,11 +374,11 @@ VisitAllInstancesOfProtocol (
continue;
}
Status = (*CallBackFunction) (
HandleBuffer[Index],
Instance,
Context
);
Status = (*CallBackFunction)(
HandleBuffer[Index],
Instance,
Context
);
}
gBS->FreePool (HandleBuffer);
@ -383,7 +386,6 @@ VisitAllInstancesOfProtocol (
return EFI_SUCCESS;
}
/**
For every PCI instance execute a callback function.
@ -400,37 +402,35 @@ VisitingAPciInstance (
IN EFI_HANDLE Handle,
IN VOID *Instance,
IN VOID *Context
)
)
{
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
PCI_TYPE00 Pci;
EFI_STATUS Status;
EFI_PCI_IO_PROTOCOL *PciIo;
PCI_TYPE00 Pci;
PciIo = (EFI_PCI_IO_PROTOCOL*) Instance;
PciIo = (EFI_PCI_IO_PROTOCOL *)Instance;
//
// Check for all PCI device
//
Status = PciIo->Pci.Read (
PciIo,
EfiPciIoWidthUint32,
0,
sizeof (Pci) / sizeof (UINT32),
&Pci
);
PciIo,
EfiPciIoWidthUint32,
0,
sizeof (Pci) / sizeof (UINT32),
&Pci
);
if (EFI_ERROR (Status)) {
return Status;
}
return (*(VISIT_PCI_INSTANCE_CALLBACK)(UINTN) Context) (
Handle,
PciIo,
&Pci
);
return (*(VISIT_PCI_INSTANCE_CALLBACK)(UINTN)Context)(
Handle,
PciIo,
&Pci
);
}
/**
For every PCI instance execute a callback function.
@ -442,17 +442,16 @@ VisitingAPciInstance (
EFI_STATUS
EFIAPI
VisitAllPciInstances (
IN VISIT_PCI_INSTANCE_CALLBACK CallBackFunction
)
IN VISIT_PCI_INSTANCE_CALLBACK CallBackFunction
)
{
return VisitAllInstancesOfProtocol (
&gEfiPciIoProtocolGuid,
VisitingAPciInstance,
(VOID*)(UINTN) CallBackFunction
);
(VOID *)(UINTN)CallBackFunction
);
}
/**
Do platform specific PCI Device check and add them to
ConOut, ConIn, ErrOut.
@ -471,16 +470,16 @@ DetectAndPreparePlatformPciDevicePath (
IN EFI_HANDLE Handle,
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN PCI_TYPE00 *Pci
)
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = PciIo->Attributes (
PciIo,
EfiPciIoAttributeOperationEnable,
EFI_PCI_DEVICE_ENABLE,
NULL
);
PciIo,
EfiPciIoAttributeOperationEnable,
EFI_PCI_DEVICE_ENABLE,
NULL
);
ASSERT_EFI_ERROR (Status);
if (!mDetectVgaOnly) {
@ -491,7 +490,8 @@ DetectAndPreparePlatformPciDevicePath (
((IS_PCI_ISA_PDECODE (Pci)) &&
(Pci->Hdr.VendorId == 0x8086)
)
) {
)
{
//
// Add IsaKeyboard to ConIn,
// add IsaSerial to ConOut, ConIn, ErrOut
@ -500,6 +500,7 @@ DetectAndPreparePlatformPciDevicePath (
PrepareLpcBridgeDevicePath (Handle);
return EFI_SUCCESS;
}
//
// Here we decide which Serial device to enable in PCI bus
//
@ -528,7 +529,6 @@ DetectAndPreparePlatformPciDevicePath (
return Status;
}
/**
Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut
@ -540,21 +540,20 @@ DetectAndPreparePlatformPciDevicePath (
**/
EFI_STATUS
DetectAndPreparePlatformPciDevicePaths (
BOOLEAN DetectVgaOnly
)
BOOLEAN DetectVgaOnly
)
{
mDetectVgaOnly = DetectVgaOnly;
EfiBootManagerUpdateConsoleVariable (
ConIn,
(EFI_DEVICE_PATH_PROTOCOL *) &gUsbClassKeyboardDevicePath,
(EFI_DEVICE_PATH_PROTOCOL *)&gUsbClassKeyboardDevicePath,
NULL
);
return VisitAllPciInstances (DetectAndPreparePlatformPciDevicePath);
}
/**
The function will connect root bridge
@ -564,19 +563,19 @@ DetectAndPreparePlatformPciDevicePaths (
EFI_STATUS
ConnectRootBridge (
VOID
)
)
{
EFI_STATUS Status;
EFI_HANDLE RootHandle;
EFI_STATUS Status;
EFI_HANDLE RootHandle;
//
// Make all the PCI_IO protocols on PCI Seg 0 show up
//
Status = gBS->LocateDevicePath (
&gEfiDevicePathProtocolGuid,
&gPlatformRootBridges[0],
&RootHandle
);
&gEfiDevicePathProtocolGuid,
&gPlatformRootBridges[0],
&RootHandle
);
if (EFI_ERROR (Status)) {
return Status;
}
@ -598,7 +597,7 @@ VOID
EFIAPI
PlatformConsoleInit (
VOID
)
)
{
gUartDeviceNode.BaudRate = PcdGet64 (PcdUartDefaultBaudRate);
gUartDeviceNode.DataBits = PcdGet8 (PcdUartDefaultDataBits);
@ -611,5 +610,4 @@ PlatformConsoleInit (
// Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut
//
DetectAndPreparePlatformPciDevicePaths (FALSE);
}

14
UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformConsole.h
View File

@ -20,8 +20,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/DevicePathLib.h>
#include <Protocol/PciIo.h>
#define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)
#define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
#define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)
#define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
//
// Type definitions
@ -31,8 +31,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// Platform Root Bridge
//
typedef struct {
ACPI_HID_DEVICE_PATH PciRootBridge;
EFI_DEVICE_PATH_PROTOCOL End;
ACPI_HID_DEVICE_PATH PciRootBridge;
EFI_DEVICE_PATH_PROTOCOL End;
} PLATFORM_ROOT_BRIDGE_DEVICE_PATH;
typedef
@ -41,7 +41,7 @@ EFI_STATUS
IN EFI_HANDLE Handle,
IN VOID *Instance,
IN VOID *Context
);
);
/**
@param[in] Handle - Handle of PCI device instance
@ -54,7 +54,7 @@ EFI_STATUS
IN EFI_HANDLE Handle,
IN EFI_PCI_IO_PROTOCOL *PciIo,
IN PCI_TYPE00 *Pci
);
);
/**
Platform console init. Include the platform firmware vendor, revision
@ -65,6 +65,6 @@ VOID
EFIAPI
PlatformConsoleInit (
VOID
);
);
#endif

9
UefiPayloadPkg/Library/PlatformBootManagerLib/PlatformData.c
View File

@ -11,22 +11,21 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
///
/// Predefined platform default console device path
///
GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[] = {
GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[] = {
{
NULL,
0
}
};
GLOBAL_REMOVE_IF_UNREFERENCED USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath = {
GLOBAL_REMOVE_IF_UNREFERENCED USB_CLASS_FORMAT_DEVICE_PATH gUsbClassKeyboardDevicePath = {
{
{
MESSAGING_DEVICE_PATH,
MSG_USB_CLASS_DP,
{
(UINT8) (sizeof (USB_CLASS_DEVICE_PATH)),
(UINT8) ((sizeof (USB_CLASS_DEVICE_PATH)) >> 8)
(UINT8)(sizeof (USB_CLASS_DEVICE_PATH)),
(UINT8)((sizeof (USB_CLASS_DEVICE_PATH)) >> 8)
}
},
0xffff, // VendorId

8
UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
View File

@ -13,7 +13,6 @@
#include <Library/PcdLib.h>
#include <Library/HobLib.h>
/** Library Constructor
@retval RETURN_SUCCESS Success.
@ -57,13 +56,13 @@ PlatformHookSerialPortInitialize (
return EFI_NOT_FOUND;
}
GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *) GET_GUID_HOB_DATA (GuidHob);
GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *)GET_GUID_HOB_DATA (GuidHob);
if ((sizeof (UNIVERSAL_PAYLOAD_GENERIC_HEADER) > GET_GUID_HOB_DATA_SIZE (GuidHob)) || (GenericHeader->Length > GET_GUID_HOB_DATA_SIZE (GuidHob))) {
return EFI_NOT_FOUND;
}
if (GenericHeader->Revision == UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO_REVISION) {
SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *) GET_GUID_HOB_DATA (GuidHob);
SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *)GET_GUID_HOB_DATA (GuidHob);
if (GenericHeader->Length < UNIVERSAL_PAYLOAD_SIZEOF_THROUGH_FIELD (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO, RegisterBase)) {
//
// Return if can't find the Serial Port Info Hob with enough length
@ -75,14 +74,17 @@ PlatformHookSerialPortInitialize (
if (RETURN_ERROR (Status)) {
return Status;
}
Status = PcdSet64S (PcdSerialRegisterBase, SerialPortInfo->RegisterBase);
if (RETURN_ERROR (Status)) {
return Status;
}
Status = PcdSet32S (PcdSerialRegisterStride, SerialPortInfo->RegisterStride);
if (RETURN_ERROR (Status)) {
return Status;
}
Status = PcdSet32S (PcdSerialBaudRate, SerialPortInfo->BaudRate);
if (RETURN_ERROR (Status)) {
return Status;

1
UefiPayloadPkg/Library/PlatformSupportLibNull/PlatformSupportLibNull.c
View File

@ -26,4 +26,3 @@ ParsePlatformInfo (
{
return EFI_SUCCESS;
}

14
UefiPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c
View File

@ -14,7 +14,7 @@
#include <Library/BaseMemoryLib.h>
#include <Guid/AcpiBoardInfoGuid.h>
ACPI_BOARD_INFO mAcpiBoardInfo;
ACPI_BOARD_INFO mAcpiBoardInfo;
/**
The constructor function to initialize mAcpiBoardInfo.
@ -92,23 +92,23 @@ ResetShutdown (
VOID
)
{
UINTN PmCtrlReg;
UINTN PmCtrlReg;
//
// GPE0_EN should be disabled to avoid any GPI waking up the system from S5
//
IoWrite16 ((UINTN)mAcpiBoardInfo.PmGpeEnBase, 0);
IoWrite16 ((UINTN)mAcpiBoardInfo.PmGpeEnBase, 0);
//
// Clear Power Button Status
//
IoWrite16((UINTN) mAcpiBoardInfo.PmEvtBase, BIT8);
IoWrite16 ((UINTN)mAcpiBoardInfo.PmEvtBase, BIT8);
//
// Transform system into S5 sleep state
//
PmCtrlReg = (UINTN)mAcpiBoardInfo.PmCtrlRegBase;
IoAndThenOr16 (PmCtrlReg, (UINT16) ~0x3c00, (UINT16) (7 << 10));
IoAndThenOr16 (PmCtrlReg, (UINT16) ~0x3c00, (UINT16)(7 << 10));
IoOr16 (PmCtrlReg, BIT13);
CpuDeadLoop ();
@ -129,8 +129,8 @@ ResetShutdown (
VOID
EFIAPI
ResetPlatformSpecific (
IN UINTN DataSize,
IN VOID *ResetData
IN UINTN DataSize,
IN VOID *ResetData
)
{
ResetCold ();

75
UefiPayloadPkg/Library/SblParseLib/SblParseLib.c
View File

@ -33,19 +33,19 @@ GetParameterBase (
VOID
)
{
EFI_HOB_HANDOFF_INFO_TABLE *HandoffTable;
EFI_HOB_HANDOFF_INFO_TABLE *HandoffTable;
HandoffTable = (EFI_HOB_HANDOFF_INFO_TABLE *)(UINTN) GET_BOOTLOADER_PARAMETER ();
HandoffTable = (EFI_HOB_HANDOFF_INFO_TABLE *)(UINTN)GET_BOOTLOADER_PARAMETER ();
if ((HandoffTable->Header.HobType == EFI_HOB_TYPE_HANDOFF) &&
(HandoffTable->Header.HobLength == sizeof (EFI_HOB_HANDOFF_INFO_TABLE)) &&
(HandoffTable->Header.Reserved == 0)) {
(HandoffTable->Header.HobLength == sizeof (EFI_HOB_HANDOFF_INFO_TABLE)) &&
(HandoffTable->Header.Reserved == 0))
{
return (VOID *)HandoffTable;
}
return NULL;
}
/**
This function retrieves a GUIDed HOB data from Slim Bootloader.
@ -60,11 +60,11 @@ GetParameterBase (
**/
VOID *
GetGuidHobDataFromSbl (
IN EFI_GUID *Guid
IN EFI_GUID *Guid
)
{
UINT8 *GuidHob;
CONST VOID *HobList;
UINT8 *GuidHob;
CONST VOID *HobList;
HobList = GetParameterBase ();
ASSERT (HobList != NULL);
@ -89,14 +89,14 @@ GetGuidHobDataFromSbl (
RETURN_STATUS
EFIAPI
ParseMemoryInfo (
IN BL_MEM_INFO_CALLBACK MemInfoCallback,
IN VOID *Params
IN BL_MEM_INFO_CALLBACK MemInfoCallback,
IN VOID *Params
)
{
MEMORY_MAP_INFO *MemoryMapInfo;
UINTN Idx;
MEMORY_MAP_INFO *MemoryMapInfo;
UINTN Idx;
MemoryMapInfo = (MEMORY_MAP_INFO *) GetGuidHobDataFromSbl (&gLoaderMemoryMapInfoGuid);
MemoryMapInfo = (MEMORY_MAP_INFO *)GetGuidHobDataFromSbl (&gLoaderMemoryMapInfoGuid);
if (MemoryMapInfo == NULL) {
ASSERT (FALSE);
return RETURN_NOT_FOUND;
@ -121,10 +121,10 @@ ParseMemoryInfo (
RETURN_STATUS
EFIAPI
ParseSmbiosTable (
OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable
OUT UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable
)
{
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *TableInfo;
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *TableInfo;
TableInfo = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *)GetGuidHobDataFromSbl (&gUniversalPayloadSmbiosTableGuid);
if (TableInfo == NULL) {
@ -137,7 +137,6 @@ ParseSmbiosTable (
return RETURN_SUCCESS;
}
/**
Acquire ACPI table from slim bootloader.
@ -150,10 +149,10 @@ ParseSmbiosTable (
RETURN_STATUS
EFIAPI
ParseAcpiTableInfo (
OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob
OUT UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob
)
{
UNIVERSAL_PAYLOAD_ACPI_TABLE *TableInfo;
UNIVERSAL_PAYLOAD_ACPI_TABLE *TableInfo;
TableInfo = (UNIVERSAL_PAYLOAD_ACPI_TABLE *)GetGuidHobDataFromSbl (&gUniversalPayloadAcpiTableGuid);
if (TableInfo == NULL) {
@ -178,12 +177,12 @@ ParseAcpiTableInfo (
RETURN_STATUS
EFIAPI
ParseSerialInfo (
OUT SERIAL_PORT_INFO *SerialPortInfo
OUT SERIAL_PORT_INFO *SerialPortInfo
)
{
SERIAL_PORT_INFO *BlSerialInfo;
SERIAL_PORT_INFO *BlSerialInfo;
BlSerialInfo = (SERIAL_PORT_INFO *) GetGuidHobDataFromSbl (&gUefiSerialPortInfoGuid);
BlSerialInfo = (SERIAL_PORT_INFO *)GetGuidHobDataFromSbl (&gUefiSerialPortInfoGuid);
if (BlSerialInfo == NULL) {
ASSERT (FALSE);
return RETURN_NOT_FOUND;
@ -194,7 +193,6 @@ ParseSerialInfo (
return RETURN_SUCCESS;
}
/**
Find the video frame buffer information
@ -207,12 +205,12 @@ ParseSerialInfo (
RETURN_STATUS
EFIAPI
ParseGfxInfo (
OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo
OUT EFI_PEI_GRAPHICS_INFO_HOB *GfxInfo
)
{
EFI_PEI_GRAPHICS_INFO_HOB *BlGfxInfo;
EFI_PEI_GRAPHICS_INFO_HOB *BlGfxInfo;
BlGfxInfo = (EFI_PEI_GRAPHICS_INFO_HOB *) GetGuidHobDataFromSbl (&gEfiGraphicsInfoHobGuid);
BlGfxInfo = (EFI_PEI_GRAPHICS_INFO_HOB *)GetGuidHobDataFromSbl (&gEfiGraphicsInfoHobGuid);
if (BlGfxInfo == NULL) {
return RETURN_NOT_FOUND;
}
@ -234,12 +232,12 @@ ParseGfxInfo (
RETURN_STATUS
EFIAPI
ParseGfxDeviceInfo (
OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo
OUT EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *GfxDeviceInfo
)
{
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *BlGfxDeviceInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *BlGfxDeviceInfo;
BlGfxDeviceInfo = (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *) GetGuidHobDataFromSbl (&gEfiGraphicsDeviceInfoHobGuid);
BlGfxDeviceInfo = (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *)GetGuidHobDataFromSbl (&gEfiGraphicsDeviceInfoHobGuid);
if (BlGfxDeviceInfo == NULL) {
return RETURN_NOT_FOUND;
}
@ -263,22 +261,22 @@ ParseMiscInfo (
VOID
)
{
RETURN_STATUS Status;
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *BlRootBridgesHob;
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PldRootBridgesHob;
RETURN_STATUS Status;
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *BlRootBridgesHob;
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PldRootBridgesHob;
Status = RETURN_NOT_FOUND;
BlRootBridgesHob = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *) GetGuidHobDataFromSbl (
&gUniversalPayloadPciRootBridgeInfoGuid
);
Status = RETURN_NOT_FOUND;
BlRootBridgesHob = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *)GetGuidHobDataFromSbl (
&gUniversalPayloadPciRootBridgeInfoGuid
);
if (BlRootBridgesHob != NULL) {
//
// Migrate bootloader root bridge info hob from bootloader to payload.
//
PldRootBridgesHob = BuildGuidHob (
&gUniversalPayloadPciRootBridgeInfoGuid,
BlRootBridgesHob->Header.Length
);
&gUniversalPayloadPciRootBridgeInfoGuid,
BlRootBridgesHob->Header.Length
);
ASSERT (PldRootBridgesHob != NULL);
if (PldRootBridgesHob != NULL) {
CopyMem (PldRootBridgesHob, BlRootBridgesHob, BlRootBridgesHob->Header.Length);
@ -291,4 +289,3 @@ ParseMiscInfo (
return Status;
}

45
UefiPayloadPkg/Library/SpiFlashLib/PchSpi.c
View File

@ -16,7 +16,7 @@
**/
UINT32
AcquireSpiBar0 (
IN UINTN PchSpiBase
IN UINTN PchSpiBase
)
{
return MmioRead32 (PchSpiBase + R_SPI_BASE) & ~(B_SPI_BAR0_MASK);
@ -30,13 +30,11 @@ AcquireSpiBar0 (
**/
VOID
ReleaseSpiBar0 (
IN UINTN PchSpiBase
IN UINTN PchSpiBase
)
{
}
/**
This function is to enable/disable BIOS Write Protect in SMM phase.
@ -45,22 +43,22 @@ ReleaseSpiBar0 (
**/
VOID
CpuSmmDisableBiosWriteProtect (
IN BOOLEAN EnableSmmSts
IN BOOLEAN EnableSmmSts
)
{
UINT32 Data32;
UINT32 Data32;
if(EnableSmmSts){
if (EnableSmmSts) {
//
// Disable BIOS Write Protect in SMM phase.
//
Data32 = MmioRead32 ((UINTN) (0xFED30880)) | (UINT32) (BIT0);
Data32 = MmioRead32 ((UINTN)(0xFED30880)) | (UINT32)(BIT0);
AsmWriteMsr32 (0x000001FE, Data32);
} else {
//
// Enable BIOS Write Protect in SMM phase
//
Data32 = MmioRead32 ((UINTN) (0xFED30880)) & (UINT32) (~BIT0);
Data32 = MmioRead32 ((UINTN)(0xFED30880)) & (UINT32)(~BIT0);
AsmWriteMsr32 (0x000001FE, Data32);
}
@ -70,7 +68,6 @@ CpuSmmDisableBiosWriteProtect (
Data32 = MmioRead32 (0xFED30880);
}
/**
This function is a hook for Spi to disable BIOS Write Protect.
@ -84,11 +81,10 @@ CpuSmmDisableBiosWriteProtect (
EFI_STATUS
EFIAPI
DisableBiosWriteProtect (
IN UINTN PchSpiBase,
IN UINT8 CpuSmmBwp
IN UINTN PchSpiBase,
IN UINT8 CpuSmmBwp
)
{
//
// Write clear BC_SYNC_SS prior to change WPD from 0 to 1.
//
@ -116,15 +112,14 @@ DisableBiosWriteProtect (
VOID
EFIAPI
EnableBiosWriteProtect (
IN UINTN PchSpiBase,
IN UINT8 CpuSmmBwp
IN UINTN PchSpiBase,
IN UINT8 CpuSmmBwp
)
{
//
// Disable the access to the BIOS space for write cycles
//
MmioAnd8 (PchSpiBase + R_SPI_BCR, (UINT8) (~B_SPI_BCR_BIOSWE));
MmioAnd8 (PchSpiBase + R_SPI_BCR, (UINT8)(~B_SPI_BCR_BIOSWE));
if (CpuSmmBwp != 0) {
CpuSmmDisableBiosWriteProtect (FALSE);
@ -142,16 +137,18 @@ EnableBiosWriteProtect (
**/
UINT8
SaveAndDisableSpiPrefetchCache (
IN UINTN PchSpiBase
IN UINTN PchSpiBase
)
{
UINT8 BiosCtlSave;
UINT8 BiosCtlSave;
BiosCtlSave = MmioRead8 (PchSpiBase + R_SPI_BCR) & B_SPI_BCR_SRC;
MmioAndThenOr32 (PchSpiBase + R_SPI_BCR, \
(UINT32) (~B_SPI_BCR_SRC), \
(UINT32) (V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS << B_SPI_BCR_SRC));
MmioAndThenOr32 (
PchSpiBase + R_SPI_BCR, \
(UINT32)(~B_SPI_BCR_SRC), \
(UINT32)(V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS << B_SPI_BCR_SRC)
);
return BiosCtlSave;
}
@ -165,8 +162,8 @@ SaveAndDisableSpiPrefetchCache (
**/
VOID
SetSpiBiosControlRegister (
IN UINTN PchSpiBase,
IN UINT8 BiosCtlValue
IN UINTN PchSpiBase,
IN UINT8 BiosCtlValue
)
{
MmioAndThenOr8 (PchSpiBase + R_SPI_BCR, (UINT8) ~B_SPI_BCR_SRC, BiosCtlValue);

179
UefiPayloadPkg/Library/SpiFlashLib/RegsSpi.h
View File

@ -9,121 +9,112 @@
#ifndef REGS_SPI_H_
#define REGS_SPI_H_
#define R_SPI_BASE 0x10 ///< 32-bit Memory Base Address Register
#define B_SPI_BAR0_MASK 0x0FFF
#define R_SPI_BCR 0xDC ///< BIOS Control Register
#define B_SPI_BCR_SRC (BIT3 | BIT2) ///< SPI Read Configuration (SRC)
#define V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS 0x04 ///< Prefetch Disable, Cache Disable
#define B_SPI_BCR_SYNC_SS BIT8
#define B_SPI_BCR_BIOSWE BIT0 ///< Write Protect Disable (WPD)
#define R_SPI_BASE 0x10 ///< 32-bit Memory Base Address Register
#define B_SPI_BAR0_MASK 0x0FFF
#define R_SPI_BCR 0xDC ///< BIOS Control Register
#define B_SPI_BCR_SRC (BIT3 | BIT2) ///< SPI Read Configuration (SRC)
#define V_SPI_BCR_SRC_PREF_DIS_CACHE_DIS 0x04 ///< Prefetch Disable, Cache Disable
#define B_SPI_BCR_SYNC_SS BIT8
#define B_SPI_BCR_BIOSWE BIT0 ///< Write Protect Disable (WPD)
///
/// SPI Host Interface Registers
#define R_SPI_HSFS 0x04 ///< Hardware Sequencing Flash Status and Control Register(32bits)
#define B_SPI_HSFS_FDBC_MASK 0x3F000000 ///< Flash Data Byte Count ( <= 64), Count = (Value in this field) + 1.
#define N_SPI_HSFS_FDBC 24
#define B_SPI_HSFS_CYCLE_MASK 0x001E0000 ///< Flash Cycle.
#define N_SPI_HSFS_CYCLE 17
#define V_SPI_HSFS_CYCLE_READ 0 ///< Flash Cycle Read
#define V_SPI_HSFS_CYCLE_WRITE 2 ///< Flash Cycle Write
#define V_SPI_HSFS_CYCLE_4K_ERASE 3 ///< Flash Cycle 4K Block Erase
#define V_SPI_HSFS_CYCLE_64K_ERASE 4 ///< Flash Cycle 64K Sector Erase
#define V_SPI_HSFS_CYCLE_READ_SFDP 5 ///< Flash Cycle Read SFDP
#define V_SPI_HSFS_CYCLE_READ_JEDEC_ID 6 ///< Flash Cycle Read JEDEC ID
#define V_SPI_HSFS_CYCLE_WRITE_STATUS 7 ///< Flash Cycle Write Status
#define V_SPI_HSFS_CYCLE_READ_STATUS 8 ///< Flash Cycle Read Status
#define B_SPI_HSFS_CYCLE_FGO BIT16 ///< Flash Cycle Go.
#define B_SPI_HSFS_FDV BIT14 ///< Flash Descriptor Valid
#define B_SPI_HSFS_SCIP BIT5 ///< SPI Cycle in Progress
#define B_SPI_HSFS_FCERR BIT1 ///< Flash Cycle Error
#define B_SPI_HSFS_FDONE BIT0 ///< Flash Cycle Done
#define R_SPI_HSFS 0x04 ///< Hardware Sequencing Flash Status and Control Register(32bits)
#define B_SPI_HSFS_FDBC_MASK 0x3F000000 ///< Flash Data Byte Count ( <= 64), Count = (Value in this field) + 1.
#define N_SPI_HSFS_FDBC 24
#define B_SPI_HSFS_CYCLE_MASK 0x001E0000 ///< Flash Cycle.
#define N_SPI_HSFS_CYCLE 17
#define V_SPI_HSFS_CYCLE_READ 0 ///< Flash Cycle Read
#define V_SPI_HSFS_CYCLE_WRITE 2 ///< Flash Cycle Write
#define V_SPI_HSFS_CYCLE_4K_ERASE 3 ///< Flash Cycle 4K Block Erase
#define V_SPI_HSFS_CYCLE_64K_ERASE 4 ///< Flash Cycle 64K Sector Erase
#define V_SPI_HSFS_CYCLE_READ_SFDP 5 ///< Flash Cycle Read SFDP
#define V_SPI_HSFS_CYCLE_READ_JEDEC_ID 6 ///< Flash Cycle Read JEDEC ID
#define V_SPI_HSFS_CYCLE_WRITE_STATUS 7 ///< Flash Cycle Write Status
#define V_SPI_HSFS_CYCLE_READ_STATUS 8 ///< Flash Cycle Read Status
#define B_SPI_HSFS_CYCLE_FGO BIT16 ///< Flash Cycle Go.
#define B_SPI_HSFS_FDV BIT14 ///< Flash Descriptor Valid
#define B_SPI_HSFS_SCIP BIT5 ///< SPI Cycle in Progress
#define B_SPI_HSFS_FCERR BIT1 ///< Flash Cycle Error
#define B_SPI_HSFS_FDONE BIT0 ///< Flash Cycle Done
#define R_SPI_FADDR 0x08 ///< SPI Flash Address
#define B_SPI_FADDR_MASK 0x07FFFFFF ///< SPI Flash Address Mask (0~26bit)
#define R_SPI_FADDR 0x08 ///< SPI Flash Address
#define B_SPI_FADDR_MASK 0x07FFFFFF ///< SPI Flash Address Mask (0~26bit)
#define R_SPI_FDATA00 0x10 ///< SPI Data 00 (32 bits)
#define R_SPI_FRAP 0x50 ///< SPI Flash Regions Access Permissions Register
#define B_SPI_FRAP_BRWA_PLATFORM BIT12 // < Region write access for Region4 PlatformData
#define B_SPI_FRAP_BRWA_GBE BIT11 // < Region write access for Region3 GbE
#define B_SPI_FRAP_BRWA_SEC BIT10 ///< Region Write Access for Region2 SEC
#define B_SPI_FRAP_BRWA_BIOS BIT9 ///< Region Write Access for Region1 BIOS
#define B_SPI_FRAP_BRWA_FLASHD BIT8 ///< Region Write Access for Region0 Flash Descriptor
#define B_SPI_FRAP_BRRA_PLATFORM BIT4 ///< Region read access for Region4 PlatformData
#define B_SPI_FRAP_BRRA_GBE BIT3 ///< Region read access for Region3 GbE
#define B_SPI_FRAP_BRRA_SEC BIT2 ///< Region Read Access for Region2 SEC
#define B_SPI_FRAP_BRRA_BIOS BIT1 ///< Region Read Access for Region1 BIOS
#define B_SPI_FRAP_BRRA_FLASHD BIT0 ///< Region Read Access for Region0 Flash Descriptor
#define R_SPI_FDATA00 0x10 ///< SPI Data 00 (32 bits)
#define R_SPI_FREG0_FLASHD 0x54 ///< Flash Region 0 (Flash Descriptor) (32bits)
#define B_SPI_FREG0_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG0_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]
#define B_SPI_FREG0_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG0_BASE 12 ///< Bit 14:0 identifies address bits [26:2]
#define R_SPI_FRAP 0x50 ///< SPI Flash Regions Access Permissions Register
#define B_SPI_FRAP_BRWA_PLATFORM BIT12 //< Region write access for Region4 PlatformData
#define B_SPI_FRAP_BRWA_GBE BIT11 //< Region write access for Region3 GbE
#define B_SPI_FRAP_BRWA_SEC BIT10 ///< Region Write Access for Region2 SEC
#define B_SPI_FRAP_BRWA_BIOS BIT9 ///< Region Write Access for Region1 BIOS
#define B_SPI_FRAP_BRWA_FLASHD BIT8 ///< Region Write Access for Region0 Flash Descriptor
#define B_SPI_FRAP_BRRA_PLATFORM BIT4 ///< Region read access for Region4 PlatformData
#define B_SPI_FRAP_BRRA_GBE BIT3 ///< Region read access for Region3 GbE
#define B_SPI_FRAP_BRRA_SEC BIT2 ///< Region Read Access for Region2 SEC
#define B_SPI_FRAP_BRRA_BIOS BIT1 ///< Region Read Access for Region1 BIOS
#define B_SPI_FRAP_BRRA_FLASHD BIT0 ///< Region Read Access for Region0 Flash Descriptor
#define R_SPI_FREG1_BIOS 0x58 ///< Flash Region 1 (BIOS) (32bits)
#define B_SPI_FREG1_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG1_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]
#define B_SPI_FREG1_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG1_BASE 12 ///< Bit 14:0 identifies address bits [26:2]
#define R_SPI_FREG2_SEC 0x5C ///< Flash Region 2 (SEC) (32bits)
#define B_SPI_FREG2_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG2_LIMIT 4 // < Bit 30:16 identifies address bits [26:12]
#define B_SPI_FREG2_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG2_BASE 12 // < Bit 14:0 identifies address bits [26:2]
#define R_SPI_FREG0_FLASHD 0x54 ///< Flash Region 0 (Flash Descriptor) (32bits)
#define B_SPI_FREG0_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG0_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]
#define B_SPI_FREG0_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG0_BASE 12 ///< Bit 14:0 identifies address bits [26:2]
#define R_SPI_FREG3_GBE 0x60 // < Flash Region 3(GbE)(32bits)
#define B_SPI_FREG3_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG3_LIMIT 4 // < Bit 30:16 identifies address bits [26:12]
#define B_SPI_FREG3_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG3_BASE 12 // < Bit 14:0 identifies address bits [26:2]
#define R_SPI_FREG1_BIOS 0x58 ///< Flash Region 1 (BIOS) (32bits)
#define B_SPI_FREG1_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG1_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]
#define B_SPI_FREG1_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG1_BASE 12 ///< Bit 14:0 identifies address bits [26:2]
#define R_SPI_FREG4_PLATFORM_DATA 0x64 ///< Flash Region 4 (Platform Data) (32bits)
#define B_SPI_FREG4_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG4_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]
#define B_SPI_FREG4_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG4_BASE 12 ///< Bit 14:0 identifies address bits [26:2]
#define R_SPI_FREG2_SEC 0x5C ///< Flash Region 2 (SEC) (32bits)
#define B_SPI_FREG2_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG2_LIMIT 4 //< Bit 30:16 identifies address bits [26:12]
#define B_SPI_FREG2_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG2_BASE 12 //< Bit 14:0 identifies address bits [26:2]
#define S_SPI_FREGX 4 ///< Size of Flash Region register
#define B_SPI_FREGX_LIMIT_MASK 0x7FFF0000 ///< Flash Region Limit [30:16] represents [26:12], [11:0] are assumed to be FFFh
#define N_SPI_FREGX_LIMIT 16 ///< Region limit bit position
#define N_SPI_FREGX_LIMIT_REPR 12 ///< Region limit bit represents position
#define B_SPI_FREGX_BASE_MASK 0x00007FFF ///< Flash Region Base, [14:0] represents [26:12]
#define R_SPI_FREG3_GBE 0x60 //< Flash Region 3(GbE)(32bits)
#define B_SPI_FREG3_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG3_LIMIT 4 //< Bit 30:16 identifies address bits [26:12]
#define B_SPI_FREG3_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG3_BASE 12 //< Bit 14:0 identifies address bits [26:2]
#define R_SPI_FDOC 0xB4 ///< Flash Descriptor Observability Control Register (32 bits)
#define B_SPI_FDOC_FDSS_MASK (BIT14 | BIT13 | BIT12) ///< Flash Descriptor Section Select
#define V_SPI_FDOC_FDSS_FSDM 0x0000 ///< Flash Signature and Descriptor Map
#define V_SPI_FDOC_FDSS_COMP 0x1000 ///< Component
#define B_SPI_FDOC_FDSI_MASK 0x0FFC ///< Flash Descriptor Section Index
#define R_SPI_FREG4_PLATFORM_DATA 0x64 ///< Flash Region 4 (Platform Data) (32bits)
#define B_SPI_FREG4_LIMIT_MASK 0x7FFF0000 ///< Size, [30:16] here represents limit[26:12]
#define N_SPI_FREG4_LIMIT 4 ///< Bit 30:16 identifies address bits [26:12]
#define B_SPI_FREG4_BASE_MASK 0x00007FFF ///< Base, [14:0] here represents base [26:12]
#define N_SPI_FREG4_BASE 12 ///< Bit 14:0 identifies address bits [26:2]
#define R_SPI_FDOD 0xB8 ///< Flash Descriptor Observability Data Register (32 bits)
#define R_SPI_LVSCC 0xC4 ///< Vendor Specific Component Capabilities for Component 0 (32 bits)
#define B_SPI_LVSCC_EO_64K BIT29 ///< < 64k Erase valid (EO_64k_valid)
#define S_SPI_FREGX 4 ///< Size of Flash Region register
#define B_SPI_FREGX_LIMIT_MASK 0x7FFF0000 ///< Flash Region Limit [30:16] represents [26:12], [11:0] are assumed to be FFFh
#define N_SPI_FREGX_LIMIT 16 ///< Region limit bit position
#define N_SPI_FREGX_LIMIT_REPR 12 ///< Region limit bit represents position
#define B_SPI_FREGX_BASE_MASK 0x00007FFF ///< Flash Region Base, [14:0] represents [26:12]
#define R_SPI_UVSCC 0xC8 ///< Vendor Specific Component Capabilities for Component 1 (32 bits)
#define R_SPI_FDBAR_FLASH_MAP0 0x14 ///< Flash MAP 0
#define N_SPI_FDBAR_NC 8 ///< < Number Of Components
#define B_SPI_FDBAR_NC 0x00000300 ///< Number Of Components
#define R_SPI_FDOC 0xB4 ///< Flash Descriptor Observability Control Register (32 bits)
#define B_SPI_FDOC_FDSS_MASK (BIT14 | BIT13 | BIT12) ///< Flash Descriptor Section Select
#define V_SPI_FDOC_FDSS_FSDM 0x0000 ///< Flash Signature and Descriptor Map
#define V_SPI_FDOC_FDSS_COMP 0x1000 ///< Component
#define B_SPI_FDOC_FDSI_MASK 0x0FFC ///< Flash Descriptor Section Index
#define R_SPI_FDOD 0xB8 ///< Flash Descriptor Observability Data Register (32 bits)
#define R_SPI_LVSCC 0xC4 ///<Vendor Specific Component Capabilities for Component 0 (32 bits)
#define B_SPI_LVSCC_EO_64K BIT29 ///<< 64k Erase valid (EO_64k_valid)
#define R_SPI_UVSCC 0xC8 ///< Vendor Specific Component Capabilities for Component 1 (32 bits)
#define R_SPI_FDBAR_FLASH_MAP0 0x14 ///< Flash MAP 0
#define N_SPI_FDBAR_NC 8 ///<< Number Of Components
#define B_SPI_FDBAR_NC 0x00000300 ///< Number Of Components
#define R_SPI_FDBAR_FLASH_MAP1 0x18 ///< Flash MAP 1
#define B_SPI_FDBAR_FPSBA 0x00FF0000 ///< Flash Strap Base Address
#define R_SPI_FDBAR_FLASH_MAP1 0x18 ///< Flash MAP 1
#define B_SPI_FDBAR_FPSBA 0x00FF0000 ///< Flash Strap Base Address
//
// Flash Component Base Address (FCBA) from Flash Region 0
//
#define R_SPI_FCBA_FLCOMP 0x00 ///< Flash Components Register
#define B_SPI_FLCOMP_COMP1_MASK 0x0F ///< Flash Component 1 Density
#define R_SPI_FCBA_FLCOMP 0x00 ///< Flash Components Register
#define B_SPI_FLCOMP_COMP1_MASK 0x0F ///< Flash Component 1 Density
#endif

53
UefiPayloadPkg/Library/SpiFlashLib/SpiCommon.h
View File

@ -28,8 +28,8 @@
/// Wait Time = 6 seconds = 6000000 microseconds
/// Wait Period = 10 microseconds
///
#define WAIT_TIME 6000000 ///< Wait Time = 6 seconds = 6000000 microseconds
#define WAIT_PERIOD 10 ///< Wait Period = 10 microseconds
#define WAIT_TIME 6000000 ///< Wait Time = 6 seconds = 6000000 microseconds
#define WAIT_PERIOD 10 ///< Wait Period = 10 microseconds
///
/// Flash cycle Type
@ -60,20 +60,19 @@ typedef enum {
#define SC_SPI_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('P', 'S', 'P', 'I')
typedef struct {
UINTN Signature;
EFI_HANDLE Handle;
UINT32 AcpiTmrReg;
UINTN PchSpiBase;
UINT16 RegionPermission;
UINT32 SfdpVscc0Value;
UINT32 SfdpVscc1Value;
UINT32 StrapBaseAddress;
UINT8 NumberOfComponents;
UINT16 Flags;
UINT32 Component1StartAddr;
UINTN Signature;
EFI_HANDLE Handle;
UINT32 AcpiTmrReg;
UINTN PchSpiBase;
UINT16 RegionPermission;
UINT32 SfdpVscc0Value;
UINT32 SfdpVscc1Value;
UINT32 StrapBaseAddress;
UINT8 NumberOfComponents;
UINT16 Flags;
UINT32 Component1StartAddr;
} SPI_INSTANCE;
/**
Acquire SPI MMIO BAR
@ -84,10 +83,9 @@ typedef struct {
**/
UINT32
AcquireSpiBar0 (
IN UINTN PchSpiBase
IN UINTN PchSpiBase
);
/**
Release SPI MMIO BAR. Do nothing.
@ -98,10 +96,9 @@ AcquireSpiBar0 (
**/
VOID
ReleaseSpiBar0 (
IN UINTN PchSpiBase
IN UINTN PchSpiBase
);
/**
This function is a hook for Spi to disable BIOS Write Protect
@ -115,8 +112,8 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
DisableBiosWriteProtect (
IN UINTN PchSpiBase,
IN UINT8 CpuSmmBwp
IN UINTN PchSpiBase,
IN UINT8 CpuSmmBwp
);
/**
@ -131,11 +128,10 @@ DisableBiosWriteProtect (
VOID
EFIAPI
EnableBiosWriteProtect (
IN UINTN PchSpiBase,
IN UINT8 CpuSmmBwp
IN UINTN PchSpiBase,
IN UINT8 CpuSmmBwp
);
/**
This function disables SPI Prefetching and caching,
and returns previous BIOS Control Register value before disabling.
@ -147,7 +143,7 @@ EnableBiosWriteProtect (
**/
UINT8
SaveAndDisableSpiPrefetchCache (
IN UINTN PchSpiBase
IN UINTN PchSpiBase
);
/**
@ -161,11 +157,10 @@ SaveAndDisableSpiPrefetchCache (
**/
VOID
SetSpiBiosControlRegister (
IN UINTN PchSpiBase,
IN UINT8 BiosCtlValue
IN UINTN PchSpiBase,
IN UINT8 BiosCtlValue
);
/**
This function sends the programmed SPI command to the slave device.
@ -201,8 +196,8 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
IN UINT32 PchSpiBar0,
IN BOOLEAN ErrorCheck
IN UINT32 PchSpiBar0,
IN BOOLEAN ErrorCheck
);
#endif

402
UefiPayloadPkg/Library/SpiFlashLib/SpiFlashLib.c
View File

@ -7,7 +7,7 @@
**/
#include "SpiCommon.h"
SPI_INSTANCE *mSpiInstance = NULL;
SPI_INSTANCE *mSpiInstance = NULL;
/**
Get SPI Instance from library global data..
@ -17,20 +17,20 @@ SPI_INSTANCE *mSpiInstance = NULL;
SPI_INSTANCE *
GetSpiInstance (
VOID
)
)
{
if (mSpiInstance == NULL) {
mSpiInstance = AllocatePool (sizeof(SPI_INSTANCE));
mSpiInstance = AllocatePool (sizeof (SPI_INSTANCE));
if (mSpiInstance == NULL) {
return NULL;
}
ZeroMem (mSpiInstance, sizeof(SPI_INSTANCE));
ZeroMem (mSpiInstance, sizeof (SPI_INSTANCE));
}
return mSpiInstance;
}
/**
Initialize an SPI library.
@ -43,11 +43,11 @@ SpiConstructor (
VOID
)
{
UINT32 ScSpiBar0;
UINT8 Comp0Density;
SPI_INSTANCE *SpiInstance;
EFI_HOB_GUID_TYPE *GuidHob;
SPI_FLASH_INFO *SpiFlashInfo;
UINT32 ScSpiBar0;
UINT8 Comp0Density;
SPI_INSTANCE *SpiInstance;
EFI_HOB_GUID_TYPE *GuidHob;
SPI_FLASH_INFO *SpiFlashInfo;
//
// Find SPI flash hob
@ -57,7 +57,8 @@ SpiConstructor (
ASSERT (FALSE);
return EFI_NOT_FOUND;
}
SpiFlashInfo = (SPI_FLASH_INFO *) GET_GUID_HOB_DATA (GuidHob);
SpiFlashInfo = (SPI_FLASH_INFO *)GET_GUID_HOB_DATA (GuidHob);
//
// Initialize the SPI instance
@ -66,10 +67,11 @@ SpiConstructor (
if (SpiInstance == NULL) {
return EFI_NOT_FOUND;
}
DEBUG ((DEBUG_INFO, "SpiInstance = %08X\n", SpiInstance));
SpiInstance->Signature = SC_SPI_PRIVATE_DATA_SIGNATURE;
SpiInstance->Handle = NULL;
SpiInstance->Signature = SC_SPI_PRIVATE_DATA_SIGNATURE;
SpiInstance->Handle = NULL;
//
// Check the SPI address
@ -77,9 +79,11 @@ SpiConstructor (
if ((SpiFlashInfo->SpiAddress.AddressSpaceId != EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE) ||
(SpiFlashInfo->SpiAddress.RegisterBitWidth != 32) ||
(SpiFlashInfo->SpiAddress.RegisterBitOffset != 0) ||
(SpiFlashInfo->SpiAddress.AccessSize != EFI_ACPI_3_0_DWORD)){
(SpiFlashInfo->SpiAddress.AccessSize != EFI_ACPI_3_0_DWORD))
{
DEBUG ((DEBUG_ERROR, "SPI FLASH HOB is not expected. need check the hob or enhance SPI flash driver.\n"));
}
SpiInstance->PchSpiBase = (UINT32)(UINTN)SpiFlashInfo->SpiAddress.Address;
SpiInstance->Flags = SpiFlashInfo->Flags;
DEBUG ((DEBUG_INFO, "PchSpiBase at 0x%x\n", SpiInstance->PchSpiBase));
@ -106,34 +110,34 @@ SpiConstructor (
//
MmioAndThenOr32 (
ScSpiBar0 + R_SPI_FDOC,
(UINT32) (~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),
(UINT32) (V_SPI_FDOC_FDSS_FSDM | R_SPI_FDBAR_FLASH_MAP0)
(UINT32)(~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),
(UINT32)(V_SPI_FDOC_FDSS_FSDM | R_SPI_FDBAR_FLASH_MAP0)
);
//
// Copy Zero based Number Of Components
//
SpiInstance->NumberOfComponents = (UINT8) ((MmioRead16 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FDBAR_NC) >> N_SPI_FDBAR_NC);
SpiInstance->NumberOfComponents = (UINT8)((MmioRead16 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FDBAR_NC) >> N_SPI_FDBAR_NC);
MmioAndThenOr32 (
ScSpiBar0 + R_SPI_FDOC,
(UINT32) (~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),
(UINT32) (V_SPI_FDOC_FDSS_COMP | R_SPI_FCBA_FLCOMP)
(UINT32)(~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),
(UINT32)(V_SPI_FDOC_FDSS_COMP | R_SPI_FCBA_FLCOMP)
);
//
// Copy Component 0 Density
//
Comp0Density = (UINT8) MmioRead32 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FLCOMP_COMP1_MASK;
SpiInstance->Component1StartAddr = (UINT32) (SIZE_512KB << Comp0Density);
Comp0Density = (UINT8)MmioRead32 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FLCOMP_COMP1_MASK;
SpiInstance->Component1StartAddr = (UINT32)(SIZE_512KB << Comp0Density);
//
// Select FLASH_MAP1 to get Flash SC Strap Base Address
//
MmioAndThenOr32 (
(ScSpiBar0 + R_SPI_FDOC),
(UINT32) (~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),
(UINT32) (V_SPI_FDOC_FDSS_FSDM | R_SPI_FDBAR_FLASH_MAP1)
(UINT32)(~(B_SPI_FDOC_FDSS_MASK | B_SPI_FDOC_FDSI_MASK)),
(UINT32)(V_SPI_FDOC_FDSS_FSDM | R_SPI_FDBAR_FLASH_MAP1)
);
SpiInstance->StrapBaseAddress = MmioRead32 (ScSpiBar0 + R_SPI_FDOD) & B_SPI_FDBAR_FPSBA;
@ -146,7 +150,6 @@ SpiConstructor (
return EFI_SUCCESS;
}
/**
Read data from the flash part.
@ -169,7 +172,7 @@ SpiFlashRead (
OUT UINT8 *Buffer
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = SendSpiCmd (FlashRegionType, FlashCycleRead, Address, ByteCount, Buffer);
return Status;
@ -196,7 +199,7 @@ SpiFlashWrite (
IN UINT8 *Buffer
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = SendSpiCmd (FlashRegionType, FlashCycleWrite, Address, ByteCount, Buffer);
return Status;
@ -221,7 +224,7 @@ SpiFlashErase (
IN UINT32 ByteCount
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = SendSpiCmd (FlashRegionType, FlashCycleErase, Address, ByteCount, NULL);
return Status;
@ -242,14 +245,14 @@ SpiFlashErase (
EFI_STATUS
EFIAPI
SpiFlashReadSfdp (
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *SfdpData
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *SfdpData
)
{
EFI_STATUS Status;
UINT32 Address;
SPI_INSTANCE *SpiInstance;
EFI_STATUS Status;
UINT32 Address;
SPI_INSTANCE *SpiInstance;
SpiInstance = GetSpiInstance ();
if (SpiInstance == NULL) {
@ -285,14 +288,14 @@ SpiFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiFlashReadJedecId (
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
)
{
EFI_STATUS Status;
UINT32 Address;
SPI_INSTANCE *SpiInstance;
EFI_STATUS Status;
UINT32 Address;
SPI_INSTANCE *SpiInstance;
SpiInstance = GetSpiInstance ();
if (SpiInstance == NULL) {
@ -326,11 +329,11 @@ SpiFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiFlashWriteStatus (
IN UINT32 ByteCount,
IN UINT8 *StatusValue
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = SendSpiCmd (0, FlashCycleWriteStatus, 0, ByteCount, StatusValue);
return Status;
@ -349,11 +352,11 @@ SpiFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiFlashReadStatus (
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
{
EFI_STATUS Status;
EFI_STATUS Status;
Status = SendSpiCmd (0, FlashCycleReadStatus, 0, ByteCount, StatusValue);
return Status;
@ -374,14 +377,14 @@ SpiFlashReadStatus (
EFI_STATUS
EFIAPI
SpiReadPchSoftStrap (
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT UINT8 *SoftStrapValue
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT UINT8 *SoftStrapValue
)
{
UINT32 StrapFlashAddr;
EFI_STATUS Status;
SPI_INSTANCE *SpiInstance;
UINT32 StrapFlashAddr;
EFI_STATUS Status;
SPI_INSTANCE *SpiInstance;
SpiInstance = GetSpiInstance ();
if (SpiInstance == NULL) {
@ -421,28 +424,28 @@ SendSpiCmd (
IN OUT UINT8 *Buffer
)
{
EFI_STATUS Status;
UINT32 Index;
UINTN SpiBaseAddress;
UINT32 ScSpiBar0;
UINT32 LimitAddress;
UINT32 HardwareSpiAddr;
UINT16 PermissionBit;
UINT32 SpiDataCount;
UINT32 FlashCycle;
UINT8 BiosCtlSave;
SPI_INSTANCE *SpiInstance;
UINT32 Data32;
EFI_STATUS Status;
UINT32 Index;
UINTN SpiBaseAddress;
UINT32 ScSpiBar0;
UINT32 LimitAddress;
UINT32 HardwareSpiAddr;
UINT16 PermissionBit;
UINT32 SpiDataCount;
UINT32 FlashCycle;
UINT8 BiosCtlSave;
SPI_INSTANCE *SpiInstance;
UINT32 Data32;
SpiInstance = GetSpiInstance ();
if (SpiInstance == NULL) {
return EFI_DEVICE_ERROR;
}
Status = EFI_SUCCESS;
SpiBaseAddress = SpiInstance->PchSpiBase;
ScSpiBar0 = AcquireSpiBar0 (SpiBaseAddress);
BiosCtlSave = 0;
Status = EFI_SUCCESS;
SpiBaseAddress = SpiInstance->PchSpiBase;
ScSpiBar0 = AcquireSpiBar0 (SpiBaseAddress);
BiosCtlSave = 0;
SpiInstance->RegionPermission = MmioRead16 (ScSpiBar0 + R_SPI_FRAP);
//
@ -453,6 +456,7 @@ SendSpiCmd (
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
BiosCtlSave = SaveAndDisableSpiPrefetchCache (SpiBaseAddress);
}
@ -467,76 +471,81 @@ SendSpiCmd (
HardwareSpiAddr = Address;
if ((FlashCycleType == FlashCycleRead) ||
(FlashCycleType == FlashCycleWrite) ||
(FlashCycleType == FlashCycleErase)) {
(FlashCycleType == FlashCycleErase))
{
switch (FlashRegionType) {
case FlashRegionDescriptor:
if (FlashCycleType == FlashCycleRead) {
PermissionBit = B_SPI_FRAP_BRRA_FLASHD;
} else {
PermissionBit = B_SPI_FRAP_BRWA_FLASHD;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD);
HardwareSpiAddr += (Data32 & B_SPI_FREG0_BASE_MASK) << N_SPI_FREG0_BASE;
LimitAddress = (Data32 & B_SPI_FREG0_LIMIT_MASK) >> N_SPI_FREG0_LIMIT;
break;
case FlashRegionDescriptor:
if (FlashCycleType == FlashCycleRead) {
PermissionBit = B_SPI_FRAP_BRRA_FLASHD;
} else {
PermissionBit = B_SPI_FRAP_BRWA_FLASHD;
}
case FlashRegionBios:
if (FlashCycleType == FlashCycleRead) {
PermissionBit = B_SPI_FRAP_BRRA_BIOS;
} else {
PermissionBit = B_SPI_FRAP_BRWA_BIOS;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG1_BIOS);
HardwareSpiAddr += (Data32 & B_SPI_FREG1_BASE_MASK) << N_SPI_FREG1_BASE;
LimitAddress = (Data32 & B_SPI_FREG1_LIMIT_MASK) >> N_SPI_FREG1_LIMIT;
break;
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD);
HardwareSpiAddr += (Data32 & B_SPI_FREG0_BASE_MASK) << N_SPI_FREG0_BASE;
LimitAddress = (Data32 & B_SPI_FREG0_LIMIT_MASK) >> N_SPI_FREG0_LIMIT;
break;
case FlashRegionMe:
if (FlashCycleType == FlashCycleRead) {
PermissionBit = B_SPI_FRAP_BRRA_SEC;
} else {
PermissionBit = B_SPI_FRAP_BRWA_SEC;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG2_SEC);
HardwareSpiAddr += (Data32 & B_SPI_FREG2_BASE_MASK) << N_SPI_FREG2_BASE;
LimitAddress = (Data32 & B_SPI_FREG2_LIMIT_MASK) >> N_SPI_FREG2_LIMIT;
break;
case FlashRegionBios:
if (FlashCycleType == FlashCycleRead) {
PermissionBit = B_SPI_FRAP_BRRA_BIOS;
} else {
PermissionBit = B_SPI_FRAP_BRWA_BIOS;
}
case FlashRegionGbE:
if (FlashCycleType == FlashCycleRead) {
PermissionBit = B_SPI_FRAP_BRRA_GBE;
} else {
PermissionBit = B_SPI_FRAP_BRWA_GBE;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG3_GBE);
HardwareSpiAddr += (Data32 & B_SPI_FREG3_BASE_MASK) << N_SPI_FREG3_BASE;
LimitAddress = (Data32 & B_SPI_FREG3_LIMIT_MASK) >> N_SPI_FREG3_LIMIT;
break;
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG1_BIOS);
HardwareSpiAddr += (Data32 & B_SPI_FREG1_BASE_MASK) << N_SPI_FREG1_BASE;
LimitAddress = (Data32 & B_SPI_FREG1_LIMIT_MASK) >> N_SPI_FREG1_LIMIT;
break;
case FlashRegionPlatformData:
if (FlashCycleType == FlashCycleRead) {
PermissionBit = B_SPI_FRAP_BRRA_PLATFORM;
} else {
PermissionBit = B_SPI_FRAP_BRWA_PLATFORM;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG4_PLATFORM_DATA);
HardwareSpiAddr += (Data32 & B_SPI_FREG4_BASE_MASK) << N_SPI_FREG4_BASE;
LimitAddress = (Data32 & B_SPI_FREG4_LIMIT_MASK) >> N_SPI_FREG4_LIMIT;
break;
case FlashRegionMe:
if (FlashCycleType == FlashCycleRead) {
PermissionBit = B_SPI_FRAP_BRRA_SEC;
} else {
PermissionBit = B_SPI_FRAP_BRWA_SEC;
}
case FlashRegionAll:
//
// FlashRegionAll indicates address is relative to flash device
// No error checking for this case
//
LimitAddress = 0;
PermissionBit = 0;
break;
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG2_SEC);
HardwareSpiAddr += (Data32 & B_SPI_FREG2_BASE_MASK) << N_SPI_FREG2_BASE;
LimitAddress = (Data32 & B_SPI_FREG2_LIMIT_MASK) >> N_SPI_FREG2_LIMIT;
break;
default:
Status = EFI_UNSUPPORTED;
goto SendSpiCmdEnd;
case FlashRegionGbE:
if (FlashCycleType == FlashCycleRead) {
PermissionBit = B_SPI_FRAP_BRRA_GBE;
} else {
PermissionBit = B_SPI_FRAP_BRWA_GBE;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG3_GBE);
HardwareSpiAddr += (Data32 & B_SPI_FREG3_BASE_MASK) << N_SPI_FREG3_BASE;
LimitAddress = (Data32 & B_SPI_FREG3_LIMIT_MASK) >> N_SPI_FREG3_LIMIT;
break;
case FlashRegionPlatformData:
if (FlashCycleType == FlashCycleRead) {
PermissionBit = B_SPI_FRAP_BRRA_PLATFORM;
} else {
PermissionBit = B_SPI_FRAP_BRWA_PLATFORM;
}
Data32 = MmioRead32 (ScSpiBar0 + R_SPI_FREG4_PLATFORM_DATA);
HardwareSpiAddr += (Data32 & B_SPI_FREG4_BASE_MASK) << N_SPI_FREG4_BASE;
LimitAddress = (Data32 & B_SPI_FREG4_LIMIT_MASK) >> N_SPI_FREG4_LIMIT;
break;
case FlashRegionAll:
//
// FlashRegionAll indicates address is relative to flash device
// No error checking for this case
//
LimitAddress = 0;
PermissionBit = 0;
break;
default:
Status = EFI_UNSUPPORTED;
goto SendSpiCmdEnd;
}
if ((LimitAddress != 0) && (Address > LimitAddress)) {
@ -559,47 +568,48 @@ SendSpiCmd (
//
FlashCycle = 0;
switch (FlashCycleType) {
case FlashCycleRead:
FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_READ << N_SPI_HSFS_CYCLE);
break;
case FlashCycleRead:
FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ << N_SPI_HSFS_CYCLE);
break;
case FlashCycleWrite:
FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_WRITE << N_SPI_HSFS_CYCLE);
break;
case FlashCycleWrite:
FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_WRITE << N_SPI_HSFS_CYCLE);
break;
case FlashCycleErase:
if (((ByteCount % SIZE_4KB) != 0) || ((HardwareSpiAddr % SIZE_4KB) != 0)) {
DEBUG ((DEBUG_ERROR, "Erase and erase size must be 4KB aligned. \n"));
case FlashCycleErase:
if (((ByteCount % SIZE_4KB) != 0) || ((HardwareSpiAddr % SIZE_4KB) != 0)) {
DEBUG ((DEBUG_ERROR, "Erase and erase size must be 4KB aligned. \n"));
ASSERT (FALSE);
Status = EFI_INVALID_PARAMETER;
goto SendSpiCmdEnd;
}
break;
case FlashCycleReadSfdp:
FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ_SFDP << N_SPI_HSFS_CYCLE);
break;
case FlashCycleReadJedecId:
FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ_JEDEC_ID << N_SPI_HSFS_CYCLE);
break;
case FlashCycleWriteStatus:
FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_WRITE_STATUS << N_SPI_HSFS_CYCLE);
break;
case FlashCycleReadStatus:
FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_READ_STATUS << N_SPI_HSFS_CYCLE);
break;
default:
//
// Unrecognized Operation
//
ASSERT (FALSE);
Status = EFI_INVALID_PARAMETER;
goto SendSpiCmdEnd;
}
break;
case FlashCycleReadSfdp:
FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_READ_SFDP << N_SPI_HSFS_CYCLE);
break;
case FlashCycleReadJedecId:
FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_READ_JEDEC_ID << N_SPI_HSFS_CYCLE);
break;
case FlashCycleWriteStatus:
FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_WRITE_STATUS << N_SPI_HSFS_CYCLE);
break;
case FlashCycleReadStatus:
FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_READ_STATUS << N_SPI_HSFS_CYCLE);
break;
default:
//
// Unrecognized Operation
//
ASSERT (FALSE);
Status = EFI_INVALID_PARAMETER;
goto SendSpiCmdEnd;
break;
break;
}
do {
@ -613,8 +623,9 @@ SendSpiCmd (
// per operation
//
if (HardwareSpiAddr + ByteCount > ((HardwareSpiAddr + BIT8) &~(BIT8 - 1))) {
SpiDataCount = (((UINT32) (HardwareSpiAddr) + BIT8) &~(BIT8 - 1)) - (UINT32) (HardwareSpiAddr);
SpiDataCount = (((UINT32)(HardwareSpiAddr) + BIT8) &~(BIT8 - 1)) - (UINT32)(HardwareSpiAddr);
}
//
// Calculate the number of bytes to shift in/out during the SPI data cycle.
// Valid settings for the number of bytes during each data portion of the
@ -630,7 +641,8 @@ SendSpiCmd (
if (FlashCycleType == FlashCycleErase) {
if (((ByteCount / SIZE_64KB) != 0) &&
((ByteCount % SIZE_64KB) == 0) &&
((HardwareSpiAddr % SIZE_64KB) == 0)) {
((HardwareSpiAddr % SIZE_64KB) == 0))
{
if (HardwareSpiAddr < SpiInstance->Component1StartAddr) {
//
// Check whether Component0 support 64k Erase
@ -653,10 +665,11 @@ SendSpiCmd (
} else {
SpiDataCount = SIZE_4KB;
}
if (SpiDataCount == SIZE_4KB) {
FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_4K_ERASE << N_SPI_HSFS_CYCLE);
FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_4K_ERASE << N_SPI_HSFS_CYCLE);
} else {
FlashCycle = (UINT32) (V_SPI_HSFS_CYCLE_64K_ERASE << N_SPI_HSFS_CYCLE);
FlashCycle = (UINT32)(V_SPI_HSFS_CYCLE_64K_ERASE << N_SPI_HSFS_CYCLE);
}
}
@ -676,7 +689,7 @@ SendSpiCmd (
// Use Dword write if Data Count is 8, 16, 24, 32, 40, 48, 56, 64
//
for (Index = 0; Index < SpiDataCount; Index += sizeof (UINT32)) {
MmioWrite32 (ScSpiBar0 + R_SPI_FDATA00 + Index, *(UINT32 *) (Buffer + Index));
MmioWrite32 (ScSpiBar0 + R_SPI_FDATA00 + Index, *(UINT32 *)(Buffer + Index));
}
}
}
@ -684,15 +697,15 @@ SendSpiCmd (
//
// Set the Flash Address
//
MmioWrite32 (ScSpiBar0 + R_SPI_FADDR, (UINT32) (HardwareSpiAddr & B_SPI_FADDR_MASK));
MmioWrite32 (ScSpiBar0 + R_SPI_FADDR, (UINT32)(HardwareSpiAddr & B_SPI_FADDR_MASK));
//
// Set Data count, Flash cycle, and Set Go bit to start a cycle
//
MmioAndThenOr32 (
ScSpiBar0 + R_SPI_HSFS,
(UINT32) (~(B_SPI_HSFS_FDBC_MASK | B_SPI_HSFS_CYCLE_MASK)),
(UINT32) (((SpiDataCount - 1) << N_SPI_HSFS_FDBC) | FlashCycle | B_SPI_HSFS_CYCLE_FGO)
(UINT32)(~(B_SPI_HSFS_FDBC_MASK | B_SPI_HSFS_CYCLE_MASK)),
(UINT32)(((SpiDataCount - 1) << N_SPI_HSFS_FDBC) | FlashCycle | B_SPI_HSFS_CYCLE_FGO)
);
//
@ -709,7 +722,8 @@ SendSpiCmd (
if ((FlashCycleType == FlashCycleRead) ||
(FlashCycleType == FlashCycleReadSfdp) ||
(FlashCycleType == FlashCycleReadJedecId) ||
(FlashCycleType == FlashCycleReadStatus)) {
(FlashCycleType == FlashCycleReadStatus))
{
if ((SpiDataCount & 0x07) != 0) {
//
// Use Byte read if Data Count is 0, 1, 2, 3, 4, 5, 6, 7
@ -722,7 +736,7 @@ SendSpiCmd (
// Use Dword read if Data Count is 8, 16, 24, 32, 40, 48, 56, 64
//
for (Index = 0; Index < SpiDataCount; Index += sizeof (UINT32)) {
*(UINT32 *) (Buffer + Index) = MmioRead32 (ScSpiBar0 + R_SPI_FDATA00 + Index);
*(UINT32 *)(Buffer + Index) = MmioRead32 (ScSpiBar0 + R_SPI_FDATA00 + Index);
}
}
}
@ -737,7 +751,7 @@ SendSpiCmdEnd:
/// Restore the settings for SPI Prefetching and Caching and enable BIOS Write Protect
///
if ((FlashCycleType == FlashCycleWrite) || (FlashCycleType == FlashCycleErase)) {
EnableBiosWriteProtect (SpiBaseAddress, mSpiInstance->Flags & FLAGS_SPI_DISABLE_SMM_WRITE_PROTECT);
EnableBiosWriteProtect (SpiBaseAddress, mSpiInstance->Flags & FLAGS_SPI_DISABLE_SMM_WRITE_PROTECT);
SetSpiBiosControlRegister (SpiBaseAddress, BiosCtlSave);
}
@ -758,13 +772,13 @@ SendSpiCmdEnd:
**/
BOOLEAN
WaitForSpiCycleComplete (
IN UINT32 ScSpiBar0,
IN BOOLEAN ErrorCheck
IN UINT32 ScSpiBar0,
IN BOOLEAN ErrorCheck
)
{
UINT64 WaitTicks;
UINT64 WaitCount;
UINT32 Data32;
UINT64 WaitTicks;
UINT64 WaitCount;
UINT32 Data32;
//
// Convert the wait period allowed into to tick count
@ -783,8 +797,10 @@ WaitForSpiCycleComplete (
return TRUE;
}
}
MicroSecondDelay ( WAIT_PERIOD);
MicroSecondDelay (WAIT_PERIOD);
}
return FALSE;
}
@ -807,32 +823,34 @@ SpiGetRegionAddress (
OUT UINT32 *RegionSize OPTIONAL
)
{
UINT32 ScSpiBar0;
UINT32 ReadValue;
UINT32 Base;
SPI_INSTANCE *SpiInstance;
UINT32 ScSpiBar0;
UINT32 ReadValue;
UINT32 Base;
SPI_INSTANCE *SpiInstance;
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
SpiInstance = GetSpiInstance();
SpiInstance = GetSpiInstance ();
if (SpiInstance == NULL) {
return EFI_DEVICE_ERROR;
}
if (FlashRegionType == FlashRegionAll) {
if (BaseAddress != NULL) {
*BaseAddress = 0;
*BaseAddress = 0;
}
if (RegionSize != NULL) {
*RegionSize = SpiInstance->Component1StartAddr;
*RegionSize = SpiInstance->Component1StartAddr;
}
return EFI_SUCCESS;
}
ScSpiBar0 = AcquireSpiBar0 (SpiInstance->PchSpiBase);
ReadValue = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD + S_SPI_FREGX * (UINT32) FlashRegionType);
ReadValue = MmioRead32 (ScSpiBar0 + R_SPI_FREG0_FLASHD + S_SPI_FREGX * (UINT32)FlashRegionType);
ReleaseSpiBar0 (SpiInstance->PchSpiBase);
//
@ -849,7 +867,7 @@ SpiGetRegionAddress (
if (RegionSize != NULL) {
*RegionSize = ((((ReadValue & B_SPI_FREGX_LIMIT_MASK) >> N_SPI_FREGX_LIMIT) + 1) <<
N_SPI_FREGX_LIMIT_REPR) - Base;
N_SPI_FREGX_LIMIT_REPR) - Base;
}
return EFI_SUCCESS;

66
UefiPayloadPkg/PayloadLoaderPeim/ElfLib.h
View File

@ -11,35 +11,34 @@
#include <PiPei.h>
#define ELF_CLASS32 1
#define ELF_CLASS64 2
#define ELF_CLASS32 1
#define ELF_CLASS64 2
#define ELF_PT_LOAD 1
#define ELF_PT_LOAD 1
typedef struct {
RETURN_STATUS ParseStatus; ///< Return the status after ParseElfImage().
UINT8 *FileBase; ///< The source location in memory.
UINTN FileSize; ///< The size including sections that don't require loading.
UINT8 *PreferredImageAddress; ///< The preferred image to be loaded. No relocation is needed if loaded to this address.
BOOLEAN ReloadRequired; ///< The image needs a new memory location for running.
UINT8 *ImageAddress; ///< The destination memory address set by caller.
UINTN ImageSize; ///< The memory size for loading and execution.
UINT32 EiClass;
UINT32 ShNum;
UINT32 PhNum;
UINTN ShStrOff;
UINTN ShStrLen;
UINTN EntryPoint; ///< Return the actual entry point after LoadElfImage().
RETURN_STATUS ParseStatus; ///< Return the status after ParseElfImage().
UINT8 *FileBase; ///< The source location in memory.
UINTN FileSize; ///< The size including sections that don't require loading.
UINT8 *PreferredImageAddress; ///< The preferred image to be loaded. No relocation is needed if loaded to this address.
BOOLEAN ReloadRequired; ///< The image needs a new memory location for running.
UINT8 *ImageAddress; ///< The destination memory address set by caller.
UINTN ImageSize; ///< The memory size for loading and execution.
UINT32 EiClass;
UINT32 ShNum;
UINT32 PhNum;
UINTN ShStrOff;
UINTN ShStrLen;
UINTN EntryPoint; ///< Return the actual entry point after LoadElfImage().
} ELF_IMAGE_CONTEXT;
typedef struct {
UINT32 PtType;
UINTN Offset;
UINTN Length;
UINTN MemLen;
UINTN MemAddr;
UINTN Alignment;
UINT32 PtType;
UINTN Offset;
UINTN Length;
UINTN MemLen;
UINTN MemAddr;
UINTN Alignment;
} SEGMENT_INFO;
/**
@ -56,8 +55,8 @@ typedef struct {
EFI_STATUS
EFIAPI
ParseElfImage (
IN VOID *ImageBase,
OUT ELF_IMAGE_CONTEXT *ElfCt
IN VOID *ImageBase,
OUT ELF_IMAGE_CONTEXT *ElfCt
);
/**
@ -76,7 +75,7 @@ ParseElfImage (
EFI_STATUS
EFIAPI
LoadElfImage (
IN ELF_IMAGE_CONTEXT *ElfCt
IN ELF_IMAGE_CONTEXT *ElfCt
);
/**
@ -93,9 +92,9 @@ LoadElfImage (
EFI_STATUS
EFIAPI
GetElfSectionName (
IN ELF_IMAGE_CONTEXT *ElfCt,
IN UINT32 SectionIndex,
OUT CHAR8 **SectionName
IN ELF_IMAGE_CONTEXT *ElfCt,
IN UINT32 SectionIndex,
OUT CHAR8 **SectionName
);
/**
@ -114,9 +113,10 @@ GetElfSectionName (
EFI_STATUS
EFIAPI
GetElfSectionPos (
IN ELF_IMAGE_CONTEXT *ElfCt,
IN UINT32 Index,
OUT UINTN *Offset,
OUT UINTN *Size
IN ELF_IMAGE_CONTEXT *ElfCt,
IN UINT32 Index,
OUT UINTN *Offset,
OUT UINTN *Size
);
#endif /* ELF_LIB_H_ */

179
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf32.h
View File

@ -35,8 +35,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
*/
#ifndef _SYS_ELF32_H_
#define _SYS_ELF32_H_ 1
#define _SYS_ELF32_H_ 1
/*
* ELF definitions common to all 32-bit architectures.
@ -49,31 +48,31 @@ typedef INT32 Elf32_Sword;
typedef UINT32 Elf32_Word;
typedef UINT64 Elf32_Lword;
typedef Elf32_Word Elf32_Hashelt;
typedef Elf32_Word Elf32_Hashelt;
/* Non-standard class-dependent datatype used for abstraction. */
typedef Elf32_Word Elf32_Size;
typedef Elf32_Sword Elf32_Ssize;
typedef Elf32_Sword Elf32_Ssize;
/*
* ELF header.
*/
typedef struct {
unsigned char e_ident[EI_NIDENT]; /* File identification. */
Elf32_Half e_type; /* File type. */
Elf32_Half e_machine; /* Machine architecture. */
Elf32_Word e_version; /* ELF format version. */
Elf32_Addr e_entry; /* Entry point. */
Elf32_Off e_phoff; /* Program header file offset. */
Elf32_Off e_shoff; /* Section header file offset. */
Elf32_Word e_flags; /* Architecture-specific flags. */
Elf32_Half e_ehsize; /* Size of ELF header in bytes. */
Elf32_Half e_phentsize; /* Size of program header entry. */
Elf32_Half e_phnum; /* Number of program header entries. */
Elf32_Half e_shentsize; /* Size of section header entry. */
Elf32_Half e_shnum; /* Number of section header entries. */
Elf32_Half e_shstrndx; /* Section name strings section. */
unsigned char e_ident[EI_NIDENT]; /* File identification. */
Elf32_Half e_type; /* File type. */
Elf32_Half e_machine; /* Machine architecture. */
Elf32_Word e_version; /* ELF format version. */
Elf32_Addr e_entry; /* Entry point. */
Elf32_Off e_phoff; /* Program header file offset. */
Elf32_Off e_shoff; /* Section header file offset. */
Elf32_Word e_flags; /* Architecture-specific flags. */
Elf32_Half e_ehsize; /* Size of ELF header in bytes. */
Elf32_Half e_phentsize; /* Size of program header entry. */
Elf32_Half e_phnum; /* Number of program header entries. */
Elf32_Half e_shentsize; /* Size of section header entry. */
Elf32_Half e_shnum; /* Number of section header entries. */
Elf32_Half e_shstrndx; /* Section name strings section. */
} Elf32_Ehdr;
/*
@ -81,17 +80,17 @@ typedef struct {
*/
typedef struct {
Elf32_Word sh_name; /* Section name (index into the
Elf32_Word sh_name; /* Section name (index into the
section header string table). */
Elf32_Word sh_type; /* Section type. */
Elf32_Word sh_flags; /* Section flags. */
Elf32_Addr sh_addr; /* Address in memory image. */
Elf32_Off sh_offset; /* Offset in file. */
Elf32_Word sh_size; /* Size in bytes. */
Elf32_Word sh_link; /* Index of a related section. */
Elf32_Word sh_info; /* Depends on section type. */
Elf32_Word sh_addralign; /* Alignment in bytes. */
Elf32_Word sh_entsize; /* Size of each entry in section. */
Elf32_Word sh_type; /* Section type. */
Elf32_Word sh_flags; /* Section flags. */
Elf32_Addr sh_addr; /* Address in memory image. */
Elf32_Off sh_offset; /* Offset in file. */
Elf32_Word sh_size; /* Size in bytes. */
Elf32_Word sh_link; /* Index of a related section. */
Elf32_Word sh_info; /* Depends on section type. */
Elf32_Word sh_addralign; /* Alignment in bytes. */
Elf32_Word sh_entsize; /* Size of each entry in section. */
} Elf32_Shdr;
/*
@ -99,14 +98,14 @@ typedef struct {
*/
typedef struct {
Elf32_Word p_type; /* Entry type. */
Elf32_Off p_offset; /* File offset of contents. */
Elf32_Addr p_vaddr; /* Virtual address in memory image. */
Elf32_Addr p_paddr; /* Physical address (not used). */
Elf32_Word p_filesz; /* Size of contents in file. */
Elf32_Word p_memsz; /* Size of contents in memory. */
Elf32_Word p_flags; /* Access permission flags. */
Elf32_Word p_align; /* Alignment in memory and file. */
Elf32_Word p_type; /* Entry type. */
Elf32_Off p_offset; /* File offset of contents. */
Elf32_Addr p_vaddr; /* Virtual address in memory image. */
Elf32_Addr p_paddr; /* Physical address (not used). */
Elf32_Word p_filesz; /* Size of contents in file. */
Elf32_Word p_memsz; /* Size of contents in memory. */
Elf32_Word p_flags; /* Access permission flags. */
Elf32_Word p_align; /* Alignment in memory and file. */
} Elf32_Phdr;
/*
@ -114,10 +113,10 @@ typedef struct {
*/
typedef struct {
Elf32_Sword d_tag; /* Entry type. */
Elf32_Sword d_tag; /* Entry type. */
union {
Elf32_Word d_val; /* Integer value. */
Elf32_Addr d_ptr; /* Address value. */
Elf32_Word d_val; /* Integer value. */
Elf32_Addr d_ptr; /* Address value. */
} d_un;
} Elf32_Dyn;
@ -127,19 +126,19 @@ typedef struct {
/* Relocations that don't need an addend field. */
typedef struct {
Elf32_Addr r_offset; /* Location to be relocated. */
Elf32_Word r_info; /* Relocation type and symbol index. */
Elf32_Addr r_offset; /* Location to be relocated. */
Elf32_Word r_info; /* Relocation type and symbol index. */
} Elf32_Rel;
/* Relocations that need an addend field. */
typedef struct {
Elf32_Addr r_offset; /* Location to be relocated. */
Elf32_Word r_info; /* Relocation type and symbol index. */
Elf32_Sword r_addend; /* Addend. */
Elf32_Addr r_offset; /* Location to be relocated. */
Elf32_Word r_info; /* Relocation type and symbol index. */
Elf32_Sword r_addend; /* Addend. */
} Elf32_Rela;
/* Macros for accessing the fields of r_info. */
#define ELF32_R_SYM(info) ((info) >> 8)
#define ELF32_R_SYM(info) ((info) >> 8)
#define ELF32_R_TYPE(info) ((unsigned char)(info))
/* Macro for constructing r_info from field values. */
@ -154,11 +153,11 @@ typedef Elf_Note Elf32_Nhdr;
* Move entry
*/
typedef struct {
Elf32_Lword m_value; /* symbol value */
Elf32_Word m_info; /* size + index */
Elf32_Word m_poffset; /* symbol offset */
Elf32_Half m_repeat; /* repeat count */
Elf32_Half m_stride; /* stride info */
Elf32_Lword m_value; /* symbol value */
Elf32_Word m_info; /* size + index */
Elf32_Word m_poffset; /* symbol offset */
Elf32_Half m_repeat; /* repeat count */
Elf32_Half m_stride; /* stride info */
} Elf32_Move;
/*
@ -168,18 +167,18 @@ typedef struct {
* size = ELF32_M_SIZE(M.m_info)
* M.m_info = ELF32_M_INFO(sym, size)
*/
#define ELF32_M_SYM(info) ((info)>>8)
#define ELF32_M_SIZE(info) ((unsigned char)(info))
#define ELF32_M_SYM(info) ((info)>>8)
#define ELF32_M_SIZE(info) ((unsigned char)(info))
#define ELF32_M_INFO(sym, size) (((sym)<<8)+(unsigned char)(size))
/*
* Hardware/Software capabilities entry
*/
typedef struct {
Elf32_Word c_tag; /* how to interpret value */
Elf32_Word c_tag; /* how to interpret value */
union {
Elf32_Word c_val;
Elf32_Addr c_ptr;
Elf32_Word c_val;
Elf32_Addr c_ptr;
} c_un;
} Elf32_Cap;
@ -188,17 +187,17 @@ typedef struct {
*/
typedef struct {
Elf32_Word st_name; /* String table index of name. */
Elf32_Addr st_value; /* Symbol value. */
Elf32_Word st_size; /* Size of associated object. */
unsigned char st_info; /* Type and binding information. */
unsigned char st_other; /* Reserved (not used). */
Elf32_Half st_shndx; /* Section index of symbol. */
Elf32_Word st_name; /* String table index of name. */
Elf32_Addr st_value; /* Symbol value. */
Elf32_Word st_size; /* Size of associated object. */
unsigned char st_info; /* Type and binding information. */
unsigned char st_other; /* Reserved (not used). */
Elf32_Half st_shndx; /* Section index of symbol. */
} Elf32_Sym;
/* Macros for accessing the fields of st_info. */
#define ELF32_ST_BIND(info) ((info) >> 4)
#define ELF32_ST_TYPE(info) ((info) & 0xf)
#define ELF32_ST_BIND(info) ((info) >> 4)
#define ELF32_ST_TYPE(info) ((info) & 0xf)
/* Macro for constructing st_info from field values. */
#define ELF32_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf))
@ -207,46 +206,42 @@ typedef struct {
#define ELF32_ST_VISIBILITY(oth) ((oth) & 0x3)
/* Structures used by Sun & GNU symbol versioning. */
typedef struct
{
Elf32_Half vd_version;
Elf32_Half vd_flags;
Elf32_Half vd_ndx;
Elf32_Half vd_cnt;
Elf32_Word vd_hash;
Elf32_Word vd_aux;
Elf32_Word vd_next;
typedef struct {
Elf32_Half vd_version;
Elf32_Half vd_flags;
Elf32_Half vd_ndx;
Elf32_Half vd_cnt;
Elf32_Word vd_hash;
Elf32_Word vd_aux;
Elf32_Word vd_next;
} Elf32_Verdef;
typedef struct
{
Elf32_Word vda_name;
Elf32_Word vda_next;
typedef struct {
Elf32_Word vda_name;
Elf32_Word vda_next;
} Elf32_Verdaux;
typedef struct
{
Elf32_Half vn_version;
Elf32_Half vn_cnt;
Elf32_Word vn_file;
Elf32_Word vn_aux;
Elf32_Word vn_next;
typedef struct {
Elf32_Half vn_version;
Elf32_Half vn_cnt;
Elf32_Word vn_file;
Elf32_Word vn_aux;
Elf32_Word vn_next;
} Elf32_Verneed;
typedef struct
{
Elf32_Word vna_hash;
Elf32_Half vna_flags;
Elf32_Half vna_other;
Elf32_Word vna_name;
Elf32_Word vna_next;
typedef struct {
Elf32_Word vna_hash;
Elf32_Half vna_flags;
Elf32_Half vna_other;
Elf32_Word vna_name;
Elf32_Word vna_next;
} Elf32_Vernaux;
typedef Elf32_Half Elf32_Versym;
typedef struct {
Elf32_Half si_boundto; /* direct bindings - symbol bound to */
Elf32_Half si_flags; /* per symbol flags */
Elf32_Half si_boundto; /* direct bindings - symbol bound to */
Elf32_Half si_flags; /* per symbol flags */
} Elf32_Syminfo;
#endif /* !_SYS_ELF32_H_ */

173
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf32Lib.c
View File

@ -18,13 +18,13 @@
**/
Elf32_Shdr *
GetElf32SectionByIndex (
IN UINT8 *ImageBase,
IN UINT32 Index
IN UINT8 *ImageBase,
IN UINT32 Index
)
{
Elf32_Ehdr *Ehdr;
Elf32_Ehdr *Ehdr;
Ehdr = (Elf32_Ehdr *)ImageBase;
Ehdr = (Elf32_Ehdr *)ImageBase;
if (Index >= Ehdr->e_shnum) {
return NULL;
}
@ -42,13 +42,13 @@ GetElf32SectionByIndex (
**/
Elf32_Phdr *
GetElf32SegmentByIndex (
IN UINT8 *ImageBase,
IN UINT32 Index
IN UINT8 *ImageBase,
IN UINT32 Index
)
{
Elf32_Ehdr *Ehdr;
Elf32_Ehdr *Ehdr;
Ehdr = (Elf32_Ehdr *)ImageBase;
Ehdr = (Elf32_Ehdr *)ImageBase;
if (Index >= Ehdr->e_phnum) {
return NULL;
}
@ -67,24 +67,26 @@ GetElf32SegmentByIndex (
**/
Elf32_Shdr *
GetElf32SectionByRange (
IN UINT8 *ImageBase,
IN UINT32 Offset,
IN UINT32 Size
IN UINT8 *ImageBase,
IN UINT32 Offset,
IN UINT32 Size
)
{
UINT32 Index;
Elf32_Ehdr *Ehdr;
Elf32_Shdr *Shdr;
UINT32 Index;
Elf32_Ehdr *Ehdr;
Elf32_Shdr *Shdr;
Ehdr = (Elf32_Ehdr *)ImageBase;
Shdr = (Elf32_Shdr *) (ImageBase + Ehdr->e_shoff);
Shdr = (Elf32_Shdr *)(ImageBase + Ehdr->e_shoff);
for (Index = 0; Index < Ehdr->e_shnum; Index++) {
if ((Shdr->sh_offset == Offset) && (Shdr->sh_size == Size)) {
return Shdr;
}
Shdr = ELF_NEXT_ENTRY (Elf32_Shdr, Shdr, Ehdr->e_shentsize);
}
return NULL;
}
@ -102,27 +104,28 @@ GetElf32SectionByRange (
**/
EFI_STATUS
ProcessRelocation32 (
IN Elf32_Rela *Rela,
IN UINT32 RelaSize,
IN UINT32 RelaEntrySize,
IN UINT32 RelaType,
IN INTN Delta,
IN BOOLEAN DynamicLinking
IN Elf32_Rela *Rela,
IN UINT32 RelaSize,
IN UINT32 RelaEntrySize,
IN UINT32 RelaType,
IN INTN Delta,
IN BOOLEAN DynamicLinking
)
{
UINTN Index;
UINT32 *Ptr;
UINT32 Type;
UINTN Index;
UINT32 *Ptr;
UINT32 Type;
for ( Index = 0
; RelaEntrySize * Index < RelaSize
; Index++, Rela = ELF_NEXT_ENTRY (Elf32_Rela, Rela, RelaEntrySize)
) {
; RelaEntrySize * Index < RelaSize
; Index++, Rela = ELF_NEXT_ENTRY (Elf32_Rela, Rela, RelaEntrySize)
)
{
//
// r_offset is the virtual address of the storage unit affected by the relocation.
//
Ptr = (UINT32 *)(UINTN)(Rela->r_offset + Delta);
Type = ELF32_R_TYPE(Rela->r_info);
Ptr = (UINT32 *)(UINTN)(Rela->r_offset + Delta);
Type = ELF32_R_TYPE (Rela->r_info);
switch (Type) {
case R_386_NONE:
case R_386_PC32:
@ -139,8 +142,9 @@ ProcessRelocation32 (
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));
ASSERT (FALSE);
} else {
*Ptr += (UINT32) Delta;
*Ptr += (UINT32)Delta;
}
break;
case R_386_RELATIVE:
@ -164,12 +168,12 @@ ProcessRelocation32 (
// Calculation: B + A
//
if (RelaType == SHT_RELA) {
*Ptr = (UINT32) Delta + Rela->r_addend;
*Ptr = (UINT32)Delta + Rela->r_addend;
} else {
//
// A is stored in the field of relocation for REL type.
//
*Ptr = (UINT32) Delta + *Ptr;
*Ptr = (UINT32)Delta + *Ptr;
}
} else {
//
@ -178,12 +182,14 @@ ProcessRelocation32 (
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));
ASSERT (FALSE);
}
break;
default:
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));
}
}
return EFI_SUCCESS;
}
@ -197,19 +203,19 @@ ProcessRelocation32 (
**/
EFI_STATUS
RelocateElf32Dynamic (
IN ELF_IMAGE_CONTEXT *ElfCt
IN ELF_IMAGE_CONTEXT *ElfCt
)
{
UINT32 Index;
Elf32_Phdr *Phdr;
Elf32_Shdr *DynShdr;
Elf32_Shdr *RelShdr;
Elf32_Dyn *Dyn;
UINT32 RelaAddress;
UINT32 RelaCount;
UINT32 RelaSize;
UINT32 RelaEntrySize;
UINT32 RelaType;
UINT32 Index;
Elf32_Phdr *Phdr;
Elf32_Shdr *DynShdr;
Elf32_Shdr *RelShdr;
Elf32_Dyn *Dyn;
UINT32 RelaAddress;
UINT32 RelaCount;
UINT32 RelaSize;
UINT32 RelaEntrySize;
UINT32 RelaType;
//
// 1. Locate the dynamic section.
@ -239,6 +245,7 @@ RelocateElf32Dynamic (
if (DynShdr == NULL) {
return EFI_UNSUPPORTED;
}
ASSERT (DynShdr->sh_type == SHT_DYNAMIC);
ASSERT (DynShdr->sh_entsize >= sizeof (*Dyn));
@ -250,10 +257,11 @@ RelocateElf32Dynamic (
RelaCount = 0;
RelaEntrySize = 0;
RelaType = 0;
for ( Index = 0, Dyn = (Elf32_Dyn *) (ElfCt->FileBase + DynShdr->sh_offset)
; Index < DynShdr->sh_size / DynShdr->sh_entsize
; Index++, Dyn = ELF_NEXT_ENTRY (Elf32_Dyn, Dyn, DynShdr->sh_entsize)
) {
for ( Index = 0, Dyn = (Elf32_Dyn *)(ElfCt->FileBase + DynShdr->sh_offset)
; Index < DynShdr->sh_size / DynShdr->sh_entsize
; Index++, Dyn = ELF_NEXT_ENTRY (Elf32_Dyn, Dyn, DynShdr->sh_entsize)
)
{
switch (Dyn->d_tag) {
case DT_RELA:
case DT_REL:
@ -265,7 +273,7 @@ RelocateElf32Dynamic (
// For consistency, files do not contain relocation entries to ``correct'' addresses in the dynamic structure.
//
RelaAddress = Dyn->d_un.d_ptr;
RelaType = (Dyn->d_tag == DT_RELA) ? SHT_RELA: SHT_REL;
RelaType = (Dyn->d_tag == DT_RELA) ? SHT_RELA : SHT_REL;
break;
case DT_RELACOUNT:
case DT_RELCOUNT:
@ -304,12 +312,14 @@ RelocateElf32Dynamic (
if ((RelShdr->sh_addr == RelaAddress) && (RelShdr->sh_size == RelaSize)) {
break;
}
RelShdr = NULL;
}
if (RelShdr == NULL) {
return EFI_UNSUPPORTED;
}
ASSERT (RelShdr->sh_type == RelaType);
ASSERT (RelShdr->sh_entsize == RelaEntrySize);
@ -317,9 +327,11 @@ RelocateElf32Dynamic (
// 3. Process the relocation section.
//
ProcessRelocation32 (
(Elf32_Rela *) (ElfCt->FileBase + RelShdr->sh_offset),
RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,
(UINTN) ElfCt->ImageAddress - (UINTN) ElfCt->PreferredImageAddress,
(Elf32_Rela *)(ElfCt->FileBase + RelShdr->sh_offset),
RelShdr->sh_size,
RelShdr->sh_entsize,
RelShdr->sh_type,
(UINTN)ElfCt->ImageAddress - (UINTN)ElfCt->PreferredImageAddress,
TRUE
);
return EFI_SUCCESS;
@ -335,22 +347,22 @@ RelocateElf32Dynamic (
**/
EFI_STATUS
RelocateElf32Sections (
IN ELF_IMAGE_CONTEXT *ElfCt
IN ELF_IMAGE_CONTEXT *ElfCt
)
{
EFI_STATUS Status;
Elf32_Ehdr *Ehdr;
Elf32_Shdr *RelShdr;
Elf32_Shdr *Shdr;
UINT32 Index;
UINTN Delta;
EFI_STATUS Status;
Elf32_Ehdr *Ehdr;
Elf32_Shdr *RelShdr;
Elf32_Shdr *Shdr;
UINT32 Index;
UINTN Delta;
Ehdr = (Elf32_Ehdr *)ElfCt->FileBase;
Ehdr = (Elf32_Ehdr *)ElfCt->FileBase;
if (Ehdr->e_machine != EM_386) {
return EFI_UNSUPPORTED;
}
Delta = (UINTN) ElfCt->ImageAddress - (UINTN) ElfCt->PreferredImageAddress;
Delta = (UINTN)ElfCt->ImageAddress - (UINTN)ElfCt->PreferredImageAddress;
ElfCt->EntryPoint = (UINTN)(Ehdr->e_entry + Delta);
//
@ -373,22 +385,27 @@ RelocateElf32Sections (
// The below relocation is needed in this case.
//
DEBUG ((DEBUG_INFO, "EXEC ELF: Fix actual/preferred base address delta ...\n"));
for ( Index = 0, RelShdr = (Elf32_Shdr *) (ElfCt->FileBase + Ehdr->e_shoff)
; Index < Ehdr->e_shnum
; Index++, RelShdr = ELF_NEXT_ENTRY (Elf32_Shdr, RelShdr, Ehdr->e_shentsize)
) {
for ( Index = 0, RelShdr = (Elf32_Shdr *)(ElfCt->FileBase + Ehdr->e_shoff)
; Index < Ehdr->e_shnum
; Index++, RelShdr = ELF_NEXT_ENTRY (Elf32_Shdr, RelShdr, Ehdr->e_shentsize)
)
{
if ((RelShdr->sh_type != SHT_REL) && (RelShdr->sh_type != SHT_RELA)) {
continue;
}
Shdr = GetElf32SectionByIndex (ElfCt->FileBase, RelShdr->sh_info);
if ((Shdr->sh_flags & SHF_ALLOC) == SHF_ALLOC) {
//
// Only fix up sections that occupy memory during process execution.
//
ProcessRelocation32 (
(Elf32_Rela *)((UINT8*)Ehdr + RelShdr->sh_offset),
RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,
Delta, FALSE
(Elf32_Rela *)((UINT8 *)Ehdr + RelShdr->sh_offset),
RelShdr->sh_size,
RelShdr->sh_entsize,
RelShdr->sh_type,
Delta,
FALSE
);
}
}
@ -411,13 +428,13 @@ RelocateElf32Sections (
**/
EFI_STATUS
LoadElf32Image (
IN ELF_IMAGE_CONTEXT *ElfCt
IN ELF_IMAGE_CONTEXT *ElfCt
)
{
Elf32_Ehdr *Ehdr;
Elf32_Phdr *Phdr;
UINT16 Index;
UINTN Delta;
Elf32_Ehdr *Ehdr;
Elf32_Phdr *Phdr;
UINT16 Index;
UINTN Delta;
ASSERT (ElfCt != NULL);
@ -427,14 +444,16 @@ LoadElf32Image (
Ehdr = (Elf32_Ehdr *)ElfCt->FileBase;
for ( Index = 0, Phdr = (Elf32_Phdr *)(ElfCt->FileBase + Ehdr->e_phoff)
; Index < Ehdr->e_phnum
; Index++, Phdr = ELF_NEXT_ENTRY (Elf32_Phdr, Phdr, Ehdr->e_phentsize)
) {
; Index < Ehdr->e_phnum
; Index++, Phdr = ELF_NEXT_ENTRY (Elf32_Phdr, Phdr, Ehdr->e_phentsize)
)
{
//
// Skip segments that don't require load (type tells, or size is 0)
//
if ((Phdr->p_type != PT_LOAD) ||
(Phdr->p_memsz == 0)) {
(Phdr->p_memsz == 0))
{
continue;
}
@ -442,7 +461,7 @@ LoadElf32Image (
// The memory offset of segment relative to the image base
// Note: CopyMem() does nothing when the dst equals to src.
//
Delta = Phdr->p_paddr - (UINT32) (UINTN) ElfCt->PreferredImageAddress;
Delta = Phdr->p_paddr - (UINT32)(UINTN)ElfCt->PreferredImageAddress;
CopyMem (ElfCt->ImageAddress + Delta, ElfCt->FileBase + Phdr->p_offset, Phdr->p_filesz);
ZeroMem (ElfCt->ImageAddress + Delta + Phdr->p_filesz, Phdr->p_memsz - Phdr->p_filesz);
}

171
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf64.h
View File

@ -34,8 +34,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
*/
#ifndef _SYS_ELF64_H_
#define _SYS_ELF64_H_ 1
#define _SYS_ELF64_H_ 1
/*
* ELF definitions common to all 64-bit architectures.
@ -57,31 +56,31 @@ typedef UINT64 Elf64_Xword;
* typedef is required.
*/
typedef Elf64_Word Elf64_Hashelt;
typedef Elf64_Word Elf64_Hashelt;
/* Non-standard class-dependent datatype used for abstraction. */
typedef Elf64_Xword Elf64_Size;
typedef Elf64_Sxword Elf64_Ssize;
typedef Elf64_Xword Elf64_Size;
typedef Elf64_Sxword Elf64_Ssize;
/*
* ELF header.
*/
typedef struct {
unsigned char e_ident[EI_NIDENT]; /* File identification. */
Elf64_Half e_type; /* File type. */
Elf64_Half e_machine; /* Machine architecture. */
Elf64_Word e_version; /* ELF format version. */
Elf64_Addr e_entry; /* Entry point. */
Elf64_Off e_phoff; /* Program header file offset. */
Elf64_Off e_shoff; /* Section header file offset. */
Elf64_Word e_flags; /* Architecture-specific flags. */
Elf64_Half e_ehsize; /* Size of ELF header in bytes. */
Elf64_Half e_phentsize; /* Size of program header entry. */
Elf64_Half e_phnum; /* Number of program header entries. */
Elf64_Half e_shentsize; /* Size of section header entry. */
Elf64_Half e_shnum; /* Number of section header entries. */
Elf64_Half e_shstrndx; /* Section name strings section. */
unsigned char e_ident[EI_NIDENT]; /* File identification. */
Elf64_Half e_type; /* File type. */
Elf64_Half e_machine; /* Machine architecture. */
Elf64_Word e_version; /* ELF format version. */
Elf64_Addr e_entry; /* Entry point. */
Elf64_Off e_phoff; /* Program header file offset. */
Elf64_Off e_shoff; /* Section header file offset. */
Elf64_Word e_flags; /* Architecture-specific flags. */
Elf64_Half e_ehsize; /* Size of ELF header in bytes. */
Elf64_Half e_phentsize; /* Size of program header entry. */
Elf64_Half e_phnum; /* Number of program header entries. */
Elf64_Half e_shentsize; /* Size of section header entry. */
Elf64_Half e_shnum; /* Number of section header entries. */
Elf64_Half e_shstrndx; /* Section name strings section. */
} Elf64_Ehdr;
/*
@ -89,17 +88,17 @@ typedef struct {
*/
typedef struct {
Elf64_Word sh_name; /* Section name (index into the
Elf64_Word sh_name; /* Section name (index into the
section header string table). */
Elf64_Word sh_type; /* Section type. */
Elf64_Xword sh_flags; /* Section flags. */
Elf64_Addr sh_addr; /* Address in memory image. */
Elf64_Off sh_offset; /* Offset in file. */
Elf64_Xword sh_size; /* Size in bytes. */
Elf64_Word sh_link; /* Index of a related section. */
Elf64_Word sh_info; /* Depends on section type. */
Elf64_Xword sh_addralign; /* Alignment in bytes. */
Elf64_Xword sh_entsize; /* Size of each entry in section. */
Elf64_Word sh_type; /* Section type. */
Elf64_Xword sh_flags; /* Section flags. */
Elf64_Addr sh_addr; /* Address in memory image. */
Elf64_Off sh_offset; /* Offset in file. */
Elf64_Xword sh_size; /* Size in bytes. */
Elf64_Word sh_link; /* Index of a related section. */
Elf64_Word sh_info; /* Depends on section type. */
Elf64_Xword sh_addralign; /* Alignment in bytes. */
Elf64_Xword sh_entsize; /* Size of each entry in section. */
} Elf64_Shdr;
/*
@ -107,14 +106,14 @@ typedef struct {
*/
typedef struct {
Elf64_Word p_type; /* Entry type. */
Elf64_Word p_flags; /* Access permission flags. */
Elf64_Off p_offset; /* File offset of contents. */
Elf64_Addr p_vaddr; /* Virtual address in memory image. */
Elf64_Addr p_paddr; /* Physical address (not used). */
Elf64_Xword p_filesz; /* Size of contents in file. */
Elf64_Xword p_memsz; /* Size of contents in memory. */
Elf64_Xword p_align; /* Alignment in memory and file. */
Elf64_Word p_type; /* Entry type. */
Elf64_Word p_flags; /* Access permission flags. */
Elf64_Off p_offset; /* File offset of contents. */
Elf64_Addr p_vaddr; /* Virtual address in memory image. */
Elf64_Addr p_paddr; /* Physical address (not used). */
Elf64_Xword p_filesz; /* Size of contents in file. */
Elf64_Xword p_memsz; /* Size of contents in memory. */
Elf64_Xword p_align; /* Alignment in memory and file. */
} Elf64_Phdr;
/*
@ -122,10 +121,10 @@ typedef struct {
*/
typedef struct {
Elf64_Sxword d_tag; /* Entry type. */
Elf64_Sxword d_tag; /* Entry type. */
union {
Elf64_Xword d_val; /* Integer value. */
Elf64_Addr d_ptr; /* Address value. */
Elf64_Xword d_val; /* Integer value. */
Elf64_Addr d_ptr; /* Address value. */
} d_un;
} Elf64_Dyn;
@ -135,26 +134,26 @@ typedef struct {
/* Relocations that don't need an addend field. */
typedef struct {
Elf64_Addr r_offset; /* Location to be relocated. */
Elf64_Xword r_info; /* Relocation type and symbol index. */
Elf64_Addr r_offset; /* Location to be relocated. */
Elf64_Xword r_info; /* Relocation type and symbol index. */
} Elf64_Rel;
/* Relocations that need an addend field. */
typedef struct {
Elf64_Addr r_offset; /* Location to be relocated. */
Elf64_Xword r_info; /* Relocation type and symbol index. */
Elf64_Sxword r_addend; /* Addend. */
Elf64_Addr r_offset; /* Location to be relocated. */
Elf64_Xword r_info; /* Relocation type and symbol index. */
Elf64_Sxword r_addend; /* Addend. */
} Elf64_Rela;
/* Macros for accessing the fields of r_info. */
#define ELF64_R_SYM(info) ((UINT32) RShiftU64 ((info), 32))
#define ELF64_R_SYM(info) ((UINT32) RShiftU64 ((info), 32))
#define ELF64_R_TYPE(info) ((info) & 0xffffffffL)
/* Macro for constructing r_info from field values. */
#define ELF64_R_INFO(sym, type) (((sym) << 32) + ((type) & 0xffffffffL))
#define ELF64_R_TYPE_DATA(info) (((Elf64_Xword)(info)<<32)>>40)
#define ELF64_R_TYPE_ID(info) (((Elf64_Xword)(info)<<56)>>56)
#define ELF64_R_TYPE_ID(info) (((Elf64_Xword)(info)<<56)>>56)
#define ELF64_R_TYPE_INFO(data, type) \
(((Elf64_Xword)(data)<<8)+(Elf64_Xword)(type))
@ -167,25 +166,25 @@ typedef Elf_Note Elf64_Nhdr;
* Move entry
*/
typedef struct {
Elf64_Lword m_value; /* symbol value */
Elf64_Xword m_info; /* size + index */
Elf64_Xword m_poffset; /* symbol offset */
Elf64_Half m_repeat; /* repeat count */
Elf64_Half m_stride; /* stride info */
Elf64_Lword m_value; /* symbol value */
Elf64_Xword m_info; /* size + index */
Elf64_Xword m_poffset; /* symbol offset */
Elf64_Half m_repeat; /* repeat count */
Elf64_Half m_stride; /* stride info */
} Elf64_Move;
#define ELF64_M_SYM(info) ((info)>>8)
#define ELF64_M_SIZE(info) ((unsigned char)(info))
#define ELF64_M_SYM(info) ((info)>>8)
#define ELF64_M_SIZE(info) ((unsigned char)(info))
#define ELF64_M_INFO(sym, size) (((sym)<<8)+(unsigned char)(size))
/*
* Hardware/Software capabilities entry
*/
typedef struct {
Elf64_Xword c_tag; /* how to interpret value */
Elf64_Xword c_tag; /* how to interpret value */
union {
Elf64_Xword c_val;
Elf64_Addr c_ptr;
Elf64_Xword c_val;
Elf64_Addr c_ptr;
} c_un;
} Elf64_Cap;
@ -194,17 +193,17 @@ typedef struct {
*/
typedef struct {
Elf64_Word st_name; /* String table index of name. */
unsigned char st_info; /* Type and binding information. */
unsigned char st_other; /* Reserved (not used). */
Elf64_Half st_shndx; /* Section index of symbol. */
Elf64_Addr st_value; /* Symbol value. */
Elf64_Xword st_size; /* Size of associated object. */
Elf64_Word st_name; /* String table index of name. */
unsigned char st_info; /* Type and binding information. */
unsigned char st_other; /* Reserved (not used). */
Elf64_Half st_shndx; /* Section index of symbol. */
Elf64_Addr st_value; /* Symbol value. */
Elf64_Xword st_size; /* Size of associated object. */
} Elf64_Sym;
/* Macros for accessing the fields of st_info. */
#define ELF64_ST_BIND(info) ((info) >> 4)
#define ELF64_ST_TYPE(info) ((info) & 0xf)
#define ELF64_ST_BIND(info) ((info) >> 4)
#define ELF64_ST_TYPE(info) ((info) & 0xf)
/* Macro for constructing st_info from field values. */
#define ELF64_ST_INFO(bind, type) (((bind) << 4) + ((type) & 0xf))
@ -214,41 +213,41 @@ typedef struct {
/* Structures used by Sun & GNU-style symbol versioning. */
typedef struct {
Elf64_Half vd_version;
Elf64_Half vd_flags;
Elf64_Half vd_ndx;
Elf64_Half vd_cnt;
Elf64_Word vd_hash;
Elf64_Word vd_aux;
Elf64_Word vd_next;
Elf64_Half vd_version;
Elf64_Half vd_flags;
Elf64_Half vd_ndx;
Elf64_Half vd_cnt;
Elf64_Word vd_hash;
Elf64_Word vd_aux;
Elf64_Word vd_next;
} Elf64_Verdef;
typedef struct {
Elf64_Word vda_name;
Elf64_Word vda_next;
Elf64_Word vda_name;
Elf64_Word vda_next;
} Elf64_Verdaux;
typedef struct {
Elf64_Half vn_version;
Elf64_Half vn_cnt;
Elf64_Word vn_file;
Elf64_Word vn_aux;
Elf64_Word vn_next;
Elf64_Half vn_version;
Elf64_Half vn_cnt;
Elf64_Word vn_file;
Elf64_Word vn_aux;
Elf64_Word vn_next;
} Elf64_Verneed;
typedef struct {
Elf64_Word vna_hash;
Elf64_Half vna_flags;
Elf64_Half vna_other;
Elf64_Word vna_name;
Elf64_Word vna_next;
Elf64_Word vna_hash;
Elf64_Half vna_flags;
Elf64_Half vna_other;
Elf64_Word vna_name;
Elf64_Word vna_next;
} Elf64_Vernaux;
typedef Elf64_Half Elf64_Versym;
typedef struct {
Elf64_Half si_boundto; /* direct bindings - symbol bound to */
Elf64_Half si_flags; /* per symbol flags */
Elf64_Half si_boundto; /* direct bindings - symbol bound to */
Elf64_Half si_flags; /* per symbol flags */
} Elf64_Syminfo;
#endif /* !_SYS_ELF64_H_ */

173
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/Elf64Lib.c
View File

@ -18,13 +18,13 @@
**/
Elf64_Shdr *
GetElf64SectionByIndex (
IN UINT8 *ImageBase,
IN UINT32 Index
IN UINT8 *ImageBase,
IN UINT32 Index
)
{
Elf64_Ehdr *Ehdr;
Elf64_Ehdr *Ehdr;
Ehdr = (Elf64_Ehdr *)ImageBase;
Ehdr = (Elf64_Ehdr *)ImageBase;
if (Index >= Ehdr->e_shnum) {
return NULL;
}
@ -42,13 +42,13 @@ GetElf64SectionByIndex (
**/
Elf64_Phdr *
GetElf64SegmentByIndex (
IN UINT8 *ImageBase,
IN UINT32 Index
IN UINT8 *ImageBase,
IN UINT32 Index
)
{
Elf64_Ehdr *Ehdr;
Elf64_Ehdr *Ehdr;
Ehdr = (Elf64_Ehdr *)ImageBase;
Ehdr = (Elf64_Ehdr *)ImageBase;
if (Index >= Ehdr->e_phnum) {
return NULL;
}
@ -67,24 +67,26 @@ GetElf64SegmentByIndex (
**/
Elf64_Shdr *
GetElf64SectionByRange (
IN UINT8 *ImageBase,
IN UINT64 Offset,
IN UINT64 Size
IN UINT8 *ImageBase,
IN UINT64 Offset,
IN UINT64 Size
)
{
UINT32 Index;
Elf64_Ehdr *Ehdr;
Elf64_Shdr *Shdr;
UINT32 Index;
Elf64_Ehdr *Ehdr;
Elf64_Shdr *Shdr;
Ehdr = (Elf64_Ehdr *)ImageBase;
Shdr = (Elf64_Shdr *) (ImageBase + Ehdr->e_shoff);
Shdr = (Elf64_Shdr *)(ImageBase + Ehdr->e_shoff);
for (Index = 0; Index < Ehdr->e_shnum; Index++) {
if ((Shdr->sh_offset == Offset) && (Shdr->sh_size == Size)) {
return Shdr;
}
Shdr = ELF_NEXT_ENTRY (Elf64_Shdr, Shdr, Ehdr->e_shentsize);
}
return NULL;
}
@ -102,27 +104,28 @@ GetElf64SectionByRange (
**/
EFI_STATUS
ProcessRelocation64 (
IN Elf64_Rela *Rela,
IN UINT64 RelaSize,
IN UINT64 RelaEntrySize,
IN UINT64 RelaType,
IN INTN Delta,
IN BOOLEAN DynamicLinking
IN Elf64_Rela *Rela,
IN UINT64 RelaSize,
IN UINT64 RelaEntrySize,
IN UINT64 RelaType,
IN INTN Delta,
IN BOOLEAN DynamicLinking
)
{
UINTN Index;
UINT64 *Ptr;
UINT32 Type;
UINTN Index;
UINT64 *Ptr;
UINT32 Type;
for ( Index = 0
; MultU64x64 (RelaEntrySize, Index) < RelaSize
; Index++, Rela = ELF_NEXT_ENTRY (Elf64_Rela, Rela, RelaEntrySize)
) {
; MultU64x64 (RelaEntrySize, Index) < RelaSize
; Index++, Rela = ELF_NEXT_ENTRY (Elf64_Rela, Rela, RelaEntrySize)
)
{
//
// r_offset is the virtual address of the storage unit affected by the relocation.
//
Ptr = (UINT64 *)(UINTN)(Rela->r_offset + Delta);
Type = ELF64_R_TYPE(Rela->r_info);
Ptr = (UINT64 *)(UINTN)(Rela->r_offset + Delta);
Type = ELF64_R_TYPE (Rela->r_info);
switch (Type) {
case R_X86_64_NONE:
case R_X86_64_PC32:
@ -142,6 +145,7 @@ ProcessRelocation64 (
} else {
*Ptr += Delta;
}
break;
case R_X86_64_32:
@ -187,12 +191,14 @@ ProcessRelocation64 (
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));
ASSERT (FALSE);
}
break;
default:
DEBUG ((DEBUG_INFO, "Unsupported relocation type %02X\n", Type));
}
}
return EFI_SUCCESS;
}
@ -206,19 +212,19 @@ ProcessRelocation64 (
**/
EFI_STATUS
RelocateElf64Dynamic (
IN ELF_IMAGE_CONTEXT *ElfCt
IN ELF_IMAGE_CONTEXT *ElfCt
)
{
UINT32 Index;
Elf64_Phdr *Phdr;
Elf64_Shdr *DynShdr;
Elf64_Shdr *RelShdr;
Elf64_Dyn *Dyn;
UINT64 RelaAddress;
UINT64 RelaCount;
UINT64 RelaSize;
UINT64 RelaEntrySize;
UINT64 RelaType;
UINT32 Index;
Elf64_Phdr *Phdr;
Elf64_Shdr *DynShdr;
Elf64_Shdr *RelShdr;
Elf64_Dyn *Dyn;
UINT64 RelaAddress;
UINT64 RelaCount;
UINT64 RelaSize;
UINT64 RelaEntrySize;
UINT64 RelaType;
//
// 1. Locate the dynamic section.
@ -248,21 +254,23 @@ RelocateElf64Dynamic (
if (DynShdr == NULL) {
return EFI_UNSUPPORTED;
}
ASSERT (DynShdr->sh_type == SHT_DYNAMIC);
ASSERT (DynShdr->sh_entsize >= sizeof (*Dyn));
//
// 2. Locate the relocation section from the dynamic section.
//
RelaAddress = MAX_UINT64;
RelaAddress = MAX_UINT64;
RelaSize = 0;
RelaCount = 0;
RelaEntrySize = 0;
RelaType = 0;
for ( Index = 0, Dyn = (Elf64_Dyn *) (ElfCt->FileBase + DynShdr->sh_offset)
; Index < DivU64x64Remainder (DynShdr->sh_size, DynShdr->sh_entsize, NULL)
; Index++, Dyn = ELF_NEXT_ENTRY (Elf64_Dyn, Dyn, DynShdr->sh_entsize)
) {
for ( Index = 0, Dyn = (Elf64_Dyn *)(ElfCt->FileBase + DynShdr->sh_offset)
; Index < DivU64x64Remainder (DynShdr->sh_size, DynShdr->sh_entsize, NULL)
; Index++, Dyn = ELF_NEXT_ENTRY (Elf64_Dyn, Dyn, DynShdr->sh_entsize)
)
{
switch (Dyn->d_tag) {
case DT_RELA:
case DT_REL:
@ -274,7 +282,7 @@ RelocateElf64Dynamic (
// For consistency, files do not contain relocation entries to ``correct'' addresses in the dynamic structure.
//
RelaAddress = Dyn->d_un.d_ptr;
RelaType = (Dyn->d_tag == DT_RELA) ? SHT_RELA: SHT_REL;
RelaType = (Dyn->d_tag == DT_RELA) ? SHT_RELA : SHT_REL;
break;
case DT_RELACOUNT:
case DT_RELCOUNT:
@ -313,12 +321,14 @@ RelocateElf64Dynamic (
if ((RelShdr->sh_addr == RelaAddress) && (RelShdr->sh_size == RelaSize)) {
break;
}
RelShdr = NULL;
}
if (RelShdr == NULL) {
return EFI_UNSUPPORTED;
}
ASSERT (RelShdr->sh_type == RelaType);
ASSERT (RelShdr->sh_entsize == RelaEntrySize);
@ -326,9 +336,11 @@ RelocateElf64Dynamic (
// 3. Process the relocation section.
//
ProcessRelocation64 (
(Elf64_Rela *) (ElfCt->FileBase + RelShdr->sh_offset),
RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,
(UINTN) ElfCt->ImageAddress - (UINTN) ElfCt->PreferredImageAddress,
(Elf64_Rela *)(ElfCt->FileBase + RelShdr->sh_offset),
RelShdr->sh_size,
RelShdr->sh_entsize,
RelShdr->sh_type,
(UINTN)ElfCt->ImageAddress - (UINTN)ElfCt->PreferredImageAddress,
TRUE
);
return EFI_SUCCESS;
@ -344,22 +356,22 @@ RelocateElf64Dynamic (
**/
EFI_STATUS
RelocateElf64Sections (
IN ELF_IMAGE_CONTEXT *ElfCt
IN ELF_IMAGE_CONTEXT *ElfCt
)
{
EFI_STATUS Status;
Elf64_Ehdr *Ehdr;
Elf64_Shdr *RelShdr;
Elf64_Shdr *Shdr;
UINT32 Index;
UINTN Delta;
EFI_STATUS Status;
Elf64_Ehdr *Ehdr;
Elf64_Shdr *RelShdr;
Elf64_Shdr *Shdr;
UINT32 Index;
UINTN Delta;
Ehdr = (Elf64_Ehdr *)ElfCt->FileBase;
Ehdr = (Elf64_Ehdr *)ElfCt->FileBase;
if (Ehdr->e_machine != EM_X86_64) {
return EFI_UNSUPPORTED;
}
Delta = (UINTN) ElfCt->ImageAddress - (UINTN) ElfCt->PreferredImageAddress;
Delta = (UINTN)ElfCt->ImageAddress - (UINTN)ElfCt->PreferredImageAddress;
ElfCt->EntryPoint = (UINTN)(Ehdr->e_entry + Delta);
//
@ -382,22 +394,27 @@ RelocateElf64Sections (
// The below relocation is needed in this case.
//
DEBUG ((DEBUG_INFO, "EXEC ELF: Fix actual/preferred base address delta ...\n"));
for ( Index = 0, RelShdr = (Elf64_Shdr *) (ElfCt->FileBase + Ehdr->e_shoff)
; Index < Ehdr->e_shnum
; Index++, RelShdr = ELF_NEXT_ENTRY (Elf64_Shdr, RelShdr, Ehdr->e_shentsize)
) {
for ( Index = 0, RelShdr = (Elf64_Shdr *)(ElfCt->FileBase + Ehdr->e_shoff)
; Index < Ehdr->e_shnum
; Index++, RelShdr = ELF_NEXT_ENTRY (Elf64_Shdr, RelShdr, Ehdr->e_shentsize)
)
{
if ((RelShdr->sh_type != SHT_REL) && (RelShdr->sh_type != SHT_RELA)) {
continue;
}
Shdr = GetElf64SectionByIndex (ElfCt->FileBase, RelShdr->sh_info);
if ((Shdr->sh_flags & SHF_ALLOC) == SHF_ALLOC) {
//
// Only fix up sections that occupy memory during process execution.
//
ProcessRelocation64 (
(Elf64_Rela *)((UINT8*)Ehdr + RelShdr->sh_offset),
RelShdr->sh_size, RelShdr->sh_entsize, RelShdr->sh_type,
Delta, FALSE
(Elf64_Rela *)((UINT8 *)Ehdr + RelShdr->sh_offset),
RelShdr->sh_size,
RelShdr->sh_entsize,
RelShdr->sh_type,
Delta,
FALSE
);
}
}
@ -420,13 +437,13 @@ RelocateElf64Sections (
**/
EFI_STATUS
LoadElf64Image (
IN ELF_IMAGE_CONTEXT *ElfCt
IN ELF_IMAGE_CONTEXT *ElfCt
)
{
Elf64_Ehdr *Ehdr;
Elf64_Phdr *Phdr;
UINT16 Index;
UINTN Delta;
Elf64_Ehdr *Ehdr;
Elf64_Phdr *Phdr;
UINT16 Index;
UINTN Delta;
ASSERT (ElfCt != NULL);
@ -436,14 +453,16 @@ LoadElf64Image (
Ehdr = (Elf64_Ehdr *)ElfCt->FileBase;
for ( Index = 0, Phdr = (Elf64_Phdr *)(ElfCt->FileBase + Ehdr->e_phoff)
; Index < Ehdr->e_phnum
; Index++, Phdr = ELF_NEXT_ENTRY (Elf64_Phdr, Phdr, Ehdr->e_phentsize)
) {
; Index < Ehdr->e_phnum
; Index++, Phdr = ELF_NEXT_ENTRY (Elf64_Phdr, Phdr, Ehdr->e_phentsize)
)
{
//
// Skip segments that don't require load (type tells, or size is 0)
//
if ((Phdr->p_type != PT_LOAD) ||
(Phdr->p_memsz == 0)) {
(Phdr->p_memsz == 0))
{
continue;
}
@ -451,9 +470,9 @@ LoadElf64Image (
// The memory offset of segment relative to the image base
// Note: CopyMem() does nothing when the dst equals to src.
//
Delta = (UINTN) Phdr->p_paddr - (UINTN) ElfCt->PreferredImageAddress;
CopyMem (ElfCt->ImageAddress + Delta, ElfCt->FileBase + (UINTN) Phdr->p_offset, (UINTN) Phdr->p_filesz);
ZeroMem (ElfCt->ImageAddress + Delta + (UINTN) Phdr->p_filesz, (UINTN) (Phdr->p_memsz - Phdr->p_filesz));
Delta = (UINTN)Phdr->p_paddr - (UINTN)ElfCt->PreferredImageAddress;
CopyMem (ElfCt->ImageAddress + Delta, ElfCt->FileBase + (UINTN)Phdr->p_offset, (UINTN)Phdr->p_filesz);
ZeroMem (ElfCt->ImageAddress + Delta + (UINTN)Phdr->p_filesz, (UINTN)(Phdr->p_memsz - Phdr->p_filesz));
}
//

1455
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/ElfCommon.h
View File

File diff suppressed because it is too large Load Diff

142
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/ElfLib.c
View File

@ -18,11 +18,11 @@
**/
BOOLEAN
IsElfFormat (
IN CONST UINT8 *ImageBase
IN CONST UINT8 *ImageBase
)
{
Elf32_Ehdr *Elf32Hdr;
Elf64_Ehdr *Elf64Hdr;
Elf32_Ehdr *Elf32Hdr;
Elf64_Ehdr *Elf64Hdr;
ASSERT (ImageBase != NULL);
@ -35,7 +35,8 @@ IsElfFormat (
(Elf32Hdr->e_ident[EI_MAG1] != ELFMAG1) ||
(Elf32Hdr->e_ident[EI_MAG1] != ELFMAG1) ||
(Elf32Hdr->e_ident[EI_MAG2] != ELFMAG2)
) {
)
{
return FALSE;
}
@ -101,6 +102,7 @@ IsElfFormat (
return FALSE;
}
}
return TRUE;
}
@ -116,17 +118,17 @@ IsElfFormat (
**/
EFI_STATUS
CalculateElfFileSize (
IN ELF_IMAGE_CONTEXT *ElfCt,
OUT UINTN *FileSize
IN ELF_IMAGE_CONTEXT *ElfCt,
OUT UINTN *FileSize
)
{
EFI_STATUS Status;
UINTN FileSize1;
UINTN FileSize2;
Elf32_Ehdr *Elf32Hdr;
Elf64_Ehdr *Elf64Hdr;
UINTN Offset;
UINTN Size;
EFI_STATUS Status;
UINTN FileSize1;
UINTN FileSize2;
Elf32_Ehdr *Elf32Hdr;
Elf64_Ehdr *Elf64Hdr;
UINTN Offset;
UINTN Size;
if ((ElfCt == NULL) || (FileSize == NULL)) {
return EFI_INVALID_PARAMETER;
@ -134,22 +136,23 @@ CalculateElfFileSize (
// Use last section as end of file
Status = GetElfSectionPos (ElfCt, ElfCt->ShNum - 1, &Offset, &Size);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
}
FileSize1 = Offset + Size;
// Use end of section header as end of file
FileSize2 = 0;
if (ElfCt->EiClass == ELFCLASS32) {
Elf32Hdr = (Elf32_Ehdr *)ElfCt->FileBase;
Elf32Hdr = (Elf32_Ehdr *)ElfCt->FileBase;
FileSize2 = Elf32Hdr->e_shoff + Elf32Hdr->e_shentsize * Elf32Hdr->e_shnum;
} else if (ElfCt->EiClass == ELFCLASS64) {
Elf64Hdr = (Elf64_Ehdr *)ElfCt->FileBase;
Elf64Hdr = (Elf64_Ehdr *)ElfCt->FileBase;
FileSize2 = (UINTN)(Elf64Hdr->e_shoff + Elf64Hdr->e_shentsize * Elf64Hdr->e_shnum);
}
*FileSize = MAX(FileSize1, FileSize2);
*FileSize = MAX (FileSize1, FileSize2);
return EFI_SUCCESS;
}
@ -168,14 +171,14 @@ CalculateElfFileSize (
**/
EFI_STATUS
GetElfSegmentInfo (
IN UINT8 *ImageBase,
IN UINT32 EiClass,
IN UINT32 Index,
OUT SEGMENT_INFO *SegInfo
IN UINT8 *ImageBase,
IN UINT32 EiClass,
IN UINT32 Index,
OUT SEGMENT_INFO *SegInfo
)
{
Elf32_Phdr *Elf32Phdr;
Elf64_Phdr *Elf64Phdr;
Elf32_Phdr *Elf32Phdr;
Elf64_Phdr *Elf64Phdr;
if ((ImageBase == NULL) || (SegInfo == NULL)) {
return EFI_INVALID_PARAMETER;
@ -184,22 +187,22 @@ GetElfSegmentInfo (
if (EiClass == ELFCLASS32) {
Elf32Phdr = GetElf32SegmentByIndex (ImageBase, Index);
if (Elf32Phdr != NULL) {
SegInfo->PtType = Elf32Phdr->p_type;
SegInfo->Offset = Elf32Phdr->p_offset;
SegInfo->Length = Elf32Phdr->p_filesz;
SegInfo->MemLen = Elf32Phdr->p_memsz;
SegInfo->MemAddr = Elf32Phdr->p_paddr;
SegInfo->PtType = Elf32Phdr->p_type;
SegInfo->Offset = Elf32Phdr->p_offset;
SegInfo->Length = Elf32Phdr->p_filesz;
SegInfo->MemLen = Elf32Phdr->p_memsz;
SegInfo->MemAddr = Elf32Phdr->p_paddr;
SegInfo->Alignment = Elf32Phdr->p_align;
return EFI_SUCCESS;
}
} else if (EiClass == ELFCLASS64) {
Elf64Phdr = GetElf64SegmentByIndex (ImageBase, Index);
if (Elf64Phdr != NULL) {
SegInfo->PtType = Elf64Phdr->p_type;
SegInfo->Offset = (UINTN)Elf64Phdr->p_offset;
SegInfo->Length = (UINTN)Elf64Phdr->p_filesz;
SegInfo->MemLen = (UINTN)Elf64Phdr->p_memsz;
SegInfo->MemAddr = (UINTN)Elf64Phdr->p_paddr;
SegInfo->PtType = Elf64Phdr->p_type;
SegInfo->Offset = (UINTN)Elf64Phdr->p_offset;
SegInfo->Length = (UINTN)Elf64Phdr->p_filesz;
SegInfo->MemLen = (UINTN)Elf64Phdr->p_memsz;
SegInfo->MemAddr = (UINTN)Elf64Phdr->p_paddr;
SegInfo->Alignment = (UINTN)Elf64Phdr->p_align;
return EFI_SUCCESS;
}
@ -224,24 +227,25 @@ GetElfSegmentInfo (
EFI_STATUS
EFIAPI
ParseElfImage (
IN VOID *ImageBase,
OUT ELF_IMAGE_CONTEXT *ElfCt
IN VOID *ImageBase,
OUT ELF_IMAGE_CONTEXT *ElfCt
)
{
Elf32_Ehdr *Elf32Hdr;
Elf64_Ehdr *Elf64Hdr;
Elf32_Shdr *Elf32Shdr;
Elf64_Shdr *Elf64Shdr;
EFI_STATUS Status;
UINT32 Index;
SEGMENT_INFO SegInfo;
UINTN End;
UINTN Base;
Elf32_Ehdr *Elf32Hdr;
Elf64_Ehdr *Elf64Hdr;
Elf32_Shdr *Elf32Shdr;
Elf64_Shdr *Elf64Shdr;
EFI_STATUS Status;
UINT32 Index;
SEGMENT_INFO SegInfo;
UINTN End;
UINTN Base;
if (ElfCt == NULL) {
return EFI_INVALID_PARAMETER;
}
ZeroMem (ElfCt, sizeof(ELF_IMAGE_CONTEXT));
ZeroMem (ElfCt, sizeof (ELF_IMAGE_CONTEXT));
if (ImageBase == NULL) {
return (ElfCt->ParseStatus = EFI_INVALID_PARAMETER);
@ -252,30 +256,34 @@ ParseElfImage (
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);
}
Elf32Hdr = (Elf32_Ehdr *)ElfCt->FileBase;
Elf32Hdr = (Elf32_Ehdr *)ElfCt->FileBase;
ElfCt->EiClass = Elf32Hdr->e_ident[EI_CLASS];
if (ElfCt->EiClass == ELFCLASS32) {
if ((Elf32Hdr->e_type != ET_EXEC) && (Elf32Hdr->e_type != ET_DYN)) {
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);
}
Elf32Shdr = (Elf32_Shdr *)GetElf32SectionByIndex (ElfCt->FileBase, Elf32Hdr->e_shstrndx);
if (Elf32Shdr == NULL) {
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);
}
ElfCt->EntryPoint = (UINTN)Elf32Hdr->e_entry;
ElfCt->ShNum = Elf32Hdr->e_shnum;
ElfCt->PhNum = Elf32Hdr->e_phnum;
ElfCt->ShStrLen = Elf32Shdr->sh_size;
ElfCt->ShStrOff = Elf32Shdr->sh_offset;
} else {
Elf64Hdr = (Elf64_Ehdr *)Elf32Hdr;
Elf64Hdr = (Elf64_Ehdr *)Elf32Hdr;
if ((Elf64Hdr->e_type != ET_EXEC) && (Elf64Hdr->e_type != ET_DYN)) {
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);
}
Elf64Shdr = (Elf64_Shdr *)GetElf64SectionByIndex (ElfCt->FileBase, Elf64Hdr->e_shstrndx);
if (Elf64Shdr == NULL) {
return (ElfCt->ParseStatus = EFI_UNSUPPORTED);
}
ElfCt->EntryPoint = (UINTN)Elf64Hdr->e_entry;
ElfCt->ShNum = Elf64Hdr->e_shnum;
ElfCt->PhNum = Elf64Hdr->e_phnum;
@ -286,8 +294,8 @@ ParseElfImage (
//
// Get the preferred image base and required memory size when loaded to new location.
//
End = 0;
Base = MAX_UINT32;
End = 0;
Base = MAX_UINT32;
ElfCt->ReloadRequired = FALSE;
for (Index = 0; Index < ElfCt->PhNum; Index++) {
Status = GetElfSegmentInfo (ElfCt->FileBase, ElfCt->EiClass, Index, &SegInfo);
@ -307,18 +315,20 @@ ParseElfImage (
if (Base > (SegInfo.MemAddr & ~(EFI_PAGE_SIZE - 1))) {
Base = SegInfo.MemAddr & ~(EFI_PAGE_SIZE - 1);
}
if (End < ALIGN_VALUE (SegInfo.MemAddr + SegInfo.MemLen, EFI_PAGE_SIZE) - 1) {
End = ALIGN_VALUE (SegInfo.MemAddr + SegInfo.MemLen, EFI_PAGE_SIZE) - 1;
}
}
//
// 0 - MAX_UINT32 + 1 equals to 0.
//
ElfCt->ImageSize = End - Base + 1;
ElfCt->PreferredImageAddress = (VOID *) Base;
ElfCt->PreferredImageAddress = (VOID *)Base;
CalculateElfFileSize (ElfCt, &ElfCt->FileSize);
return (ElfCt->ParseStatus = EFI_SUCCESS);;
return (ElfCt->ParseStatus = EFI_SUCCESS);
}
/**
@ -339,10 +349,10 @@ ParseElfImage (
EFI_STATUS
EFIAPI
LoadElfImage (
IN ELF_IMAGE_CONTEXT *ElfCt
IN ELF_IMAGE_CONTEXT *ElfCt
)
{
EFI_STATUS Status;
EFI_STATUS Status;
if (ElfCt == NULL) {
return EFI_INVALID_PARAMETER;
@ -366,7 +376,6 @@ LoadElfImage (
return Status;
}
/**
Get a ELF section name from its index.
@ -381,14 +390,14 @@ LoadElfImage (
EFI_STATUS
EFIAPI
GetElfSectionName (
IN ELF_IMAGE_CONTEXT *ElfCt,
IN UINT32 SectionIndex,
OUT CHAR8 **SectionName
IN ELF_IMAGE_CONTEXT *ElfCt,
IN UINT32 SectionIndex,
OUT CHAR8 **SectionName
)
{
Elf32_Shdr *Elf32Shdr;
Elf64_Shdr *Elf64Shdr;
CHAR8 *Name;
Elf32_Shdr *Elf32Shdr;
Elf64_Shdr *Elf64Shdr;
CHAR8 *Name;
if ((ElfCt == NULL) || (SectionName == NULL)) {
return EFI_INVALID_PARAMETER;
@ -419,7 +428,6 @@ GetElfSectionName (
return EFI_SUCCESS;
}
/**
Get the offset and size of x-th ELF section.
@ -436,14 +444,14 @@ GetElfSectionName (
EFI_STATUS
EFIAPI
GetElfSectionPos (
IN ELF_IMAGE_CONTEXT *ElfCt,
IN UINT32 Index,
OUT UINTN *Offset,
OUT UINTN *Size
IN ELF_IMAGE_CONTEXT *ElfCt,
IN UINT32 Index,
OUT UINTN *Offset,
OUT UINTN *Size
)
{
Elf32_Shdr *Elf32Shdr;
Elf64_Shdr *Elf64Shdr;
Elf32_Shdr *Elf32Shdr;
Elf64_Shdr *Elf64Shdr;
if ((ElfCt == NULL) || (Offset == NULL) || (Size == NULL)) {
return EFI_INVALID_PARAMETER;

21
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/ElfLibInternal.h
View File

@ -20,7 +20,6 @@
#define ELF_NEXT_ENTRY(EntryType, Current, EntrySize) \
((EntryType *) ((UINT8 *)Current + EntrySize))
/**
Return the section header specified by Index.
@ -31,8 +30,8 @@
**/
Elf32_Shdr *
GetElf32SectionByIndex (
IN UINT8 *ImageBase,
IN UINT32 Index
IN UINT8 *ImageBase,
IN UINT32 Index
);
/**
@ -45,8 +44,8 @@ GetElf32SectionByIndex (
**/
Elf64_Shdr *
GetElf64SectionByIndex (
IN UINT8 *ImageBase,
IN UINT32 Index
IN UINT8 *ImageBase,
IN UINT32 Index
);
/**
@ -59,8 +58,8 @@ GetElf64SectionByIndex (
**/
Elf32_Phdr *
GetElf32SegmentByIndex (
IN UINT8 *ImageBase,
IN UINT32 Index
IN UINT8 *ImageBase,
IN UINT32 Index
);
/**
@ -73,8 +72,8 @@ GetElf32SegmentByIndex (
**/
Elf64_Phdr *
GetElf64SegmentByIndex (
IN UINT8 *ImageBase,
IN UINT32 Index
IN UINT8 *ImageBase,
IN UINT32 Index
);
/**
@ -88,7 +87,7 @@ GetElf64SegmentByIndex (
**/
EFI_STATUS
LoadElf32Image (
IN ELF_IMAGE_CONTEXT *ElfCt
IN ELF_IMAGE_CONTEXT *ElfCt
);
/**
@ -103,7 +102,7 @@ LoadElf32Image (
**/
EFI_STATUS
LoadElf64Image (
IN ELF_IMAGE_CONTEXT *ElfCt
IN ELF_IMAGE_CONTEXT *ElfCt
);
#endif

76
UefiPayloadPkg/PayloadLoaderPeim/PayloadLoaderPeim.c
View File

@ -44,19 +44,19 @@ PeiLoadFileLoadPayload (
OUT UINT32 *AuthenticationState
)
{
EFI_STATUS Status;
VOID *Elf;
UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
ELF_IMAGE_CONTEXT Context;
UNIVERSAL_PAYLOAD_INFO_HEADER *PldInfo;
UINT32 Index;
UINT16 ExtraDataIndex;
CHAR8 *SectionName;
UINTN Offset;
UINTN Size;
UINT32 ExtraDataCount;
UINTN Instance;
UINTN Length;
EFI_STATUS Status;
VOID *Elf;
UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
ELF_IMAGE_CONTEXT Context;
UNIVERSAL_PAYLOAD_INFO_HEADER *PldInfo;
UINT32 Index;
UINT16 ExtraDataIndex;
CHAR8 *SectionName;
UINTN Offset;
UINTN Size;
UINT32 ExtraDataCount;
UINTN Instance;
UINTN Length;
//
// ELF is added to file as RAW section for EDKII bootloader.
@ -75,8 +75,11 @@ PeiLoadFileLoadPayload (
} while (EFI_ERROR (Status));
DEBUG ((
DEBUG_INFO, "Payload File Size: 0x%08X, Mem Size: 0x%08x, Reload: %d\n",
Context.FileSize, Context.ImageSize, Context.ReloadRequired
DEBUG_INFO,
"Payload File Size: 0x%08X, Mem Size: 0x%08x, Reload: %d\n",
Context.FileSize,
Context.ImageSize,
Context.ReloadRequired
));
//
@ -86,16 +89,17 @@ PeiLoadFileLoadPayload (
ExtraDataCount = 0;
for (Index = 0; Index < Context.ShNum; Index++) {
Status = GetElfSectionName (&Context, Index, &SectionName);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
continue;
}
DEBUG ((DEBUG_INFO, "Payload Section[%d]: %a\n", Index, SectionName));
if (AsciiStrCmp(SectionName, UNIVERSAL_PAYLOAD_INFO_SEC_NAME) == 0) {
if (AsciiStrCmp (SectionName, UNIVERSAL_PAYLOAD_INFO_SEC_NAME) == 0) {
Status = GetElfSectionPos (&Context, Index, &Offset, &Size);
if (!EFI_ERROR(Status)) {
if (!EFI_ERROR (Status)) {
PldInfo = (UNIVERSAL_PAYLOAD_INFO_HEADER *)(Context.FileBase + Offset);
}
} else if (AsciiStrnCmp(SectionName, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH) == 0) {
} else if (AsciiStrnCmp (SectionName, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH) == 0) {
Status = GetElfSectionPos (&Context, Index, &Offset, &Size);
if (!EFI_ERROR (Status)) {
ExtraDataCount++;
@ -106,27 +110,28 @@ PeiLoadFileLoadPayload (
//
// Report the additional PLD sections through HOB.
//
Length = sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA) + ExtraDataCount * sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY);
Length = sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA) + ExtraDataCount * sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY);
ExtraData = BuildGuidHob (
&gUniversalPayloadExtraDataGuid,
Length
);
ExtraData->Count = ExtraDataCount;
&gUniversalPayloadExtraDataGuid,
Length
);
ExtraData->Count = ExtraDataCount;
ExtraData->Header.Revision = UNIVERSAL_PAYLOAD_EXTRA_DATA_REVISION;
ExtraData->Header.Length = (UINT16) Length;
ExtraData->Header.Length = (UINT16)Length;
if (ExtraDataCount != 0) {
for (ExtraDataIndex = 0, Index = 0; Index < Context.ShNum; Index++) {
Status = GetElfSectionName (&Context, Index, &SectionName);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
continue;
}
if (AsciiStrnCmp(SectionName, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH) == 0) {
if (AsciiStrnCmp (SectionName, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX, UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH) == 0) {
Status = GetElfSectionPos (&Context, Index, &Offset, &Size);
if (!EFI_ERROR (Status)) {
ASSERT (ExtraDataIndex < ExtraDataCount);
AsciiStrCpyS (
ExtraData->Entry[ExtraDataIndex].Identifier,
sizeof(ExtraData->Entry[ExtraDataIndex].Identifier),
sizeof (ExtraData->Entry[ExtraDataIndex].Identifier),
SectionName + UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH
);
ExtraData->Entry[ExtraDataIndex].Base = (UINTN)(Context.FileBase + Offset);
@ -137,7 +142,7 @@ PeiLoadFileLoadPayload (
}
}
if (Context.ReloadRequired || Context.PreferredImageAddress != Context.FileBase) {
if (Context.ReloadRequired || (Context.PreferredImageAddress != Context.FileBase)) {
Context.ImageAddress = AllocatePages (EFI_SIZE_TO_PAGES (Context.ImageSize));
} else {
Context.ImageAddress = Context.FileBase;
@ -147,25 +152,25 @@ PeiLoadFileLoadPayload (
// Load ELF into the required base
//
Status = LoadElfImage (&Context);
if (!EFI_ERROR(Status)) {
*ImageAddressArg = (UINTN) Context.ImageAddress;
if (!EFI_ERROR (Status)) {
*ImageAddressArg = (UINTN)Context.ImageAddress;
*EntryPoint = Context.EntryPoint;
*ImageSizeArg = Context.ImageSize;
}
return Status;
}
EFI_PEI_LOAD_FILE_PPI mPeiLoadFilePpi = {
EFI_PEI_LOAD_FILE_PPI mPeiLoadFilePpi = {
PeiLoadFileLoadPayload
};
EFI_PEI_PPI_DESCRIPTOR gPpiLoadFilePpiList = {
EFI_PEI_PPI_DESCRIPTOR gPpiLoadFilePpiList = {
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEfiPeiLoadFilePpiGuid,
&mPeiLoadFilePpi
};
/**
Install Pei Load File PPI.
@ -185,6 +190,7 @@ InitializePayloadLoaderPeim (
)
{
EFI_STATUS Status;
Status = PeiServicesInstallPpi (&gPpiLoadFilePpiList);
return Status;

144
UefiPayloadPkg/PchSmiDispatchSmm/PchSmiDispatchSmm.c
View File

@ -11,16 +11,16 @@
#include "PchSmiDispatchSmm.h"
typedef struct {
UINT8 EosBitOffset;
UINT8 ApmBitOffset;
UINT32 SmiEosAddr;
UINT32 SmiApmStsAddr;
UINT8 EosBitOffset;
UINT8 ApmBitOffset;
UINT32 SmiEosAddr;
UINT32 SmiApmStsAddr;
} SMM_PCH_REGISTER;
SMM_PCH_REGISTER mSmiPchReg;
SMM_PCH_REGISTER mSmiPchReg;
EFI_SMM_CPU_PROTOCOL *mSmmCpuProtocol;
LIST_ENTRY mSmmSwDispatch2Queue = INITIALIZE_LIST_HEAD_VARIABLE (mSmmSwDispatch2Queue);
EFI_SMM_CPU_PROTOCOL *mSmmCpuProtocol;
LIST_ENTRY mSmmSwDispatch2Queue = INITIALIZE_LIST_HEAD_VARIABLE (mSmmSwDispatch2Queue);
/**
Find SmmSwDispatch2Context by SwSmiInputValue.
@ -31,19 +31,20 @@ LIST_ENTRY mSmmSwDispatch2Queue = INITIALIZE_LIST_HEAD_VARIABLE (mSm
**/
EFI_SMM_SW_DISPATCH2_CONTEXT *
FindContextBySwSmiInputValue (
IN UINTN SwSmiInputValue
IN UINTN SwSmiInputValue
)
{
LIST_ENTRY *Node;
EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;
LIST_ENTRY *Node;
EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;
Node = mSmmSwDispatch2Queue.ForwardLink;
for (; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {
for ( ; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {
Dispatch2Context = BASE_CR (Node, EFI_SMM_SW_DISPATCH2_CONTEXT, Link);
if (Dispatch2Context->SwSmiInputValue == SwSmiInputValue) {
return Dispatch2Context;
}
}
return NULL;
}
@ -56,19 +57,20 @@ FindContextBySwSmiInputValue (
**/
EFI_SMM_SW_DISPATCH2_CONTEXT *
FindContextByDispatchHandle (
IN EFI_HANDLE DispatchHandle
IN EFI_HANDLE DispatchHandle
)
{
LIST_ENTRY *Node;
EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;
LIST_ENTRY *Node;
EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;
Node = mSmmSwDispatch2Queue.ForwardLink;
for (; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {
for ( ; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {
Dispatch2Context = BASE_CR (Node, EFI_SMM_SW_DISPATCH2_CONTEXT, Link);
if (Dispatch2Context->DispatchHandle == DispatchHandle) {
return Dispatch2Context;
}
}
return NULL;
}
@ -86,20 +88,20 @@ FindContextByDispatchHandle (
**/
EFI_STATUS
SmmSwDispatcher (
IN EFI_HANDLE DispatchHandle,
IN CONST VOID *RegisterContext,
IN OUT VOID *CommBuffer,
IN OUT UINTN *CommBufferSize
IN EFI_HANDLE DispatchHandle,
IN CONST VOID *RegisterContext,
IN OUT VOID *CommBuffer,
IN OUT UINTN *CommBufferSize
)
{
EFI_STATUS Status;
EFI_SMM_SW_CONTEXT SwContext;
UINTN Index;
EFI_SMM_SW_DISPATCH2_CONTEXT *Context;
EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction;
EFI_SMM_SW_REGISTER_CONTEXT DispatchContext;
UINTN Size;
EFI_SMM_SAVE_STATE_IO_INFO IoInfo;
EFI_STATUS Status;
EFI_SMM_SW_CONTEXT SwContext;
UINTN Index;
EFI_SMM_SW_DISPATCH2_CONTEXT *Context;
EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction;
EFI_SMM_SW_REGISTER_CONTEXT DispatchContext;
UINTN Size;
EFI_SMM_SAVE_STATE_IO_INFO IoInfo;
//
// Construct new context
@ -114,7 +116,7 @@ SmmSwDispatcher (
for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {
Status = mSmmCpuProtocol->ReadSaveState (
mSmmCpuProtocol,
sizeof(IoInfo),
sizeof (IoInfo),
EFI_SMM_SAVE_STATE_REGISTER_IO,
Index,
&IoInfo
@ -122,6 +124,7 @@ SmmSwDispatcher (
if (EFI_ERROR (Status)) {
continue;
}
if (IoInfo.IoPort == SMM_CONTROL_PORT) {
//
// Great! Find it.
@ -147,15 +150,16 @@ SmmSwDispatcher (
Status = EFI_SUCCESS;
goto End;
}
DEBUG ((DEBUG_VERBOSE, "Prepare to call handler for 0x%x\n", SwContext.CommandPort));
//
// Dispatch
//
DispatchContext.SwSmiInputValue = SwContext.CommandPort;
Size = sizeof(SwContext);
DispatchFunction = (EFI_SMM_HANDLER_ENTRY_POINT2)Context->DispatchFunction;
Status = DispatchFunction (DispatchHandle, &DispatchContext, &SwContext, &Size);
Size = sizeof (SwContext);
DispatchFunction = (EFI_SMM_HANDLER_ENTRY_POINT2)Context->DispatchFunction;
Status = DispatchFunction (DispatchHandle, &DispatchContext, &SwContext, &Size);
End:
//
@ -163,7 +167,6 @@ End:
//
IoOr32 (mSmiPchReg.SmiApmStsAddr, 1 << mSmiPchReg.ApmBitOffset);
//
// Set EOS bit
//
@ -172,7 +175,6 @@ End:
return Status;
}
/**
Check the SwSmiInputValue is already used
@ -184,14 +186,14 @@ Check the SwSmiInputValue is already used
**/
EFI_STATUS
SmiInputValueCheck (
IN UINTN SwSmiInputValue
IN UINTN SwSmiInputValue
)
{
LIST_ENTRY *Node;
EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;
LIST_ENTRY *Node;
EFI_SMM_SW_DISPATCH2_CONTEXT *Dispatch2Context;
Node = mSmmSwDispatch2Queue.ForwardLink;
for (; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {
for ( ; Node != &mSmmSwDispatch2Queue; Node = Node->ForwardLink) {
Dispatch2Context = BASE_CR (Node, EFI_SMM_SW_DISPATCH2_CONTEXT, Link);
if (Dispatch2Context->SwSmiInputValue == SwSmiInputValue) {
return EFI_INVALID_PARAMETER;
@ -201,7 +203,6 @@ SmiInputValueCheck (
return EFI_SUCCESS;
}
/**
Register a child SMI source dispatch function for the specified software SMI.
@ -239,9 +240,9 @@ SmmSwDispatch2Register (
OUT EFI_HANDLE *DispatchHandle
)
{
EFI_STATUS Status;
UINTN Index;
EFI_SMM_SW_DISPATCH2_CONTEXT *Context;
EFI_STATUS Status;
UINTN Index;
EFI_SMM_SW_DISPATCH2_CONTEXT *Context;
if (RegContext->SwSmiInputValue == (UINTN)-1) {
//
@ -256,6 +257,7 @@ SmmSwDispatch2Register (
break;
}
}
if (RegContext->SwSmiInputValue == (UINTN)-1) {
return EFI_OUT_OF_RESOURCES;
}
@ -269,13 +271,13 @@ SmmSwDispatch2Register (
//
// Register
//
Status = gSmst->SmmAllocatePool (EfiRuntimeServicesData, sizeof(*Context), (VOID **)&Context);
Status = gSmst->SmmAllocatePool (EfiRuntimeServicesData, sizeof (*Context), (VOID **)&Context);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
*DispatchHandle = (EFI_HANDLE )Context;
*DispatchHandle = (EFI_HANDLE)Context;
Context->Signature = SMI_SW_HANDLER_SIGNATURE;
Context->SwSmiInputValue = RegContext->SwSmiInputValue;
Context->DispatchFunction = (UINTN)DispatchFunction;
@ -285,7 +287,6 @@ SmmSwDispatch2Register (
return Status;
}
/**
Unregister a child SMI source dispatch function for the specified software SMI.
@ -305,7 +306,7 @@ SmmSwDispatch2UnRegister (
IN EFI_HANDLE DispatchHandle
)
{
EFI_SMM_SW_DISPATCH2_CONTEXT *Context;
EFI_SMM_SW_DISPATCH2_CONTEXT *Context;
//
// Unregister
@ -320,14 +321,12 @@ SmmSwDispatch2UnRegister (
return EFI_SUCCESS;
}
EFI_SMM_SW_DISPATCH2_PROTOCOL gSmmSwDispatch2 = {
EFI_SMM_SW_DISPATCH2_PROTOCOL gSmmSwDispatch2 = {
SmmSwDispatch2Register,
SmmSwDispatch2UnRegister,
MAXIMUM_SWI_VALUE
};
/**
Get specified SMI register based on given register ID
@ -340,12 +339,12 @@ EFI_SMM_SW_DISPATCH2_PROTOCOL gSmmSwDispatch2 = {
**/
PLD_GENERIC_REGISTER *
GetSmmCtrlRegById (
IN PLD_SMM_REGISTERS *SmmRegister,
IN UINT32 Id
IN PLD_SMM_REGISTERS *SmmRegister,
IN UINT32 Id
)
{
UINT32 Index;
PLD_GENERIC_REGISTER *PldReg;
UINT32 Index;
PLD_GENERIC_REGISTER *PldReg;
PldReg = NULL;
for (Index = 0; Index < SmmRegister->Count; Index++) {
@ -367,20 +366,20 @@ GetSmmCtrlRegById (
(PldReg->Address.Address == 0) ||
(PldReg->Address.RegisterBitWidth != 1) ||
(PldReg->Address.AddressSpaceId != EFI_ACPI_3_0_SYSTEM_IO) ||
(PldReg->Value != 1)) {
(PldReg->Value != 1))
{
DEBUG ((DEBUG_INFO, "Unexpected SMM register.\n"));
DEBUG ((DEBUG_INFO, "AddressSpaceId= 0x%x\n", PldReg->Address.AddressSpaceId));
DEBUG ((DEBUG_INFO, "RegBitWidth = 0x%x\n", PldReg->Address.RegisterBitWidth));
DEBUG ((DEBUG_INFO, "RegBitOffset = 0x%x\n", PldReg->Address.RegisterBitOffset));
DEBUG ((DEBUG_INFO, "AccessSize = 0x%x\n", PldReg->Address.AccessSize));
DEBUG ((DEBUG_INFO, "Address = 0x%lx\n",PldReg->Address.Address ));
DEBUG ((DEBUG_INFO, "Address = 0x%lx\n", PldReg->Address.Address));
return NULL;
}
return PldReg;
}
/**
Entry Point for this driver.
@ -393,28 +392,29 @@ GetSmmCtrlRegById (
EFI_STATUS
EFIAPI
PchSmiDispatchEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_HANDLE DispatchHandle;
EFI_HOB_GUID_TYPE *GuidHob;
PLD_SMM_REGISTERS *SmmRegister;
PLD_GENERIC_REGISTER *SmiEosReg;
PLD_GENERIC_REGISTER *SmiApmStsReg;
EFI_STATUS Status;
EFI_HANDLE DispatchHandle;
EFI_HOB_GUID_TYPE *GuidHob;
PLD_SMM_REGISTERS *SmmRegister;
PLD_GENERIC_REGISTER *SmiEosReg;
PLD_GENERIC_REGISTER *SmiApmStsReg;
GuidHob = GetFirstGuidHob (&gSmmRegisterInfoGuid);
if (GuidHob == NULL) {
return EFI_UNSUPPORTED;
}
SmmRegister = (PLD_SMM_REGISTERS *) GET_GUID_HOB_DATA(GuidHob);
SmiEosReg = GetSmmCtrlRegById (SmmRegister, REGISTER_ID_SMI_EOS);
SmmRegister = (PLD_SMM_REGISTERS *)GET_GUID_HOB_DATA (GuidHob);
SmiEosReg = GetSmmCtrlRegById (SmmRegister, REGISTER_ID_SMI_EOS);
if (SmiEosReg == NULL) {
DEBUG ((DEBUG_ERROR, "SMI EOS reg not found.\n"));
return EFI_NOT_FOUND;
}
mSmiPchReg.SmiEosAddr = (UINT32)SmiEosReg->Address.Address;
mSmiPchReg.EosBitOffset = SmiEosReg->Address.RegisterBitOffset;
@ -423,6 +423,7 @@ PchSmiDispatchEntryPoint (
DEBUG ((DEBUG_ERROR, "SMI APM status reg not found.\n"));
return EFI_NOT_FOUND;
}
mSmiPchReg.SmiApmStsAddr = (UINT32)SmiApmStsReg->Address.Address;
mSmiPchReg.ApmBitOffset = SmiApmStsReg->Address.RegisterBitOffset;
@ -442,14 +443,13 @@ PchSmiDispatchEntryPoint (
// Publish PI SMM SwDispatch2 Protocol
//
ImageHandle = NULL;
Status = gSmst->SmmInstallProtocolInterface (
&ImageHandle,
&gEfiSmmSwDispatch2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&gSmmSwDispatch2
);
Status = gSmst->SmmInstallProtocolInterface (
&ImageHandle,
&gEfiSmmSwDispatch2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&gSmmSwDispatch2
);
ASSERT_EFI_ERROR (Status);
return Status;
}

11
UefiPayloadPkg/PchSmiDispatchSmm/PchSmiDispatchSmm.h
View File

@ -26,12 +26,11 @@
#define SMM_DATA_PORT 0xB3
typedef struct {
UINTN Signature;
LIST_ENTRY Link;
EFI_HANDLE DispatchHandle;
UINTN SwSmiInputValue;
UINTN DispatchFunction;
UINTN Signature;
LIST_ENTRY Link;
EFI_HANDLE DispatchHandle;
UINTN SwSmiInputValue;
UINTN DispatchFunction;
} EFI_SMM_SW_DISPATCH2_CONTEXT;
#endif

84
UefiPayloadPkg/SmmAccessDxe/SmmAccessDxe.c
View File

@ -8,7 +8,7 @@
#include "SmmAccessDxe.h"
SMM_ACCESS_PRIVATE_DATA mSmmAccess;
SMM_ACCESS_PRIVATE_DATA mSmmAccess;
/**
Update region state from SMRAM description
@ -18,12 +18,12 @@ SMM_ACCESS_PRIVATE_DATA mSmmAccess;
**/
VOID
SyncRegionState2SmramDesc(
IN BOOLEAN OrLogic,
IN UINT64 Value
SyncRegionState2SmramDesc (
IN BOOLEAN OrLogic,
IN UINT64 Value
)
{
UINT32 Index;
UINT32 Index;
for (Index = 0; Index < mSmmAccess.NumberRegions; Index++) {
if (OrLogic) {
@ -50,7 +50,7 @@ SyncRegionState2SmramDesc(
EFI_STATUS
EFIAPI
Open (
IN EFI_SMM_ACCESS2_PROTOCOL *This
IN EFI_SMM_ACCESS2_PROTOCOL *This
)
{
if ((mSmmAccess.SmmRegionState & EFI_SMRAM_LOCKED) != 0) {
@ -62,10 +62,10 @@ Open (
}
mSmmAccess.SmmRegionState &= ~(EFI_SMRAM_CLOSED | EFI_ALLOCATED);
SyncRegionState2SmramDesc(FALSE, (UINT64)(UINTN)(~(EFI_SMRAM_CLOSED | EFI_ALLOCATED)));
SyncRegionState2SmramDesc (FALSE, (UINT64)(UINTN)(~(EFI_SMRAM_CLOSED | EFI_ALLOCATED)));
mSmmAccess.SmmRegionState |= EFI_SMRAM_OPEN;
SyncRegionState2SmramDesc(TRUE, EFI_SMRAM_OPEN);
SyncRegionState2SmramDesc (TRUE, EFI_SMRAM_OPEN);
mSmmAccess.SmmAccess.OpenState = TRUE;
return EFI_SUCCESS;
@ -88,7 +88,7 @@ Open (
EFI_STATUS
EFIAPI
Close (
IN EFI_SMM_ACCESS2_PROTOCOL *This
IN EFI_SMM_ACCESS2_PROTOCOL *This
)
{
if ((mSmmAccess.SmmRegionState & EFI_SMRAM_LOCKED) != 0) {
@ -104,10 +104,10 @@ Close (
}
mSmmAccess.SmmRegionState &= ~EFI_SMRAM_OPEN;
SyncRegionState2SmramDesc(FALSE, (UINT64)(UINTN)(~EFI_SMRAM_OPEN));
SyncRegionState2SmramDesc (FALSE, (UINT64)(UINTN)(~EFI_SMRAM_OPEN));
mSmmAccess.SmmRegionState |= (EFI_SMRAM_CLOSED | EFI_ALLOCATED);
SyncRegionState2SmramDesc(TRUE, EFI_SMRAM_CLOSED | EFI_ALLOCATED);
SyncRegionState2SmramDesc (TRUE, EFI_SMRAM_CLOSED | EFI_ALLOCATED);
mSmmAccess.SmmAccess.OpenState = FALSE;
@ -131,7 +131,7 @@ Close (
EFI_STATUS
EFIAPI
Lock (
IN EFI_SMM_ACCESS2_PROTOCOL *This
IN EFI_SMM_ACCESS2_PROTOCOL *This
)
{
if (mSmmAccess.SmmAccess.OpenState) {
@ -140,7 +140,7 @@ Lock (
}
mSmmAccess.SmmRegionState |= EFI_SMRAM_LOCKED;
SyncRegionState2SmramDesc(TRUE, EFI_SMRAM_LOCKED);
SyncRegionState2SmramDesc (TRUE, EFI_SMRAM_LOCKED);
mSmmAccess.SmmAccess.LockState = TRUE;
return EFI_SUCCESS;
}
@ -164,19 +164,19 @@ Lock (
EFI_STATUS
EFIAPI
GetCapabilities (
IN CONST EFI_SMM_ACCESS2_PROTOCOL *This,
IN OUT UINTN *SmramMapSize,
IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
IN CONST EFI_SMM_ACCESS2_PROTOCOL *This,
IN OUT UINTN *SmramMapSize,
IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
)
{
EFI_STATUS Status;
UINTN NecessaryBufferSize;
EFI_STATUS Status;
UINTN NecessaryBufferSize;
NecessaryBufferSize = mSmmAccess.NumberRegions * sizeof(EFI_SMRAM_DESCRIPTOR);
NecessaryBufferSize = mSmmAccess.NumberRegions * sizeof (EFI_SMRAM_DESCRIPTOR);
if (*SmramMapSize < NecessaryBufferSize) {
Status = EFI_BUFFER_TOO_SMALL;
} else {
CopyMem(SmramMap, mSmmAccess.SmramDesc, NecessaryBufferSize);
CopyMem (SmramMap, mSmmAccess.SmramDesc, NecessaryBufferSize);
Status = EFI_SUCCESS;
}
@ -197,8 +197,8 @@ GetCapabilities (
EFI_STATUS
EFIAPI
SmmAccessEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
@ -215,33 +215,39 @@ SmmAccessEntryPoint (
DEBUG ((DEBUG_INFO, "SMRAM HOB NOT found\n"));
return EFI_NOT_FOUND;
}
SmramHob = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *) GET_GUID_HOB_DATA(GuidHob);
SmmRegionNum = SmramHob->NumberOfSmmReservedRegions;
SmramHob = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)GET_GUID_HOB_DATA (GuidHob);
SmmRegionNum = SmramHob->NumberOfSmmReservedRegions;
mSmmAccess.SmramDesc = AllocateZeroPool (sizeof (EFI_SMRAM_DESCRIPTOR) * SmmRegionNum);
if (mSmmAccess.SmramDesc == NULL) {
return EFI_OUT_OF_RESOURCES;
}
CopyMem (mSmmAccess.SmramDesc, &SmramHob->Descriptor, sizeof (EFI_SMRAM_DESCRIPTOR) * SmmRegionNum);
DEBUG ((DEBUG_INFO, "NumberOfSmmReservedRegions = 0x%x\n", SmmRegionNum));
for (Index = 0; Index < SmmRegionNum; Index++) {
DEBUG ((DEBUG_INFO, "%d: base=0x%x, size = 0x%x, State=0x%x\n",Index,
SmramHob->Descriptor[Index].PhysicalStart,
SmramHob->Descriptor[Index].PhysicalSize,
SmramHob->Descriptor[Index].RegionState));
mSmmAccess.SmramDesc[Index].RegionState &= EFI_ALLOCATED;
mSmmAccess.SmramDesc[Index].RegionState |= EFI_SMRAM_CLOSED | EFI_CACHEABLE;
DEBUG ((
DEBUG_INFO,
"%d: base=0x%x, size = 0x%x, State=0x%x\n",
Index,
SmramHob->Descriptor[Index].PhysicalStart,
SmramHob->Descriptor[Index].PhysicalSize,
SmramHob->Descriptor[Index].RegionState
));
mSmmAccess.SmramDesc[Index].RegionState &= EFI_ALLOCATED;
mSmmAccess.SmramDesc[Index].RegionState |= EFI_SMRAM_CLOSED | EFI_CACHEABLE;
}
mSmmAccess.Signature = SMM_ACCESS_PRIVATE_DATA_SIGNATURE;
mSmmAccess.NumberRegions = SmmRegionNum;
mSmmAccess.SmmAccess.Open = Open;
mSmmAccess.SmmAccess.Close = Close;
mSmmAccess.SmmAccess.Lock = Lock;
mSmmAccess.SmmAccess.GetCapabilities = GetCapabilities;
mSmmAccess.SmmAccess.LockState = FALSE;
mSmmAccess.SmmAccess.OpenState = FALSE;
mSmmAccess.SmmRegionState = EFI_SMRAM_CLOSED;
mSmmAccess.Signature = SMM_ACCESS_PRIVATE_DATA_SIGNATURE;
mSmmAccess.NumberRegions = SmmRegionNum;
mSmmAccess.SmmAccess.Open = Open;
mSmmAccess.SmmAccess.Close = Close;
mSmmAccess.SmmAccess.Lock = Lock;
mSmmAccess.SmmAccess.GetCapabilities = GetCapabilities;
mSmmAccess.SmmAccess.LockState = FALSE;
mSmmAccess.SmmAccess.OpenState = FALSE;
mSmmAccess.SmmRegionState = EFI_SMRAM_CLOSED;
Status = gBS->InstallMultipleProtocolInterfaces (
&mSmmAccess.Handle,

13
UefiPayloadPkg/SmmAccessDxe/SmmAccessDxe.h
View File

@ -19,19 +19,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/BaseMemoryLib.h>
#include <Guid/SmramMemoryReserve.h>
#define SMM_ACCESS_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('S', 'M', 'M', 'A')
typedef struct {
UINTN Signature;
EFI_HANDLE Handle;
EFI_SMM_ACCESS2_PROTOCOL SmmAccess;
UINTN Signature;
EFI_HANDLE Handle;
EFI_SMM_ACCESS2_PROTOCOL SmmAccess;
//
// Local Data for SMM Access interface goes here
//
UINT32 SmmRegionState;
UINT32 NumberRegions;
EFI_SMRAM_DESCRIPTOR *SmramDesc;
UINT32 SmmRegionState;
UINT32 NumberRegions;
EFI_SMRAM_DESCRIPTOR *SmramDesc;
} SMM_ACCESS_PRIVATE_DATA;
#endif

78
UefiPayloadPkg/SmmControlRuntimeDxe/SmmControlRuntimeDxe.c
View File

@ -16,16 +16,16 @@
#include <Library/BaseMemoryLib.h>
#include <Guid/SmmRegisterInfoGuid.h>
#define SMM_DATA_PORT 0xB3
#define SMM_CONTROL_PORT 0xB2
#define SMM_DATA_PORT 0xB3
#define SMM_CONTROL_PORT 0xB2
typedef struct {
UINT8 GblBitOffset;
UINT8 ApmBitOffset;
UINT32 Address;
UINT8 GblBitOffset;
UINT8 ApmBitOffset;
UINT32 Address;
} SMM_CONTROL2_REG;
SMM_CONTROL2_REG mSmiCtrlReg;
SMM_CONTROL2_REG mSmiCtrlReg;
/**
Invokes SMI activation from either the preboot or runtime environment.
@ -48,15 +48,15 @@ SMM_CONTROL2_REG mSmiCtrlReg;
EFI_STATUS
EFIAPI
Activate (
IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,
IN OUT UINT8 *CommandPort OPTIONAL,
IN OUT UINT8 *DataPort OPTIONAL,
IN BOOLEAN Periodic OPTIONAL,
IN EFI_SMM_PERIOD ActivationInterval OPTIONAL
IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,
IN OUT UINT8 *CommandPort OPTIONAL,
IN OUT UINT8 *DataPort OPTIONAL,
IN BOOLEAN Periodic OPTIONAL,
IN EFI_SMM_PERIOD ActivationInterval OPTIONAL
)
{
UINT32 SmiEn;
UINT32 SmiEnableBits;
UINT32 SmiEn;
UINT32 SmiEnableBits;
if (Periodic) {
return EFI_INVALID_PARAMETER;
@ -71,7 +71,7 @@ Activate (
IoWrite32 (mSmiCtrlReg.Address, SmiEn | SmiEnableBits);
}
IoWrite8 (SMM_DATA_PORT, DataPort == NULL ? 0 : *DataPort);
IoWrite8 (SMM_DATA_PORT, DataPort == NULL ? 0 : *DataPort);
IoWrite8 (SMM_CONTROL_PORT, CommandPort == NULL ? 0 : *CommandPort);
return EFI_SUCCESS;
}
@ -88,8 +88,8 @@ Activate (
EFI_STATUS
EFIAPI
Deactivate (
IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,
IN BOOLEAN Periodic
IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,
IN BOOLEAN Periodic
)
{
if (Periodic) {
@ -105,7 +105,7 @@ Deactivate (
///
/// SMM COntrol2 Protocol instance
///
EFI_SMM_CONTROL2_PROTOCOL mSmmControl2 = {
EFI_SMM_CONTROL2_PROTOCOL mSmmControl2 = {
Activate,
Deactivate,
0
@ -123,12 +123,12 @@ EFI_SMM_CONTROL2_PROTOCOL mSmmControl2 = {
**/
PLD_GENERIC_REGISTER *
GetSmmCtrlRegById (
IN PLD_SMM_REGISTERS *SmmRegister,
IN UINT32 Id
IN PLD_SMM_REGISTERS *SmmRegister,
IN UINT32 Id
)
{
UINT32 Index;
PLD_GENERIC_REGISTER *PldReg;
UINT32 Index;
PLD_GENERIC_REGISTER *PldReg;
PldReg = NULL;
for (Index = 0; Index < SmmRegister->Count; Index++) {
@ -150,19 +150,20 @@ GetSmmCtrlRegById (
(PldReg->Address.Address == 0) ||
(PldReg->Address.RegisterBitWidth != 1) ||
(PldReg->Address.AddressSpaceId != EFI_ACPI_3_0_SYSTEM_IO) ||
(PldReg->Value != 1)) {
(PldReg->Value != 1))
{
DEBUG ((DEBUG_INFO, "Unexpected SMM register.\n"));
DEBUG ((DEBUG_INFO, "AddressSpaceId= 0x%x\n", PldReg->Address.AddressSpaceId));
DEBUG ((DEBUG_INFO, "RegBitWidth = 0x%x\n", PldReg->Address.RegisterBitWidth));
DEBUG ((DEBUG_INFO, "RegBitOffset = 0x%x\n", PldReg->Address.RegisterBitOffset));
DEBUG ((DEBUG_INFO, "AccessSize = 0x%x\n", PldReg->Address.AccessSize));
DEBUG ((DEBUG_INFO, "Address = 0x%lx\n",PldReg->Address.Address ));
DEBUG ((DEBUG_INFO, "Address = 0x%lx\n", PldReg->Address.Address));
return NULL;
}
return PldReg;
}
/**
Fixup data pointers so that the services can be called in virtual mode.
@ -173,15 +174,14 @@ GetSmmCtrlRegById (
VOID
EFIAPI
SmmControlVirtualAddressChangeEvent (
IN EFI_EVENT Event,
IN VOID *Context
IN EFI_EVENT Event,
IN VOID *Context
)
{
EfiConvertPointer (0x0, (VOID **) &(mSmmControl2.Trigger));
EfiConvertPointer (0x0, (VOID **) &(mSmmControl2.Clear));
EfiConvertPointer (0x0, (VOID **)&(mSmmControl2.Trigger));
EfiConvertPointer (0x0, (VOID **)&(mSmmControl2.Clear));
}
/**
This function installs EFI_SMM_CONTROL2_PROTOCOL.
@ -195,28 +195,29 @@ SmmControlVirtualAddressChangeEvent (
EFI_STATUS
EFIAPI
SmmControlEntryPoint (
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
IN EFI_HANDLE ImageHandle,
IN EFI_SYSTEM_TABLE *SystemTable
)
{
EFI_STATUS Status;
EFI_HOB_GUID_TYPE *GuidHob;
PLD_SMM_REGISTERS *SmmRegister;
PLD_GENERIC_REGISTER *SmiGblEnReg;
PLD_GENERIC_REGISTER *SmiApmEnReg;
EFI_EVENT Event;
EFI_STATUS Status;
EFI_HOB_GUID_TYPE *GuidHob;
PLD_SMM_REGISTERS *SmmRegister;
PLD_GENERIC_REGISTER *SmiGblEnReg;
PLD_GENERIC_REGISTER *SmiApmEnReg;
EFI_EVENT Event;
GuidHob = GetFirstGuidHob (&gSmmRegisterInfoGuid);
if (GuidHob == NULL) {
return EFI_UNSUPPORTED;
}
SmmRegister = (PLD_SMM_REGISTERS *) (GET_GUID_HOB_DATA(GuidHob));
SmmRegister = (PLD_SMM_REGISTERS *)(GET_GUID_HOB_DATA (GuidHob));
SmiGblEnReg = GetSmmCtrlRegById (SmmRegister, REGISTER_ID_SMI_GBL_EN);
if (SmiGblEnReg == NULL) {
DEBUG ((DEBUG_ERROR, "SMI global enable reg not found.\n"));
return EFI_NOT_FOUND;
}
mSmiCtrlReg.Address = (UINT32)SmiGblEnReg->Address.Address;
mSmiCtrlReg.GblBitOffset = SmiGblEnReg->Address.RegisterBitOffset;
@ -231,6 +232,7 @@ SmmControlEntryPoint (
DEBUG ((DEBUG_ERROR, "APM:0x%x, GBL:0x%x\n", SmiApmEnReg->Address.Address, mSmiCtrlReg.Address));
return EFI_UNSUPPORTED;
}
mSmiCtrlReg.ApmBitOffset = SmiApmEnReg->Address.RegisterBitOffset;
//

135
UefiPayloadPkg/UefiPayloadEntry/AcpiTable.c
View File

@ -9,7 +9,6 @@
#include "UefiPayloadEntry.h"
/**
Find the board related info from ACPI table
@ -22,22 +21,22 @@
**/
RETURN_STATUS
ParseAcpiInfo (
IN UINT64 AcpiTableBase,
OUT ACPI_BOARD_INFO *AcpiBoardInfo
IN UINT64 AcpiTableBase,
OUT ACPI_BOARD_INFO *AcpiBoardInfo
)
{
EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;
EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
UINT32 *Entry32;
UINTN Entry32Num;
EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt;
EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
UINT64 *Entry64;
UINTN Entry64Num;
UINTN Idx;
UINT32 *Signature;
EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *MmCfgHdr;
EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *MmCfgBase;
EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;
EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
UINT32 *Entry32;
UINTN Entry32Num;
EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt;
EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
UINT64 *Entry64;
UINTN Entry64Num;
UINTN Idx;
UINT32 *Signature;
EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *MmCfgHdr;
EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *MmCfgBase;
Rsdp = (EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *)(UINTN)AcpiTableBase;
DEBUG ((DEBUG_INFO, "Rsdp at 0x%p\n", Rsdp));
@ -50,8 +49,8 @@ ParseAcpiInfo (
MmCfgHdr = NULL;
Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->RsdtAddress);
if (Rsdt != NULL) {
Entry32 = (UINT32 *)(Rsdt + 1);
Entry32Num = (Rsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
Entry32 = (UINT32 *)(Rsdt + 1);
Entry32Num = (Rsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
for (Idx = 0; Idx < Entry32Num; Idx++) {
Signature = (UINT32 *)(UINTN)Entry32[Idx];
if (*Signature == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
@ -73,10 +72,10 @@ ParseAcpiInfo (
//
// Search Xsdt Second
//
Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress);
Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress);
if (Xsdt != NULL) {
Entry64 = (UINT64 *)(Xsdt + 1);
Entry64Num = (Xsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 3;
Entry64 = (UINT64 *)(Xsdt + 1);
Entry64Num = (Xsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 3;
for (Idx = 0; Idx < Entry64Num; Idx++) {
Signature = (UINT32 *)(UINTN)Entry64[Idx];
if (*Signature == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
@ -109,68 +108,73 @@ Done:
AcpiBoardInfo->PmGpeEnBase = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
if (MmCfgHdr != NULL) {
MmCfgBase = (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *)((UINT8*) MmCfgHdr + sizeof (*MmCfgHdr));
MmCfgBase = (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *)((UINT8 *)MmCfgHdr + sizeof (*MmCfgHdr));
AcpiBoardInfo->PcieBaseAddress = MmCfgBase->BaseAddress;
AcpiBoardInfo->PcieBaseSize = (MmCfgBase->EndBusNumber + 1 - MmCfgBase->StartBusNumber) * 4096 * 32 * 8;
AcpiBoardInfo->PcieBaseSize = (MmCfgBase->EndBusNumber + 1 - MmCfgBase->StartBusNumber) * 4096 * 32 * 8;
} else {
AcpiBoardInfo->PcieBaseAddress = 0;
AcpiBoardInfo->PcieBaseSize = 0;
AcpiBoardInfo->PcieBaseSize = 0;
}
DEBUG ((DEBUG_INFO, "PmCtrl Reg 0x%lx\n", AcpiBoardInfo->PmCtrlRegBase));
DEBUG ((DEBUG_INFO, "PmTimer Reg 0x%lx\n", AcpiBoardInfo->PmTimerRegBase));
DEBUG ((DEBUG_INFO, "Reset Reg 0x%lx\n", AcpiBoardInfo->ResetRegAddress));
DEBUG ((DEBUG_INFO, "PmCtrl Reg 0x%lx\n", AcpiBoardInfo->PmCtrlRegBase));
DEBUG ((DEBUG_INFO, "PmTimer Reg 0x%lx\n", AcpiBoardInfo->PmTimerRegBase));
DEBUG ((DEBUG_INFO, "Reset Reg 0x%lx\n", AcpiBoardInfo->ResetRegAddress));
DEBUG ((DEBUG_INFO, "Reset Value 0x%x\n", AcpiBoardInfo->ResetValue));
DEBUG ((DEBUG_INFO, "PmEvt Reg 0x%lx\n", AcpiBoardInfo->PmEvtBase));
DEBUG ((DEBUG_INFO, "PmGpeEn Reg 0x%lx\n", AcpiBoardInfo->PmGpeEnBase));
DEBUG ((DEBUG_INFO, "PmEvt Reg 0x%lx\n", AcpiBoardInfo->PmEvtBase));
DEBUG ((DEBUG_INFO, "PmGpeEn Reg 0x%lx\n", AcpiBoardInfo->PmGpeEnBase));
DEBUG ((DEBUG_INFO, "PcieBaseAddr 0x%lx\n", AcpiBoardInfo->PcieBaseAddress));
DEBUG ((DEBUG_INFO, "PcieBaseSize 0x%lx\n", AcpiBoardInfo->PcieBaseSize));
//
// Verify values for proper operation
//
ASSERT(Fadt->Pm1aCntBlk != 0);
ASSERT(Fadt->PmTmrBlk != 0);
ASSERT(Fadt->ResetReg.Address != 0);
ASSERT(Fadt->Pm1aEvtBlk != 0);
ASSERT(Fadt->Gpe0Blk != 0);
ASSERT (Fadt->Pm1aCntBlk != 0);
ASSERT (Fadt->PmTmrBlk != 0);
ASSERT (Fadt->ResetReg.Address != 0);
ASSERT (Fadt->Pm1aEvtBlk != 0);
ASSERT (Fadt->Gpe0Blk != 0);
DEBUG_CODE_BEGIN ();
BOOLEAN SciEnabled;
BOOLEAN SciEnabled;
//
// Check the consistency of SCI enabling
//
//
// Check the consistency of SCI enabling
//
//
// Get SCI_EN value
//
if (Fadt->Pm1CntLen == 4) {
SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0) ? TRUE : FALSE;
} else {
//
// Get SCI_EN value
// if (Pm1CntLen == 2), use 16 bit IO read;
// if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback
//
if (Fadt->Pm1CntLen == 4) {
SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
} else {
//
// if (Pm1CntLen == 2), use 16 bit IO read;
// if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback
//
SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
}
SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0) ? TRUE : FALSE;
}
if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&
(Fadt->SmiCmd == 0) &&
!SciEnabled)
{
//
// The ACPI enabling status is inconsistent: SCI is not enabled but ACPI
// table does not provide a means to enable it through FADT->SmiCmd
//
DEBUG ((
DEBUG_ERROR,
"ERROR: The ACPI enabling status is inconsistent: SCI is not"
" enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."
" This may cause issues in OS.\n"
));
}
if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&
(Fadt->SmiCmd == 0) &&
!SciEnabled) {
//
// The ACPI enabling status is inconsistent: SCI is not enabled but ACPI
// table does not provide a means to enable it through FADT->SmiCmd
//
DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is inconsistent: SCI is not"
" enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."
" This may cause issues in OS.\n"));
}
DEBUG_CODE_END ();
return RETURN_SUCCESS;
}
/**
Build ACPI board info HOB using infomation from ACPI table
@ -180,15 +184,15 @@ Done:
**/
ACPI_BOARD_INFO *
BuildHobFromAcpi (
IN UINT64 AcpiTableBase
IN UINT64 AcpiTableBase
)
{
EFI_STATUS Status;
ACPI_BOARD_INFO AcpiBoardInfo;
ACPI_BOARD_INFO *NewAcpiBoardInfo;
EFI_STATUS Status;
ACPI_BOARD_INFO AcpiBoardInfo;
ACPI_BOARD_INFO *NewAcpiBoardInfo;
NewAcpiBoardInfo = NULL;
Status = ParseAcpiInfo (AcpiTableBase, &AcpiBoardInfo);
Status = ParseAcpiInfo (AcpiTableBase, &AcpiBoardInfo);
ASSERT_EFI_ERROR (Status);
if (!EFI_ERROR (Status)) {
NewAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));
@ -196,7 +200,6 @@ BuildHobFromAcpi (
CopyMem (NewAcpiBoardInfo, &AcpiBoardInfo, sizeof (ACPI_BOARD_INFO));
DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n"));
}
return NewAcpiBoardInfo;
}

182
UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFunc.c
View File

@ -18,44 +18,62 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "VirtualMemory.h"
#include "UefiPayloadEntry.h"
#define STACK_SIZE 0x20000
#define IDT_ENTRY_COUNT 32
#define STACK_SIZE 0x20000
#define IDT_ENTRY_COUNT 32
typedef struct _X64_IDT_TABLE {
//
// Reserved 4 bytes preceding PeiService and IdtTable,
// since IDT base address should be 8-byte alignment.
//
UINT32 Reserved;
CONST EFI_PEI_SERVICES **PeiService;
X64_IDT_GATE_DESCRIPTOR IdtTable[IDT_ENTRY_COUNT];
UINT32 Reserved;
CONST EFI_PEI_SERVICES **PeiService;
X64_IDT_GATE_DESCRIPTOR IdtTable[IDT_ENTRY_COUNT];
} X64_IDT_TABLE;
//
// Global Descriptor Table (GDT)
//
GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {
/* selector { Global Segment Descriptor } */
/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor
/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor
/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor
/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor
/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor
/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {
/* selector { Global Segment Descriptor } */
/* 0x00 */ {
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}, // null descriptor
/* 0x08 */ {
{ 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // linear data segment descriptor
/* 0x10 */ {
{ 0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // linear code segment descriptor
/* 0x18 */ {
{ 0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // system data segment descriptor
/* 0x20 */ {
{ 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // system code segment descriptor
/* 0x28 */ {
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}, // spare segment descriptor
/* 0x30 */ {
{ 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 }
}, // system data segment descriptor
/* 0x38 */ {
{ 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0 }
}, // system code segment descriptor
/* 0x40 */ {
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
}, // spare segment descriptor
};
//
// IA32 Gdt register
//
GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {
GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {
sizeof (gGdtEntries) - 1,
(UINTN) gGdtEntries
};
(UINTN)gGdtEntries
};
GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {
GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {
sizeof (X64_IDT_GATE_DESCRIPTOR) * IDT_ENTRY_COUNT - 1,
0
};
@ -72,21 +90,21 @@ GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {
**/
UINTN
Create4GPageTablesIa32Pae (
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize
)
{
UINT8 PhysicalAddressBits;
EFI_PHYSICAL_ADDRESS PhysicalAddress;
UINTN IndexOfPdpEntries;
UINTN IndexOfPageDirectoryEntries;
UINT32 NumberOfPdpEntriesNeeded;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINTN TotalPagesNum;
UINTN PageAddress;
UINT64 AddressEncMask;
UINT8 PhysicalAddressBits;
EFI_PHYSICAL_ADDRESS PhysicalAddress;
UINTN IndexOfPdpEntries;
UINTN IndexOfPageDirectoryEntries;
UINT32 NumberOfPdpEntriesNeeded;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINTN TotalPagesNum;
UINTN PageAddress;
UINT64 AddressEncMask;
//
// Make sure AddressEncMask is contained to smallest supported address field
@ -98,53 +116,54 @@ Create4GPageTablesIa32Pae (
//
// Calculate the table entries needed.
//
NumberOfPdpEntriesNeeded = (UINT32) LShiftU64 (1, (PhysicalAddressBits - 30));
NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));
TotalPagesNum = NumberOfPdpEntriesNeeded + 1;
PageAddress = (UINTN) AllocatePageTableMemory (TotalPagesNum);
PageAddress = (UINTN)AllocatePageTableMemory (TotalPagesNum);
ASSERT (PageAddress != 0);
PageMap = (VOID *) PageAddress;
PageMap = (VOID *)PageAddress;
PageAddress += SIZE_4KB;
PageDirectoryPointerEntry = PageMap;
PhysicalAddress = 0;
PhysicalAddress = 0;
for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
//
// Each Directory Pointer entries points to a page of Page Directory entires.
// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
//
PageDirectoryEntry = (VOID *) PageAddress;
PageAddress += SIZE_4KB;
PageDirectoryEntry = (VOID *)PageAddress;
PageAddress += SIZE_4KB;
//
// Fill in a Page Directory Pointer Entries
//
PageDirectoryPointerEntry->Uint64 = (UINT64) (UINTN) PageDirectoryEntry | AddressEncMask;
PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
PageDirectoryPointerEntry->Bits.Present = 1;
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress += SIZE_2MB) {
if ((IsNullDetectionEnabled () && PhysicalAddress == 0)
|| ((PhysicalAddress < StackBase + StackSize)
&& ((PhysicalAddress + SIZE_2MB) > StackBase))) {
if ( (IsNullDetectionEnabled () && (PhysicalAddress == 0))
|| ( (PhysicalAddress < StackBase + StackSize)
&& ((PhysicalAddress + SIZE_2MB) > StackBase)))
{
//
// Need to split this 2M page that covers stack range.
//
Split2MPageTo4K (PhysicalAddress, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, 0, 0);
Split2MPageTo4K (PhysicalAddress, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, 0, 0);
} else {
//
// Fill in the Page Directory entries
//
PageDirectoryEntry->Uint64 = (UINT64) PhysicalAddress | AddressEncMask;
PageDirectoryEntry->Uint64 = (UINT64)PhysicalAddress | AddressEncMask;
PageDirectoryEntry->Bits.ReadWrite = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
}
}
}
for (; IndexOfPdpEntries < 512; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
for ( ; IndexOfPdpEntries < 512; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
ZeroMem (
PageDirectoryPointerEntry,
sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)
@ -157,7 +176,7 @@ Create4GPageTablesIa32Pae (
//
EnablePageTableProtection ((UINTN)PageMap, FALSE);
return (UINTN) PageMap;
return (UINTN)PageMap;
}
/**
@ -172,9 +191,9 @@ IsIa32PaeSupport (
VOID
)
{
UINT32 RegEax;
UINT32 RegEdx;
BOOLEAN Ia32PaeSupport;
UINT32 RegEax;
UINT32 RegEdx;
BOOLEAN Ia32PaeSupport;
Ia32PaeSupport = FALSE;
AsmCpuid (0x0, &RegEax, NULL, NULL, NULL);
@ -235,19 +254,19 @@ ToBuildPageTable (
**/
VOID
HandOffToDxeCore (
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
)
{
EFI_PHYSICAL_ADDRESS BaseOfStack;
EFI_PHYSICAL_ADDRESS TopOfStack;
UINTN PageTables;
X64_IDT_GATE_DESCRIPTOR *IdtTable;
UINTN SizeOfTemplate;
VOID *TemplateBase;
EFI_PHYSICAL_ADDRESS VectorAddress;
UINT32 Index;
X64_IDT_TABLE *IdtTableForX64;
EFI_PHYSICAL_ADDRESS BaseOfStack;
EFI_PHYSICAL_ADDRESS TopOfStack;
UINTN PageTables;
X64_IDT_GATE_DESCRIPTOR *IdtTable;
UINTN SizeOfTemplate;
VOID *TemplateBase;
EFI_PHYSICAL_ADDRESS VectorAddress;
UINT32 Index;
X64_IDT_TABLE *IdtTableForX64;
//
// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
@ -257,10 +276,10 @@ HandOffToDxeCore (
BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);
}
BaseOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
BaseOfStack = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
ASSERT (BaseOfStack != 0);
if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
//
// Compute the top of the stack we were allocated, which is used to load X64 dxe core.
// Pre-allocate a 32 bytes which confroms to x64 calling convention.
@ -275,7 +294,7 @@ HandOffToDxeCore (
//
// x64 Calling Conventions requires that the stack must be aligned to 16 bytes
//
TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);
TopOfStack = (EFI_PHYSICAL_ADDRESS)(UINTN)ALIGN_POINTER (TopOfStack, 16);
//
// Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA
@ -301,36 +320,35 @@ HandOffToDxeCore (
SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);
VectorAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) AllocatePages (EFI_SIZE_TO_PAGES(sizeof (X64_IDT_TABLE) + SizeOfTemplate * IDT_ENTRY_COUNT));
VectorAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (sizeof (X64_IDT_TABLE) + SizeOfTemplate * IDT_ENTRY_COUNT));
ASSERT (VectorAddress != 0);
//
// Store EFI_PEI_SERVICES** in the 4 bytes immediately preceding IDT to avoid that
// it may not be gotten correctly after IDT register is re-written.
//
IdtTableForX64 = (X64_IDT_TABLE *) (UINTN) VectorAddress;
IdtTableForX64 = (X64_IDT_TABLE *)(UINTN)VectorAddress;
IdtTableForX64->PeiService = NULL;
VectorAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) (IdtTableForX64 + 1);
VectorAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)(IdtTableForX64 + 1);
IdtTable = IdtTableForX64->IdtTable;
for (Index = 0; Index < IDT_ENTRY_COUNT; Index++) {
IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;
IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;
IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;
IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;
IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;
IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;
IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16) VectorAddress;
IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16) (RShiftU64 (VectorAddress, 16));
IdtTable[Index].Offset32To63 = (UINT32) (RShiftU64 (VectorAddress, 32));
IdtTable[Index].Reserved = 0;
IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16)VectorAddress;
IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16)(RShiftU64 (VectorAddress, 16));
IdtTable[Index].Offset32To63 = (UINT32)(RShiftU64 (VectorAddress, 32));
IdtTable[Index].Reserved = 0;
CopyMem ((VOID *) (UINTN) VectorAddress, TemplateBase, SizeOfTemplate);
AsmVectorFixup ((VOID *) (UINTN) VectorAddress, (UINT8) Index);
CopyMem ((VOID *)(UINTN)VectorAddress, TemplateBase, SizeOfTemplate);
AsmVectorFixup ((VOID *)(UINTN)VectorAddress, (UINT8)Index);
VectorAddress += SizeOfTemplate;
}
gLidtDescriptor.Base = (UINTN) IdtTable;
gLidtDescriptor.Base = (UINTN)IdtTable;
AsmWriteIdtr (&gLidtDescriptor);
@ -358,8 +376,6 @@ HandOffToDxeCore (
// 32bit UEFI payload could be supported if required later.
DEBUG ((DEBUG_ERROR, "NOT support 32bit UEFI payload\n"));
ASSERT (FALSE);
CpuDeadLoop();
CpuDeadLoop ();
}
}

94
UefiPayloadPkg/UefiPayloadEntry/LoadDxeCore.c
View File

@ -15,13 +15,13 @@
@return Allocated memory.
**/
VOID*
VOID *
AllocateCodePages (
IN UINTN Pages
IN UINTN Pages
)
{
VOID *Alloc;
EFI_PEI_HOB_POINTERS Hob;
VOID *Alloc;
EFI_PEI_HOB_POINTERS Hob;
Alloc = AllocatePages (Pages);
if (Alloc == NULL) {
@ -35,6 +35,7 @@ AllocateCodePages (
Hob.MemoryAllocation->AllocDescriptor.MemoryType = EfiBootServicesCode;
return Alloc;
}
Hob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION, GET_NEXT_HOB (Hob));
}
@ -44,7 +45,6 @@ AllocateCodePages (
return NULL;
}
/**
Loads and relocates a PE/COFF image
@ -58,15 +58,15 @@ AllocateCodePages (
**/
EFI_STATUS
LoadPeCoffImage (
IN VOID *PeCoffImage,
OUT EFI_PHYSICAL_ADDRESS *ImageAddress,
OUT UINT64 *ImageSize,
OUT EFI_PHYSICAL_ADDRESS *EntryPoint
IN VOID *PeCoffImage,
OUT EFI_PHYSICAL_ADDRESS *ImageAddress,
OUT UINT64 *ImageSize,
OUT EFI_PHYSICAL_ADDRESS *EntryPoint
)
{
RETURN_STATUS Status;
PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
VOID *Buffer;
RETURN_STATUS Status;
PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
VOID *Buffer;
ZeroMem (&ImageContext, sizeof (ImageContext));
@ -82,10 +82,11 @@ LoadPeCoffImage (
//
// Allocate Memory for the image
//
Buffer = AllocateCodePages (EFI_SIZE_TO_PAGES((UINT32)ImageContext.ImageSize));
Buffer = AllocateCodePages (EFI_SIZE_TO_PAGES ((UINT32)ImageContext.ImageSize));
if (Buffer == NULL) {
return EFI_OUT_OF_RESOURCES;
}
ImageContext.ImageAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Buffer;
//
@ -134,13 +135,13 @@ FvFindFileByTypeGuid (
OUT EFI_FFS_FILE_HEADER **FileHeader
)
{
EFI_PHYSICAL_ADDRESS CurrentAddress;
EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume;
EFI_FFS_FILE_HEADER *File;
UINT32 Size;
EFI_PHYSICAL_ADDRESS EndOfFile;
EFI_PHYSICAL_ADDRESS CurrentAddress;
EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume;
EFI_FFS_FILE_HEADER *File;
UINT32 Size;
EFI_PHYSICAL_ADDRESS EndOfFile;
CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) FvHeader;
CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)FvHeader;
EndOfFirmwareVolume = CurrentAddress + FvHeader->FvLength;
//
@ -152,7 +153,7 @@ FvFindFileByTypeGuid (
break;
}
File = (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress;
File = (EFI_FFS_FILE_HEADER *)(UINTN)CurrentAddress;
if (IS_FFS_FILE2 (File)) {
Size = FFS_FILE2_SIZE (File);
if (Size <= 0x00FFFFFF) {
@ -174,7 +175,7 @@ FvFindFileByTypeGuid (
// Look for file type
//
if (File->Type == FileType) {
if (Guid == NULL || CompareGuid(&File->Name, Guid)) {
if ((Guid == NULL) || CompareGuid (&File->Name, Guid)) {
*FileHeader = File;
return EFI_SUCCESS;
}
@ -184,7 +185,6 @@ FvFindFileByTypeGuid (
return EFI_NOT_FOUND;
}
/**
This function searchs a given section type within a valid FFS file.
@ -199,32 +199,34 @@ FvFindFileByTypeGuid (
**/
EFI_STATUS
FileFindSection (
IN EFI_FFS_FILE_HEADER *FileHeader,
IN EFI_SECTION_TYPE SectionType,
OUT VOID **SectionData
IN EFI_FFS_FILE_HEADER *FileHeader,
IN EFI_SECTION_TYPE SectionType,
OUT VOID **SectionData
)
{
UINT32 FileSize;
EFI_COMMON_SECTION_HEADER *Section;
UINT32 SectionSize;
UINT32 Index;
UINT32 FileSize;
EFI_COMMON_SECTION_HEADER *Section;
UINT32 SectionSize;
UINT32 Index;
if (IS_FFS_FILE2 (FileHeader)) {
FileSize = FFS_FILE2_SIZE (FileHeader);
} else {
FileSize = FFS_FILE_SIZE (FileHeader);
}
FileSize -= sizeof (EFI_FFS_FILE_HEADER);
Section = (EFI_COMMON_SECTION_HEADER *)(FileHeader + 1);
Index = 0;
FileSize -= sizeof (EFI_FFS_FILE_HEADER);
Section = (EFI_COMMON_SECTION_HEADER *)(FileHeader + 1);
Index = 0;
while (Index < FileSize) {
if (Section->Type == SectionType) {
if (IS_SECTION2 (Section)) {
*SectionData = (VOID *)((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));
*SectionData = (VOID *)((UINT8 *)Section + sizeof (EFI_COMMON_SECTION_HEADER2));
} else {
*SectionData = (VOID *)((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));
*SectionData = (VOID *)((UINT8 *)Section + sizeof (EFI_COMMON_SECTION_HEADER));
}
return EFI_SUCCESS;
}
@ -244,7 +246,6 @@ FileFindSection (
return EFI_NOT_FOUND;
}
/**
Find DXE core from FV and build DXE core HOBs.
@ -255,7 +256,7 @@ FileFindSection (
**/
EFI_STATUS
LoadDxeCore (
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
)
{
EFI_STATUS Status;
@ -275,6 +276,7 @@ LoadDxeCore (
if (EFI_ERROR (Status)) {
return Status;
}
Status = FileFindSection (FileHeader, EFI_SECTION_FIRMWARE_VOLUME_IMAGE, (VOID **)&DxeCoreFv);
if (EFI_ERROR (Status)) {
return Status;
@ -283,7 +285,7 @@ LoadDxeCore (
//
// Report DXE FV to DXE core
//
BuildFvHob ((EFI_PHYSICAL_ADDRESS) (UINTN) DxeCoreFv, DxeCoreFv->FvLength);
BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN)DxeCoreFv, DxeCoreFv->FvLength);
//
// Find DXE core file from DXE FV
@ -306,7 +308,7 @@ LoadDxeCore (
return Status;
}
BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32) ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);
BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32)ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);
return EFI_SUCCESS;
}
@ -322,15 +324,15 @@ LoadDxeCore (
**/
EFI_STATUS
UniversalLoadDxeCore (
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
)
{
EFI_STATUS Status;
EFI_FFS_FILE_HEADER *FileHeader;
VOID *PeCoffImage;
EFI_PHYSICAL_ADDRESS ImageAddress;
UINT64 ImageSize;
EFI_STATUS Status;
EFI_FFS_FILE_HEADER *FileHeader;
VOID *PeCoffImage;
EFI_PHYSICAL_ADDRESS ImageAddress;
UINT64 ImageSize;
//
// Find DXE core file from DXE FV
@ -353,7 +355,7 @@ UniversalLoadDxeCore (
return Status;
}
BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32) ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);
BuildModuleHob (&FileHeader->Name, ImageAddress, EFI_SIZE_TO_PAGES ((UINT32)ImageSize) * EFI_PAGE_SIZE, *DxeCoreEntryPoint);
return EFI_SUCCESS;
}

25
UefiPayloadPkg/UefiPayloadEntry/MemoryAllocation.c
View File

@ -25,12 +25,12 @@
VOID *
EFIAPI
AllocatePages (
IN UINTN Pages
IN UINTN Pages
)
{
EFI_PEI_HOB_POINTERS Hob;
EFI_PHYSICAL_ADDRESS Offset;
EFI_HOB_HANDOFF_INFO_TABLE *HobTable;
EFI_PEI_HOB_POINTERS Hob;
EFI_PHYSICAL_ADDRESS Offset;
EFI_HOB_HANDOFF_INFO_TABLE *HobTable;
Hob.Raw = GetHobList ();
HobTable = Hob.HandoffInformationTable;
@ -102,12 +102,12 @@ FreePages (
VOID *
EFIAPI
AllocateAlignedPages (
IN UINTN Pages,
IN UINTN Alignment
IN UINTN Pages,
IN UINTN Alignment
)
{
VOID *Memory;
UINTN AlignmentMask;
VOID *Memory;
UINTN AlignmentMask;
//
// Alignment must be a power of two or zero.
@ -134,10 +134,9 @@ AllocateAlignedPages (
AlignmentMask = Alignment - 1;
}
return (VOID *) (UINTN) (((UINTN) Memory + AlignmentMask) & ~AlignmentMask);
return (VOID *)(UINTN)(((UINTN)Memory + AlignmentMask) & ~AlignmentMask);
}
/**
Allocates a buffer of type EfiBootServicesData.
@ -156,7 +155,7 @@ AllocatePool (
IN UINTN AllocationSize
)
{
EFI_HOB_MEMORY_POOL *Hob;
EFI_HOB_MEMORY_POOL *Hob;
if (AllocationSize > 0x4000) {
// Please use AllocatePages for big allocations
@ -186,7 +185,7 @@ AllocateZeroPool (
IN UINTN AllocationSize
)
{
VOID *Buffer;
VOID *Buffer;
Buffer = AllocatePool (AllocationSize);
if (Buffer == NULL) {
@ -197,5 +196,3 @@ AllocateZeroPool (
return Buffer;
}

342
UefiPayloadPkg/UefiPayloadEntry/PrintHob.c
View File

@ -12,22 +12,22 @@
#include <Guid/AcpiBoardInfoGuid.h>
#include <Guid/BootManagerMenu.h>
#define ROW_LIMITER 16
#define ROW_LIMITER 16
typedef
EFI_STATUS
(*HOB_PRINT_HANDLER) (
IN VOID *Hob,
IN UINT16 HobLength
);
IN VOID *Hob,
IN UINT16 HobLength
);
typedef struct{
typedef struct {
UINT16 Type;
CHAR8 *Name;
HOB_PRINT_HANDLER PrintHandler;
} HOB_PRINT_HANDLER_TABLE;
CHAR8 * mMemoryTypeStr[] = {
CHAR8 *mMemoryTypeStr[] = {
"EfiReservedMemoryType",
"EfiLoaderCode",
"EfiLoaderData",
@ -46,23 +46,23 @@ CHAR8 * mMemoryTypeStr[] = {
"EfiMaxMemoryType"
};
CHAR8 * mResource_Type_List[] = {
"EFI_RESOURCE_SYSTEM_MEMORY ", //0x00000000
"EFI_RESOURCE_MEMORY_MAPPED_IO ", //0x00000001
"EFI_RESOURCE_IO ", //0x00000002
"EFI_RESOURCE_FIRMWARE_DEVICE ", //0x00000003
"EFI_RESOURCE_MEMORY_MAPPED_IO_PORT ", //0x00000004
"EFI_RESOURCE_MEMORY_RESERVED ", //0x00000005
"EFI_RESOURCE_IO_RESERVED ", //0x00000006
"EFI_RESOURCE_MAX_MEMORY_TYPE " //0x00000007
CHAR8 *mResource_Type_List[] = {
"EFI_RESOURCE_SYSTEM_MEMORY ", // 0x00000000
"EFI_RESOURCE_MEMORY_MAPPED_IO ", // 0x00000001
"EFI_RESOURCE_IO ", // 0x00000002
"EFI_RESOURCE_FIRMWARE_DEVICE ", // 0x00000003
"EFI_RESOURCE_MEMORY_MAPPED_IO_PORT ", // 0x00000004
"EFI_RESOURCE_MEMORY_RESERVED ", // 0x00000005
"EFI_RESOURCE_IO_RESERVED ", // 0x00000006
"EFI_RESOURCE_MAX_MEMORY_TYPE " // 0x00000007
};
typedef
EFI_STATUS
(*GUID_HOB_PRINT) (
IN UINT8 *HobRaw,
IN UINT16 HobLength
);
IN UINT8 *HobRaw,
IN UINT16 HobLength
);
typedef struct {
EFI_GUID *Guid;
@ -70,12 +70,11 @@ typedef struct {
CHAR8 *GuidName;
} GUID_HOB_PRINT_HANDLE;
typedef struct{
EFI_GUID *Guid;
CHAR8 *Type;
typedef struct {
EFI_GUID *Guid;
CHAR8 *Type;
} PRINT_MEMORY_ALLOCCATION_HOB;
/**
Print the Hex value of a given range.
@param[in] DataStart A pointer to the start of data to be printed.
@ -84,8 +83,8 @@ typedef struct{
**/
EFI_STATUS
PrintHex (
IN UINT8 *DataStart,
IN UINT16 DataSize
IN UINT8 *DataStart,
IN UINT16 DataSize
)
{
UINTN Index1;
@ -95,10 +94,11 @@ PrintHex (
StartAddr = DataStart;
for (Index1 = 0; Index1 * ROW_LIMITER < DataSize; Index1++) {
DEBUG ((DEBUG_VERBOSE, " 0x%04p:", (DataStart - StartAddr)));
for (Index2 = 0; (Index2 < ROW_LIMITER) && (Index1 * ROW_LIMITER + Index2 < DataSize); Index2++){
for (Index2 = 0; (Index2 < ROW_LIMITER) && (Index1 * ROW_LIMITER + Index2 < DataSize); Index2++) {
DEBUG ((DEBUG_VERBOSE, " %02x", *DataStart));
DataStart++;
}
DEBUG ((DEBUG_VERBOSE, "\n"));
}
@ -113,15 +113,16 @@ PrintHex (
@retval EFI_SUCCESS If it completed successfully.
**/
EFI_STATUS
PrintHandOffHob(
IN VOID *HobStart,
IN UINT16 HobLength
PrintHandOffHob (
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.HandoffInformationTable));
DEBUG ((DEBUG_INFO, " BootMode = 0x%x\n", Hob.HandoffInformationTable->BootMode));
DEBUG ((DEBUG_INFO, " BootMode = 0x%x\n", Hob.HandoffInformationTable->BootMode));
DEBUG ((DEBUG_INFO, " EfiMemoryTop = 0x%lx\n", Hob.HandoffInformationTable->EfiMemoryTop));
DEBUG ((DEBUG_INFO, " EfiMemoryBottom = 0x%lx\n", Hob.HandoffInformationTable->EfiMemoryBottom));
DEBUG ((DEBUG_INFO, " EfiFreeMemoryTop = 0x%lx\n", Hob.HandoffInformationTable->EfiFreeMemoryTop));
@ -138,15 +139,15 @@ PrintHandOffHob(
**/
EFI_STATUS
PrintMemoryAllocationHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
if(CompareGuid (&Hob.MemoryAllocation->AllocDescriptor.Name, &gEfiHobMemoryAllocStackGuid)) {
if (CompareGuid (&Hob.MemoryAllocation->AllocDescriptor.Name, &gEfiHobMemoryAllocStackGuid)) {
ASSERT (HobLength >= sizeof (*Hob.MemoryAllocationStack));
DEBUG ((DEBUG_INFO, " Type = EFI_HOB_MEMORY_ALLOCATION_STACK\n"));
} else if (CompareGuid (&Hob.MemoryAllocation->AllocDescriptor.Name, &gEfiHobMemoryAllocBspStoreGuid)) {
@ -161,9 +162,10 @@ PrintMemoryAllocationHob (
ASSERT (HobLength >= sizeof (*Hob.MemoryAllocation));
DEBUG ((DEBUG_INFO, " Type = EFI_HOB_TYPE_MEMORY_ALLOCATION\n"));
}
DEBUG ((DEBUG_INFO, " MemoryBaseAddress = 0x%lx\n", Hob.MemoryAllocationStack->AllocDescriptor.MemoryBaseAddress));
DEBUG ((DEBUG_INFO, " MemoryLength = 0x%lx\n", Hob.MemoryAllocationStack->AllocDescriptor.MemoryLength));
DEBUG ((DEBUG_INFO, " MemoryType = %a \n", mMemoryTypeStr[Hob.MemoryAllocationStack->AllocDescriptor.MemoryType]));
DEBUG ((DEBUG_INFO, " MemoryType = %a \n", mMemoryTypeStr[Hob.MemoryAllocationStack->AllocDescriptor.MemoryType]));
return EFI_SUCCESS;
}
@ -175,20 +177,21 @@ PrintMemoryAllocationHob (
**/
EFI_STATUS
PrintResourceDiscriptorHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.ResourceDescriptor));
DEBUG ((DEBUG_INFO, " ResourceType = %a\n", mResource_Type_List[Hob.ResourceDescriptor->ResourceType]));
if(!IsZeroGuid (&Hob.ResourceDescriptor->Owner)) {
if (!IsZeroGuid (&Hob.ResourceDescriptor->Owner)) {
DEBUG ((DEBUG_INFO, " Owner = %g\n", Hob.ResourceDescriptor->Owner));
}
DEBUG ((DEBUG_INFO, " ResourceAttribute = 0x%x\n", Hob.ResourceDescriptor->ResourceAttribute));
DEBUG ((DEBUG_INFO, " ResourceAttribute = 0x%x\n", Hob.ResourceDescriptor->ResourceAttribute));
DEBUG ((DEBUG_INFO, " PhysicalStart = 0x%lx\n", Hob.ResourceDescriptor->PhysicalStart));
DEBUG ((DEBUG_INFO, " ResourceLength = 0x%lx\n", Hob.ResourceDescriptor->ResourceLength));
return EFI_SUCCESS;
@ -204,16 +207,17 @@ PrintResourceDiscriptorHob (
**/
EFI_STATUS
PrintAcpiGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;
AcpiTableHob = (UNIVERSAL_PAYLOAD_ACPI_TABLE *) GET_GUID_HOB_DATA (HobRaw);
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;
AcpiTableHob = (UNIVERSAL_PAYLOAD_ACPI_TABLE *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= AcpiTableHob->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpiTableHob->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", AcpiTableHob->Header.Length));
DEBUG ((DEBUG_INFO, " Rsdp = 0x%p\n", (UINT64) AcpiTableHob->Rsdp));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpiTableHob->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", AcpiTableHob->Header.Length));
DEBUG ((DEBUG_INFO, " Rsdp = 0x%p\n", (UINT64)AcpiTableHob->Rsdp));
return EFI_SUCCESS;
}
@ -226,18 +230,19 @@ PrintAcpiGuidHob (
**/
EFI_STATUS
PrintSerialGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *SerialPortInfo;
SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *) GET_GUID_HOB_DATA (HobRaw);
UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *SerialPortInfo;
SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= SerialPortInfo->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SerialPortInfo->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SerialPortInfo->Header.Length));
DEBUG ((DEBUG_INFO, " UseMmio = 0x%x\n", SerialPortInfo->UseMmio));
DEBUG ((DEBUG_INFO, " RegisterStride = 0x%x\n", SerialPortInfo->RegisterStride));
DEBUG ((DEBUG_INFO, " BaudRate = %d\n", SerialPortInfo->BaudRate));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SerialPortInfo->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SerialPortInfo->Header.Length));
DEBUG ((DEBUG_INFO, " UseMmio = 0x%x\n", SerialPortInfo->UseMmio));
DEBUG ((DEBUG_INFO, " RegisterStride = 0x%x\n", SerialPortInfo->RegisterStride));
DEBUG ((DEBUG_INFO, " BaudRate = %d\n", SerialPortInfo->BaudRate));
DEBUG ((DEBUG_INFO, " RegisterBase = 0x%lx\n", SerialPortInfo->RegisterBase));
return EFI_SUCCESS;
}
@ -250,16 +255,17 @@ PrintSerialGuidHob (
**/
EFI_STATUS
PrintSmbios3GuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;
SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *) GET_GUID_HOB_DATA (HobRaw);
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;
SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= SmBiosTable->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));
DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64) SmBiosTable->SmBiosEntryPoint));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));
DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64)SmBiosTable->SmBiosEntryPoint));
return EFI_SUCCESS;
}
@ -272,16 +278,17 @@ PrintSmbios3GuidHob (
**/
EFI_STATUS
PrintSmbiosTablGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;
SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *) GET_GUID_HOB_DATA (HobRaw);
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTable;
SmBiosTable = (UNIVERSAL_PAYLOAD_SMBIOS_TABLE *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= SmBiosTable->Header.Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));
DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64) SmBiosTable->SmBiosEntryPoint));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", SmBiosTable->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", SmBiosTable->Header.Length));
DEBUG ((DEBUG_INFO, " SmBiosEntryPoint = 0x%lx\n", (UINT64)SmBiosTable->SmBiosEntryPoint));
return EFI_SUCCESS;
}
@ -294,16 +301,17 @@ PrintSmbiosTablGuidHob (
**/
EFI_STATUS
PrintAcpiBoardInfoGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
ACPI_BOARD_INFO *AcpBoardInfo;
AcpBoardInfo = (ACPI_BOARD_INFO *) GET_GUID_HOB_DATA (HobRaw);
ACPI_BOARD_INFO *AcpBoardInfo;
AcpBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= sizeof (*AcpBoardInfo));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpBoardInfo->Revision));
DEBUG ((DEBUG_INFO, " Reserved0 = 0x%x\n", AcpBoardInfo->Reserved0));
DEBUG ((DEBUG_INFO, " ResetValue = 0x%x\n", AcpBoardInfo->ResetValue));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", AcpBoardInfo->Revision));
DEBUG ((DEBUG_INFO, " Reserved0 = 0x%x\n", AcpBoardInfo->Reserved0));
DEBUG ((DEBUG_INFO, " ResetValue = 0x%x\n", AcpBoardInfo->ResetValue));
DEBUG ((DEBUG_INFO, " PmEvtBase = 0x%lx\n", AcpBoardInfo->PmEvtBase));
DEBUG ((DEBUG_INFO, " PmGpeEnBase = 0x%lx\n", AcpBoardInfo->PmGpeEnBase));
DEBUG ((DEBUG_INFO, " PmCtrlRegBase = 0x%lx\n", AcpBoardInfo->PmCtrlRegBase));
@ -323,29 +331,30 @@ PrintAcpiBoardInfoGuidHob (
**/
EFI_STATUS
PrintPciRootBridgeInfoGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridges;
UINTN Index;
UINTN Length;
Index = 0;
PciRootBridges = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *) GET_GUID_HOB_DATA (HobRaw);
Length = sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES) + PciRootBridges->Count * sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE);
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridges;
UINTN Index;
UINTN Length;
Index = 0;
PciRootBridges = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *)GET_GUID_HOB_DATA (HobRaw);
Length = sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES) + PciRootBridges->Count * sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE);
ASSERT (HobLength >= Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", PciRootBridges->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", PciRootBridges->Header.Length));
DEBUG ((DEBUG_INFO, " Count = 0x%x\n", PciRootBridges->Count));
DEBUG ((DEBUG_INFO, " ResourceAssigned = %a\n", (PciRootBridges->ResourceAssigned ? "True" : "False")));
DEBUG ((DEBUG_INFO, " ResourceAssigned = %a\n", (PciRootBridges->ResourceAssigned ? "True" : "False")));
while(Index < PciRootBridges->Count) {
while (Index < PciRootBridges->Count) {
DEBUG ((DEBUG_INFO, " Root Bridge Index[%d]:\n", Index));
DEBUG ((DEBUG_INFO, " Segment = 0x%x\n", PciRootBridges->RootBridge[Index].Segment));
DEBUG ((DEBUG_INFO, " Segment = 0x%x\n", PciRootBridges->RootBridge[Index].Segment));
DEBUG ((DEBUG_INFO, " Supports = 0x%lx\n", PciRootBridges->RootBridge[Index].Supports));
DEBUG ((DEBUG_INFO, " Attributes = 0x%lx\n", PciRootBridges->RootBridge[Index].Attributes));
DEBUG ((DEBUG_INFO, " DmaAbove4G = 0x%x\n", PciRootBridges->RootBridge[Index].DmaAbove4G));
DEBUG ((DEBUG_INFO, " NoExtendedConfigSpace = 0x%x\n", PciRootBridges->RootBridge[Index].NoExtendedConfigSpace));
DEBUG ((DEBUG_INFO, " DmaAbove4G = 0x%x\n", PciRootBridges->RootBridge[Index].DmaAbove4G));
DEBUG ((DEBUG_INFO, " NoExtendedConfigSpace = 0x%x\n", PciRootBridges->RootBridge[Index].NoExtendedConfigSpace));
DEBUG ((DEBUG_INFO, " AllocationAttributes = 0x%lx\n", PciRootBridges->RootBridge[Index].AllocationAttributes));
DEBUG ((DEBUG_INFO, " Bus.Base = 0x%lx\n", PciRootBridges->RootBridge[Index].Bus.Base));
DEBUG ((DEBUG_INFO, " Bus.Limit = 0x%lx\n", PciRootBridges->RootBridge[Index].Bus.Limit));
@ -365,8 +374,9 @@ PrintPciRootBridgeInfoGuidHob (
DEBUG ((DEBUG_INFO, " PMemAbove4G.Base = 0x%lx\n", PciRootBridges->RootBridge[Index].PMemAbove4G.Base));
DEBUG ((DEBUG_INFO, " PMemAbove4G.Limit = 0x%lx\n", PciRootBridges->RootBridge[Index].PMemAbove4G.Limit));
DEBUG ((DEBUG_INFO, " PMemAbove4G.Translation = 0x%lx\n", PciRootBridges->RootBridge[Index].PMemAbove4G.Translation));
Index+=1;
Index += 1;
}
return EFI_SUCCESS;
}
@ -379,28 +389,29 @@ PrintPciRootBridgeInfoGuidHob (
**/
EFI_STATUS
PrintExtraDataGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
UINTN Index;
UINTN Length;
UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
UINTN Index;
UINTN Length;
Index = 0;
ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *) GET_GUID_HOB_DATA (HobRaw);
Length = sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA) + ExtraData->Count * sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY);
ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *)GET_GUID_HOB_DATA (HobRaw);
Length = sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA) + ExtraData->Count * sizeof (UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY);
ASSERT (HobLength >= Length);
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", ExtraData->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", ExtraData->Header.Length));
DEBUG ((DEBUG_INFO, " Count = 0x%x\n", ExtraData->Count));
while (Index < ExtraData->Count) {
DEBUG ((DEBUG_INFO, " Id[%d] = %a\n", Index,ExtraData->Entry[Index].Identifier));
DEBUG ((DEBUG_INFO, " Base[%d] = 0x%lx\n", Index,ExtraData->Entry[Index].Base));
DEBUG ((DEBUG_INFO, " Size[%d] = 0x%lx\n", Index,ExtraData->Entry[Index].Size));
Index+=1;
DEBUG ((DEBUG_INFO, " Id[%d] = %a\n", Index, ExtraData->Entry[Index].Identifier));
DEBUG ((DEBUG_INFO, " Base[%d] = 0x%lx\n", Index, ExtraData->Entry[Index].Base));
DEBUG ((DEBUG_INFO, " Size[%d] = 0x%lx\n", Index, ExtraData->Entry[Index].Size));
Index += 1;
}
return EFI_SUCCESS;
}
@ -413,13 +424,13 @@ PrintExtraDataGuidHob (
**/
EFI_STATUS
PrintMemoryTypeInfoGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
EFI_MEMORY_TYPE_INFORMATION *MemoryTypeInfo;
EFI_MEMORY_TYPE_INFORMATION *MemoryTypeInfo;
MemoryTypeInfo = (EFI_MEMORY_TYPE_INFORMATION *) GET_GUID_HOB_DATA (HobRaw);
MemoryTypeInfo = (EFI_MEMORY_TYPE_INFORMATION *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= sizeof (*MemoryTypeInfo));
DEBUG ((DEBUG_INFO, " Type = 0x%x\n", MemoryTypeInfo->Type));
DEBUG ((DEBUG_INFO, " NumberOfPages = 0x%x\n", MemoryTypeInfo->NumberOfPages));
@ -434,17 +445,17 @@ PrintMemoryTypeInfoGuidHob (
**/
EFI_STATUS
PrintBootManagerMenuGuidHob (
IN UINT8 *HobRaw,
IN UINT16 HobLength
IN UINT8 *HobRaw,
IN UINT16 HobLength
)
{
UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *BootManagerMenuFile;
UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *BootManagerMenuFile;
BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *) GET_GUID_HOB_DATA (HobRaw);
BootManagerMenuFile = (UNIVERSAL_PAYLOAD_BOOT_MANAGER_MENU *)GET_GUID_HOB_DATA (HobRaw);
ASSERT (HobLength >= sizeof (*BootManagerMenuFile));
DEBUG ((DEBUG_INFO, " Revision = 0x%x\n", BootManagerMenuFile->Header.Revision));
DEBUG ((DEBUG_INFO, " Length = 0x%x\n", BootManagerMenuFile->Header.Length));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &BootManagerMenuFile->FileName));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &BootManagerMenuFile->FileName));
return EFI_SUCCESS;
}
@ -452,16 +463,16 @@ PrintBootManagerMenuGuidHob (
// Mappint table for dump Guid Hob information.
// This table can be easily extented.
//
GUID_HOB_PRINT_HANDLE GuidHobPrintHandleTable[] = {
{&gUniversalPayloadAcpiTableGuid, PrintAcpiGuidHob, "gUniversalPayloadAcpiTableGuid(ACPI table Guid)"},
{&gUniversalPayloadSerialPortInfoGuid, PrintSerialGuidHob, "gUniversalPayloadSerialPortInfoGuid(Serial Port Info)"},
{&gUniversalPayloadSmbios3TableGuid, PrintSmbios3GuidHob, "gUniversalPayloadSmbios3TableGuid(SmBios Guid)"},
{&gUniversalPayloadSmbiosTableGuid, PrintSmbiosTablGuidHob, "gUniversalPayloadSmbiosTableGuid(SmBios Guid)"},
{&gUefiAcpiBoardInfoGuid, PrintAcpiBoardInfoGuidHob, "gUefiAcpiBoardInfoGuid(Acpi Guid)"},
{&gUniversalPayloadPciRootBridgeInfoGuid, PrintPciRootBridgeInfoGuidHob, "gUniversalPayloadPciRootBridgeInfoGuid(Pci Guid)"},
{&gEfiMemoryTypeInformationGuid, PrintMemoryTypeInfoGuidHob, "gEfiMemoryTypeInformationGuid(Memory Type Information Guid)"},
{&gUniversalPayloadExtraDataGuid, PrintExtraDataGuidHob, "gUniversalPayloadExtraDataGuid(PayLoad Extra Data Guid)"},
{&gEdkiiBootManagerMenuFileGuid, PrintBootManagerMenuGuidHob, "gEdkiiBootManagerMenuFileGuid(Boot Manager Menu File Guid)"}
GUID_HOB_PRINT_HANDLE GuidHobPrintHandleTable[] = {
{ &gUniversalPayloadAcpiTableGuid, PrintAcpiGuidHob, "gUniversalPayloadAcpiTableGuid(ACPI table Guid)" },
{ &gUniversalPayloadSerialPortInfoGuid, PrintSerialGuidHob, "gUniversalPayloadSerialPortInfoGuid(Serial Port Info)" },
{ &gUniversalPayloadSmbios3TableGuid, PrintSmbios3GuidHob, "gUniversalPayloadSmbios3TableGuid(SmBios Guid)" },
{ &gUniversalPayloadSmbiosTableGuid, PrintSmbiosTablGuidHob, "gUniversalPayloadSmbiosTableGuid(SmBios Guid)" },
{ &gUefiAcpiBoardInfoGuid, PrintAcpiBoardInfoGuidHob, "gUefiAcpiBoardInfoGuid(Acpi Guid)" },
{ &gUniversalPayloadPciRootBridgeInfoGuid, PrintPciRootBridgeInfoGuidHob, "gUniversalPayloadPciRootBridgeInfoGuid(Pci Guid)" },
{ &gEfiMemoryTypeInformationGuid, PrintMemoryTypeInfoGuidHob, "gEfiMemoryTypeInformationGuid(Memory Type Information Guid)" },
{ &gUniversalPayloadExtraDataGuid, PrintExtraDataGuidHob, "gUniversalPayloadExtraDataGuid(PayLoad Extra Data Guid)" },
{ &gEdkiiBootManagerMenuFileGuid, PrintBootManagerMenuGuidHob, "gEdkiiBootManagerMenuFileGuid(Boot Manager Menu File Guid)" }
};
/**
@ -472,15 +483,15 @@ GUID_HOB_PRINT_HANDLE GuidHobPrintHandleTable[] = {
**/
EFI_STATUS
PrintGuidHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
UINTN Index;
EFI_STATUS Status;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (Hob.Guid));
for (Index = 0; Index < ARRAY_SIZE (GuidHobPrintHandleTable); Index++) {
@ -490,6 +501,7 @@ PrintGuidHob (
return Status;
}
}
DEBUG ((DEBUG_INFO, " Name = %g\n", &Hob.Guid->Name));
PrintHex (GET_GUID_HOB_DATA (Hob.Raw), GET_GUID_HOB_DATA_SIZE (Hob.Raw));
return EFI_SUCCESS;
@ -503,13 +515,13 @@ PrintGuidHob (
**/
EFI_STATUS
PrintFvHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.FirmwareVolume));
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.FirmwareVolume->BaseAddress));
@ -525,13 +537,13 @@ PrintFvHob (
**/
EFI_STATUS
PrintCpuHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.Cpu));
DEBUG ((DEBUG_INFO, " SizeOfMemorySpace = 0x%lx\n", Hob.Cpu->SizeOfMemorySpace));
@ -547,8 +559,8 @@ PrintCpuHob (
**/
EFI_STATUS
PrintMemoryPoolHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
return EFI_SUCCESS;
@ -562,19 +574,19 @@ PrintMemoryPoolHob (
**/
EFI_STATUS
PrintFv2Hob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.FirmwareVolume2));
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.FirmwareVolume2->BaseAddress));
DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.FirmwareVolume2->Length));
DEBUG ((DEBUG_INFO, " FvName = %g\n", &Hob.FirmwareVolume2->FvName));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume2->FileName));
DEBUG ((DEBUG_INFO, " FvName = %g\n", &Hob.FirmwareVolume2->FvName));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume2->FileName));
return EFI_SUCCESS;
}
@ -586,17 +598,17 @@ PrintFv2Hob (
**/
EFI_STATUS
PrintCapsuleHob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.Capsule));
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.Capsule->BaseAddress));
DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.Capsule->Length));
DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.Capsule->Length));
return EFI_SUCCESS;
}
@ -608,40 +620,40 @@ PrintCapsuleHob (
**/
EFI_STATUS
PrintFv3Hob (
IN VOID *HobStart,
IN UINT16 HobLength
IN VOID *HobStart,
IN UINT16 HobLength
)
{
EFI_PEI_HOB_POINTERS Hob;
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
ASSERT (HobLength >= sizeof (*Hob.FirmwareVolume3));
DEBUG ((DEBUG_INFO, " BaseAddress = 0x%lx\n", Hob.FirmwareVolume3->BaseAddress));
DEBUG ((DEBUG_INFO, " Length = 0x%lx\n", Hob.FirmwareVolume3->Length));
DEBUG ((DEBUG_INFO, " AuthenticationStatus = 0x%x\n", Hob.FirmwareVolume3->AuthenticationStatus));
DEBUG ((DEBUG_INFO, " ExtractedFv = %a\n", (Hob.FirmwareVolume3->ExtractedFv ? "True" : "False")));
DEBUG ((DEBUG_INFO, " FVName = %g\n", &Hob.FirmwareVolume3->FvName));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume3->FileName));
DEBUG ((DEBUG_INFO, " AuthenticationStatus = 0x%x\n", Hob.FirmwareVolume3->AuthenticationStatus));
DEBUG ((DEBUG_INFO, " ExtractedFv = %a\n", (Hob.FirmwareVolume3->ExtractedFv ? "True" : "False")));
DEBUG ((DEBUG_INFO, " FVName = %g\n", &Hob.FirmwareVolume3->FvName));
DEBUG ((DEBUG_INFO, " FileName = %g\n", &Hob.FirmwareVolume3->FileName));
return EFI_SUCCESS;
}
//
// Mappint table from Hob type to Hob print function.
//
HOB_PRINT_HANDLER_TABLE mHobHandles[] = {
{EFI_HOB_TYPE_HANDOFF, "EFI_HOB_TYPE_HANDOFF", PrintHandOffHob},
{EFI_HOB_TYPE_MEMORY_ALLOCATION, "EFI_HOB_TYPE_MEMORY_ALLOCATION", PrintMemoryAllocationHob},
{EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR", PrintResourceDiscriptorHob},
{EFI_HOB_TYPE_GUID_EXTENSION, "EFI_HOB_TYPE_GUID_EXTENSION", PrintGuidHob},
{EFI_HOB_TYPE_FV, "EFI_HOB_TYPE_FV", PrintFvHob},
{EFI_HOB_TYPE_CPU, "EFI_HOB_TYPE_CPU", PrintCpuHob},
{EFI_HOB_TYPE_MEMORY_POOL, "EFI_HOB_TYPE_MEMORY_POOL", PrintMemoryPoolHob},
{EFI_HOB_TYPE_FV2, "EFI_HOB_TYPE_FV2", PrintFv2Hob},
{EFI_HOB_TYPE_UEFI_CAPSULE, "EFI_HOB_TYPE_UEFI_CAPSULE", PrintCapsuleHob},
{EFI_HOB_TYPE_FV3, "EFI_HOB_TYPE_FV3", PrintFv3Hob}
HOB_PRINT_HANDLER_TABLE mHobHandles[] = {
{ EFI_HOB_TYPE_HANDOFF, "EFI_HOB_TYPE_HANDOFF", PrintHandOffHob },
{ EFI_HOB_TYPE_MEMORY_ALLOCATION, "EFI_HOB_TYPE_MEMORY_ALLOCATION", PrintMemoryAllocationHob },
{ EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, "EFI_HOB_TYPE_RESOURCE_DESCRIPTOR", PrintResourceDiscriptorHob },
{ EFI_HOB_TYPE_GUID_EXTENSION, "EFI_HOB_TYPE_GUID_EXTENSION", PrintGuidHob },
{ EFI_HOB_TYPE_FV, "EFI_HOB_TYPE_FV", PrintFvHob },
{ EFI_HOB_TYPE_CPU, "EFI_HOB_TYPE_CPU", PrintCpuHob },
{ EFI_HOB_TYPE_MEMORY_POOL, "EFI_HOB_TYPE_MEMORY_POOL", PrintMemoryPoolHob },
{ EFI_HOB_TYPE_FV2, "EFI_HOB_TYPE_FV2", PrintFv2Hob },
{ EFI_HOB_TYPE_UEFI_CAPSULE, "EFI_HOB_TYPE_UEFI_CAPSULE", PrintCapsuleHob },
{ EFI_HOB_TYPE_FV3, "EFI_HOB_TYPE_FV3", PrintFv3Hob }
};
/**
Print all HOBs info from the HOB list.
@param[in] HobStart A pointer to the HOB list
@ -649,15 +661,16 @@ HOB_PRINT_HANDLER_TABLE mHobHandles[] = {
**/
VOID
PrintHob (
IN CONST VOID *HobStart
IN CONST VOID *HobStart
)
{
EFI_PEI_HOB_POINTERS Hob;
UINTN Count;
UINTN Index;
ASSERT (HobStart != NULL);
Hob.Raw = (UINT8 *) HobStart;
Hob.Raw = (UINT8 *)HobStart;
DEBUG ((DEBUG_INFO, "Print all Hob information from Hob 0x%p\n", Hob.Raw));
Count = 0;
@ -667,18 +680,21 @@ PrintHob (
while (!END_OF_HOB_LIST (Hob)) {
for (Index = 0; Index < ARRAY_SIZE (mHobHandles); Index++) {
if (Hob.Header->HobType == mHobHandles[Index].Type) {
DEBUG ((DEBUG_INFO, "HOB[%d]: Type = %a, Offset = 0x%p, Length = 0x%x\n", Count, mHobHandles[Index].Name, (Hob.Raw - (UINT8 *) HobStart), Hob.Header->HobLength));
DEBUG ((DEBUG_INFO, "HOB[%d]: Type = %a, Offset = 0x%p, Length = 0x%x\n", Count, mHobHandles[Index].Name, (Hob.Raw - (UINT8 *)HobStart), Hob.Header->HobLength));
mHobHandles[Index].PrintHandler (Hob.Raw, Hob.Header->HobLength);
break;
}
}
if (Index == ARRAY_SIZE (mHobHandles)) {
DEBUG ((DEBUG_INFO, "HOB[%d]: Type = %d, Offset = 0x%p, Length = 0x%x\n", Count, Hob.Header->HobType, (Hob.Raw - (UINT8 *)HobStart), Hob.Header->HobLength));
DEBUG ((DEBUG_INFO, " Unkown Hob type\n"));
PrintHex (Hob.Raw, Hob.Header->HobLength);
}
Count++;
Hob.Raw = GET_NEXT_HOB (Hob);
}
DEBUG ((DEBUG_INFO, "There are totally %d Hobs, the End Hob address is %p\n", Count, Hob.Raw));
}

138
UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
View File

@ -7,7 +7,7 @@
#include "UefiPayloadEntry.h"
STATIC UINT32 mTopOfLowerUsableDram = 0;
STATIC UINT32 mTopOfLowerUsableDram = 0;
/**
Callback function to build resource descriptor HOB
@ -24,8 +24,8 @@ STATIC UINT32 mTopOfLowerUsableDram = 0;
**/
EFI_STATUS
MemInfoCallbackMmio (
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
)
{
EFI_PHYSICAL_ADDRESS Base;
@ -42,7 +42,7 @@ MemInfoCallbackMmio (
//
// Skip types already handled in MemInfoCallback
//
if (MemoryMapEntry->Type == E820_RAM || MemoryMapEntry->Type == E820_ACPI) {
if ((MemoryMapEntry->Type == E820_RAM) || (MemoryMapEntry->Type == E820_ACPI)) {
return EFI_SUCCESS;
}
@ -65,8 +65,8 @@ MemInfoCallbackMmio (
Type = EFI_RESOURCE_MEMORY_RESERVED;
}
Base = MemoryMapEntry->Base;
Size = MemoryMapEntry->Size;
Base = MemoryMapEntry->Base;
Size = MemoryMapEntry->Size;
Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
@ -77,10 +77,11 @@ MemInfoCallbackMmio (
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;
BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base, Size);
DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));
DEBUG ((DEBUG_INFO, "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));
if (MemoryMapEntry->Type == E820_UNUSABLE ||
MemoryMapEntry->Type == E820_DISABLED) {
if ((MemoryMapEntry->Type == E820_UNUSABLE) ||
(MemoryMapEntry->Type == E820_DISABLED))
{
BuildMemoryAllocationHob (Base, Size, EfiUnusableMemory);
} else if (MemoryMapEntry->Type == E820_PMEM) {
BuildMemoryAllocationHob (Base, Size, EfiPersistentMemory);
@ -89,7 +90,6 @@ MemInfoCallbackMmio (
return EFI_SUCCESS;
}
/**
Callback function to find TOLUD (Top of Lower Usable DRAM)
@ -103,8 +103,8 @@ MemInfoCallbackMmio (
**/
EFI_STATUS
FindToludCallback (
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
)
{
//
@ -120,7 +120,8 @@ FindToludCallback (
// Skip memory types not RAM or reserved
//
if ((MemoryMapEntry->Type == E820_UNUSABLE) || (MemoryMapEntry->Type == E820_DISABLED) ||
(MemoryMapEntry->Type == E820_PMEM)) {
(MemoryMapEntry->Type == E820_PMEM))
{
return EFI_SUCCESS;
}
@ -132,7 +133,8 @@ FindToludCallback (
}
if ((MemoryMapEntry->Type == E820_RAM) || (MemoryMapEntry->Type == E820_ACPI) ||
(MemoryMapEntry->Type == E820_NVS)) {
(MemoryMapEntry->Type == E820_NVS))
{
//
// It's usable DRAM. Update TOLUD.
//
@ -154,7 +156,6 @@ FindToludCallback (
return EFI_SUCCESS;
}
/**
Callback function to build resource descriptor HOB
@ -168,8 +169,8 @@ FindToludCallback (
**/
EFI_STATUS
MemInfoCallback (
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
IN MEMORY_MAP_ENTRY *MemoryMapEntry,
IN VOID *Params
)
{
EFI_PHYSICAL_ADDRESS Base;
@ -182,13 +183,14 @@ MemInfoCallback (
// It will be added later.
//
if ((MemoryMapEntry->Type != E820_RAM) && (MemoryMapEntry->Type != E820_ACPI) &&
(MemoryMapEntry->Type != E820_NVS)) {
(MemoryMapEntry->Type != E820_NVS))
{
return RETURN_SUCCESS;
}
Type = EFI_RESOURCE_SYSTEM_MEMORY;
Base = MemoryMapEntry->Base;
Size = MemoryMapEntry->Size;
Type = EFI_RESOURCE_SYSTEM_MEMORY;
Base = MemoryMapEntry->Base;
Size = MemoryMapEntry->Size;
Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
@ -199,7 +201,7 @@ MemInfoCallback (
EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;
BuildResourceDescriptorHob (Type, Attribue, (EFI_PHYSICAL_ADDRESS)Base, Size);
DEBUG ((DEBUG_INFO , "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));
DEBUG ((DEBUG_INFO, "buildhob: base = 0x%lx, size = 0x%lx, type = 0x%x\n", Base, Size, Type));
if (MemoryMapEntry->Type == E820_ACPI) {
BuildMemoryAllocationHob (Base, Size, EfiACPIReclaimMemory);
@ -210,8 +212,6 @@ MemInfoCallback (
return RETURN_SUCCESS;
}
/**
It will build HOBs based on information from bootloaders.
@ -223,31 +223,32 @@ BuildHobFromBl (
VOID
)
{
EFI_STATUS Status;
ACPI_BOARD_INFO *AcpiBoardInfo;
EFI_PEI_GRAPHICS_INFO_HOB GfxInfo;
EFI_PEI_GRAPHICS_INFO_HOB *NewGfxInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB GfxDeviceInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTableHob;
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;
EFI_STATUS Status;
ACPI_BOARD_INFO *AcpiBoardInfo;
EFI_PEI_GRAPHICS_INFO_HOB GfxInfo;
EFI_PEI_GRAPHICS_INFO_HOB *NewGfxInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB GfxDeviceInfo;
EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;
UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmBiosTableHob;
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTableHob;
//
// First find TOLUD
//
DEBUG ((DEBUG_INFO , "Guessing Top of Lower Usable DRAM:\n"));
DEBUG ((DEBUG_INFO, "Guessing Top of Lower Usable DRAM:\n"));
Status = ParseMemoryInfo (FindToludCallback, NULL);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
DEBUG ((DEBUG_INFO , "Assuming TOLUD = 0x%x\n", mTopOfLowerUsableDram));
DEBUG ((DEBUG_INFO, "Assuming TOLUD = 0x%x\n", mTopOfLowerUsableDram));
//
// Parse memory info and build memory HOBs for Usable RAM
//
DEBUG ((DEBUG_INFO , "Building ResourceDescriptorHobs for usable memory:\n"));
DEBUG ((DEBUG_INFO, "Building ResourceDescriptorHobs for usable memory:\n"));
Status = ParseMemoryInfo (MemInfoCallback, NULL);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
@ -262,7 +263,6 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Created graphics info hob\n"));
}
Status = ParseGfxDeviceInfo (&GfxDeviceInfo);
if (!EFI_ERROR (Status)) {
NewGfxDeviceInfo = BuildGuidHob (&gEfiGraphicsDeviceInfoHobGuid, sizeof (GfxDeviceInfo));
@ -271,16 +271,15 @@ BuildHobFromBl (
DEBUG ((DEBUG_INFO, "Created graphics device info hob\n"));
}
//
// Creat SmBios table Hob
//
SmBiosTableHob = BuildGuidHob (&gUniversalPayloadSmbiosTableGuid, sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE));
ASSERT (SmBiosTableHob != NULL);
SmBiosTableHob->Header.Revision = UNIVERSAL_PAYLOAD_SMBIOS_TABLE_REVISION;
SmBiosTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE);
SmBiosTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE);
DEBUG ((DEBUG_INFO, "Create smbios table gUniversalPayloadSmbiosTableGuid guid hob\n"));
Status = ParseSmbiosTable(SmBiosTableHob);
Status = ParseSmbiosTable (SmBiosTableHob);
if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "Detected Smbios Table at 0x%lx\n", SmBiosTableHob->SmBiosEntryPoint));
}
@ -291,9 +290,9 @@ BuildHobFromBl (
AcpiTableHob = BuildGuidHob (&gUniversalPayloadAcpiTableGuid, sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE));
ASSERT (AcpiTableHob != NULL);
AcpiTableHob->Header.Revision = UNIVERSAL_PAYLOAD_ACPI_TABLE_REVISION;
AcpiTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE);
AcpiTableHob->Header.Length = sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE);
DEBUG ((DEBUG_INFO, "Create ACPI table gUniversalPayloadAcpiTableGuid guid hob\n"));
Status = ParseAcpiTableInfo(AcpiTableHob);
Status = ParseAcpiTableInfo (AcpiTableHob);
if (!EFI_ERROR (Status)) {
DEBUG ((DEBUG_INFO, "Detected ACPI Table at 0x%lx\n", AcpiTableHob->Rsdp));
}
@ -307,9 +306,9 @@ BuildHobFromBl (
//
// Parse memory info and build memory HOBs for reserved DRAM and MMIO
//
DEBUG ((DEBUG_INFO , "Building ResourceDescriptorHobs for reserved memory:\n"));
DEBUG ((DEBUG_INFO, "Building ResourceDescriptorHobs for reserved memory:\n"));
Status = ParseMemoryInfo (MemInfoCallbackMmio, AcpiBoardInfo);
if (EFI_ERROR(Status)) {
if (EFI_ERROR (Status)) {
return Status;
}
@ -333,7 +332,6 @@ BuildHobFromBl (
return EFI_SUCCESS;
}
/**
This function will build some generic HOBs that doesn't depend on information from bootloaders.
@ -343,9 +341,9 @@ BuildGenericHob (
VOID
)
{
UINT32 RegEax;
UINT8 PhysicalAddressBits;
EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
UINT32 RegEax;
UINT8 PhysicalAddressBits;
EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
// The UEFI payload FV
BuildMemoryAllocationHob (PcdGet32 (PcdPayloadFdMemBase), PcdGet32 (PcdPayloadFdMemSize), EfiBootServicesData);
@ -356,9 +354,9 @@ BuildGenericHob (
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000008) {
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
PhysicalAddressBits = (UINT8) RegEax;
PhysicalAddressBits = (UINT8)RegEax;
} else {
PhysicalAddressBits = 36;
PhysicalAddressBits = 36;
}
BuildCpuHob (PhysicalAddressBits, 16);
@ -367,17 +365,15 @@ BuildGenericHob (
// Report Local APIC range, cause sbl HOB to be NULL, comment now
//
ResourceAttribute = (
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED
);
EFI_RESOURCE_ATTRIBUTE_PRESENT |
EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
EFI_RESOURCE_ATTRIBUTE_TESTED
);
BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_MAPPED_IO, ResourceAttribute, 0xFEC80000, SIZE_512KB);
BuildMemoryAllocationHob ( 0xFEC80000, SIZE_512KB, EfiMemoryMappedIO);
BuildMemoryAllocationHob (0xFEC80000, SIZE_512KB, EfiMemoryMappedIO);
}
/**
Entry point to the C language phase of UEFI payload.
@ -388,16 +384,16 @@ BuildGenericHob (
EFI_STATUS
EFIAPI
_ModuleEntryPoint (
IN UINTN BootloaderParameter
IN UINTN BootloaderParameter
)
{
EFI_STATUS Status;
PHYSICAL_ADDRESS DxeCoreEntryPoint;
UINTN MemBase;
UINTN HobMemBase;
UINTN HobMemTop;
EFI_PEI_HOB_POINTERS Hob;
SERIAL_PORT_INFO SerialPortInfo;
EFI_STATUS Status;
PHYSICAL_ADDRESS DxeCoreEntryPoint;
UINTN MemBase;
UINTN HobMemBase;
UINTN HobMemTop;
EFI_PEI_HOB_POINTERS Hob;
SERIAL_PORT_INFO SerialPortInfo;
UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *UniversalSerialPort;
Status = PcdSet64S (PcdBootloaderParameter, BootloaderParameter);
@ -422,7 +418,7 @@ _ModuleEntryPoint (
ASSERT (UniversalSerialPort != NULL);
UniversalSerialPort->Header.Revision = UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO_REVISION;
UniversalSerialPort->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO);
UniversalSerialPort->UseMmio = (SerialPortInfo.Type == 1)?FALSE:TRUE;
UniversalSerialPort->UseMmio = (SerialPortInfo.Type == 1) ? FALSE : TRUE;
UniversalSerialPort->RegisterBase = SerialPortInfo.BaseAddr;
UniversalSerialPort->BaudRate = SerialPortInfo.Baud;
UniversalSerialPort->RegisterStride = (UINT8)SerialPortInfo.RegWidth;
@ -430,7 +426,7 @@ _ModuleEntryPoint (
// The library constructors might depend on serial port, so call it after serial port hob
ProcessLibraryConstructorList ();
DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof(UINTN)));
DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof (UINTN)));
// Build HOB based on information from Bootloader
Status = BuildHobFromBl ();
@ -452,9 +448,9 @@ _ModuleEntryPoint (
// Mask off all legacy 8259 interrupt sources
//
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *) GetFirstHob(EFI_HOB_TYPE_HANDOFF);
Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *)GetFirstHob (EFI_HOB_TYPE_HANDOFF);
HandOffToDxeCore (DxeCoreEntryPoint, Hob);
// Should not get here

55
UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.h
View File

@ -42,15 +42,14 @@
#define GET_OCCUPIED_SIZE(ActualSize, Alignment) \
((ActualSize) + (((Alignment) - ((ActualSize) & ((Alignment) - 1))) & ((Alignment) - 1)))
#define E820_RAM 1
#define E820_RESERVED 2
#define E820_ACPI 3
#define E820_NVS 4
#define E820_UNUSABLE 5
#define E820_DISABLED 6
#define E820_PMEM 7
#define E820_UNDEFINED 8
#define E820_RAM 1
#define E820_RESERVED 2
#define E820_ACPI 3
#define E820_NVS 4
#define E820_UNUSABLE 5
#define E820_DISABLED 6
#define E820_PMEM 7
#define E820_UNDEFINED 8
/**
Auto-generated function that calls the library constructors for all of the module's
@ -75,8 +74,8 @@ ProcessLibraryConstructorList (
VOID *
EFIAPI
CreateHob (
IN UINT16 HobType,
IN UINT16 HobLength
IN UINT16 HobType,
IN UINT16 HobLength
);
/**
@ -89,8 +88,8 @@ CreateHob (
VOID
EFIAPI
UpdateStackHob (
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
IN EFI_PHYSICAL_ADDRESS BaseAddress,
IN UINT64 Length
);
/**
@ -108,13 +107,13 @@ UpdateStackHob (
@return The pointer to the handoff HOB table.
**/
EFI_HOB_HANDOFF_INFO_TABLE*
EFI_HOB_HANDOFF_INFO_TABLE *
EFIAPI
HobConstructor (
IN VOID *EfiMemoryBottom,
IN VOID *EfiMemoryTop,
IN VOID *EfiFreeMemoryBottom,
IN VOID *EfiFreeMemoryTop
IN VOID *EfiMemoryBottom,
IN VOID *EfiMemoryTop,
IN VOID *EfiFreeMemoryBottom,
IN VOID *EfiFreeMemoryTop
);
/**
@ -127,7 +126,7 @@ HobConstructor (
**/
EFI_STATUS
LoadDxeCore (
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
);
/**
@ -141,8 +140,8 @@ LoadDxeCore (
**/
EFI_STATUS
UniversalLoadDxeCore (
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv,
OUT PHYSICAL_ADDRESS *DxeCoreEntryPoint
);
/**
@ -156,13 +155,13 @@ UniversalLoadDxeCore (
**/
VOID
HandOffToDxeCore (
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
);
EFI_STATUS
FixUpPcdDatabase (
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv
);
/**
@ -179,9 +178,9 @@ FixUpPcdDatabase (
**/
EFI_STATUS
FileFindSection (
IN EFI_FFS_FILE_HEADER *FileHeader,
IN EFI_SECTION_TYPE SectionType,
OUT VOID **SectionData
IN EFI_FFS_FILE_HEADER *FileHeader,
IN EFI_SECTION_TYPE SectionType,
OUT VOID **SectionData
);
/**
@ -214,7 +213,7 @@ FvFindFileByTypeGuid (
**/
ACPI_BOARD_INFO *
BuildHobFromAcpi (
IN UINT64 AcpiTableBase
IN UINT64 AcpiTableBase
);
#endif

158
UefiPayloadPkg/UefiPayloadEntry/UniversalPayloadEntry.c
View File

@ -7,7 +7,7 @@
#include "UefiPayloadEntry.h"
#define MEMORY_ATTRIBUTE_MASK (EFI_RESOURCE_ATTRIBUTE_PRESENT | \
#define MEMORY_ATTRIBUTE_MASK (EFI_RESOURCE_ATTRIBUTE_PRESENT | \
EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \
EFI_RESOURCE_ATTRIBUTE_TESTED | \
EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED | \
@ -19,7 +19,7 @@
EFI_RESOURCE_ATTRIBUTE_64_BIT_IO | \
EFI_RESOURCE_ATTRIBUTE_PERSISTENT )
#define TESTED_MEMORY_ATTRIBUTES (EFI_RESOURCE_ATTRIBUTE_PRESENT | \
#define TESTED_MEMORY_ATTRIBUTES (EFI_RESOURCE_ATTRIBUTE_PRESENT | \
EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \
EFI_RESOURCE_ATTRIBUTE_TESTED )
@ -32,7 +32,7 @@ extern VOID *mHobList;
**/
VOID
PrintHob (
IN CONST VOID *HobStart
IN CONST VOID *HobStart
);
/**
@ -48,17 +48,17 @@ PrintHob (
**/
EFI_STATUS
FixUpPcdDatabase (
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv
IN EFI_FIRMWARE_VOLUME_HEADER *DxeFv
)
{
EFI_STATUS Status;
EFI_FFS_FILE_HEADER *FileHeader;
VOID *PcdRawData;
PEI_PCD_DATABASE *PeiDatabase;
PEI_PCD_DATABASE *UplDatabase;
EFI_HOB_GUID_TYPE *GuidHob;
DYNAMICEX_MAPPING *ExMapTable;
UINTN Index;
EFI_STATUS Status;
EFI_FFS_FILE_HEADER *FileHeader;
VOID *PcdRawData;
PEI_PCD_DATABASE *PeiDatabase;
PEI_PCD_DATABASE *UplDatabase;
EFI_HOB_GUID_TYPE *GuidHob;
DYNAMICEX_MAPPING *ExMapTable;
UINTN Index;
GuidHob = GetFirstGuidHob (&gPcdDataBaseHobGuid);
if (GuidHob == NULL) {
@ -67,7 +67,8 @@ FixUpPcdDatabase (
//
return EFI_SUCCESS;
}
PeiDatabase = (PEI_PCD_DATABASE *) GET_GUID_HOB_DATA (GuidHob);
PeiDatabase = (PEI_PCD_DATABASE *)GET_GUID_HOB_DATA (GuidHob);
DEBUG ((DEBUG_INFO, "Find the Pei PCD data base, the total local token number is %d\n", PeiDatabase->LocalTokenCount));
Status = FvFindFileByTypeGuid (DxeFv, EFI_FV_FILETYPE_DRIVER, PcdGetPtr (PcdPcdDriverFile), &FileHeader);
@ -75,18 +76,20 @@ FixUpPcdDatabase (
if (EFI_ERROR (Status)) {
return Status;
}
Status = FileFindSection (FileHeader, EFI_SECTION_RAW, &PcdRawData);
ASSERT_EFI_ERROR (Status);
if (EFI_ERROR (Status)) {
return Status;
}
UplDatabase = (PEI_PCD_DATABASE *) PcdRawData;
ExMapTable = (DYNAMICEX_MAPPING *) (UINTN) ((UINTN) PcdRawData + UplDatabase->ExMapTableOffset);
UplDatabase = (PEI_PCD_DATABASE *)PcdRawData;
ExMapTable = (DYNAMICEX_MAPPING *)(UINTN)((UINTN)PcdRawData + UplDatabase->ExMapTableOffset);
for (Index = 0; Index < UplDatabase->ExTokenCount; Index++) {
ExMapTable[Index].TokenNumber += PeiDatabase->LocalTokenCount;
}
DEBUG ((DEBUG_INFO, "Fix up UPL PCD database successfully\n"));
return EFI_SUCCESS;
}
@ -98,14 +101,15 @@ FixUpPcdDatabase (
**/
VOID
AddNewHob (
IN EFI_PEI_HOB_POINTERS *Hob
IN EFI_PEI_HOB_POINTERS *Hob
)
{
EFI_PEI_HOB_POINTERS NewHob;
EFI_PEI_HOB_POINTERS NewHob;
if (Hob->Raw == NULL) {
return;
}
NewHob.Header = CreateHob (Hob->Header->HobType, Hob->Header->HobLength);
if (NewHob.Header != NULL) {
@ -124,15 +128,15 @@ AddNewHob (
**/
EFI_HOB_RESOURCE_DESCRIPTOR *
FindResourceDescriptorByRange (
IN VOID *HobList,
IN EFI_PHYSICAL_ADDRESS Base,
IN EFI_PHYSICAL_ADDRESS Top
IN VOID *HobList,
IN EFI_PHYSICAL_ADDRESS Base,
IN EFI_PHYSICAL_ADDRESS Top
)
{
EFI_PEI_HOB_POINTERS Hob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
EFI_PEI_HOB_POINTERS Hob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
for (Hob.Raw = (UINT8 *) HobList; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {
for (Hob.Raw = (UINT8 *)HobList; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
//
// Skip all HOBs except Resource Descriptor HOBs
//
@ -147,6 +151,7 @@ FindResourceDescriptorByRange (
if (ResourceHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY) {
continue;
}
if ((ResourceHob->ResourceAttribute & MEMORY_ATTRIBUTE_MASK) != TESTED_MEMORY_ATTRIBUTES) {
continue;
}
@ -157,11 +162,14 @@ FindResourceDescriptorByRange (
if (Base < ResourceHob->PhysicalStart) {
continue;
}
if (Top > (ResourceHob->PhysicalStart + ResourceHob->ResourceLength)) {
continue;
}
return ResourceHob;
}
return NULL;
}
@ -176,17 +184,18 @@ FindResourceDescriptorByRange (
**/
EFI_HOB_RESOURCE_DESCRIPTOR *
FindAnotherHighestBelow4GResourceDescriptor (
IN VOID *HobList,
IN UINTN MinimalNeededSize,
IN EFI_HOB_RESOURCE_DESCRIPTOR *ExceptResourceHob
IN VOID *HobList,
IN UINTN MinimalNeededSize,
IN EFI_HOB_RESOURCE_DESCRIPTOR *ExceptResourceHob
)
{
EFI_PEI_HOB_POINTERS Hob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
EFI_HOB_RESOURCE_DESCRIPTOR *ReturnResourceHob;
EFI_PEI_HOB_POINTERS Hob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
EFI_HOB_RESOURCE_DESCRIPTOR *ReturnResourceHob;
ReturnResourceHob = NULL;
for (Hob.Raw = (UINT8 *) HobList; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) {
for (Hob.Raw = (UINT8 *)HobList; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
//
// Skip all HOBs except Resource Descriptor HOBs
//
@ -201,6 +210,7 @@ FindAnotherHighestBelow4GResourceDescriptor (
if (ResourceHob->ResourceType != EFI_RESOURCE_SYSTEM_MEMORY) {
continue;
}
if ((ResourceHob->ResourceAttribute & MEMORY_ATTRIBUTE_MASK) != TESTED_MEMORY_ATTRIBUTES) {
continue;
}
@ -211,12 +221,14 @@ FindAnotherHighestBelow4GResourceDescriptor (
if (ResourceHob == ExceptResourceHob) {
continue;
}
//
// Skip Resource Descriptor HOBs that are beyond 4G
//
if ((ResourceHob->PhysicalStart + ResourceHob->ResourceLength) > BASE_4GB) {
continue;
}
//
// Skip Resource Descriptor HOBs that are too small
//
@ -235,6 +247,7 @@ FindAnotherHighestBelow4GResourceDescriptor (
}
}
}
return ReturnResourceHob;
}
@ -253,39 +266,38 @@ BuildHobs (
OUT EFI_FIRMWARE_VOLUME_HEADER **DxeFv
)
{
EFI_PEI_HOB_POINTERS Hob;
UINTN MinimalNeededSize;
EFI_PHYSICAL_ADDRESS FreeMemoryBottom;
EFI_PHYSICAL_ADDRESS FreeMemoryTop;
EFI_PHYSICAL_ADDRESS MemoryBottom;
EFI_PHYSICAL_ADDRESS MemoryTop;
EFI_HOB_RESOURCE_DESCRIPTOR *PhitResourceHob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
UINT8 *GuidHob;
EFI_HOB_FIRMWARE_VOLUME *FvHob;
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTable;
ACPI_BOARD_INFO *AcpiBoardInfo;
EFI_PEI_HOB_POINTERS Hob;
UINTN MinimalNeededSize;
EFI_PHYSICAL_ADDRESS FreeMemoryBottom;
EFI_PHYSICAL_ADDRESS FreeMemoryTop;
EFI_PHYSICAL_ADDRESS MemoryBottom;
EFI_PHYSICAL_ADDRESS MemoryTop;
EFI_HOB_RESOURCE_DESCRIPTOR *PhitResourceHob;
EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData;
UINT8 *GuidHob;
EFI_HOB_FIRMWARE_VOLUME *FvHob;
UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTable;
ACPI_BOARD_INFO *AcpiBoardInfo;
Hob.Raw = (UINT8 *) BootloaderParameter;
Hob.Raw = (UINT8 *)BootloaderParameter;
MinimalNeededSize = FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);
ASSERT (Hob.Raw != NULL);
ASSERT ((UINTN) Hob.HandoffInformationTable->EfiFreeMemoryTop == Hob.HandoffInformationTable->EfiFreeMemoryTop);
ASSERT ((UINTN) Hob.HandoffInformationTable->EfiMemoryTop == Hob.HandoffInformationTable->EfiMemoryTop);
ASSERT ((UINTN) Hob.HandoffInformationTable->EfiFreeMemoryBottom == Hob.HandoffInformationTable->EfiFreeMemoryBottom);
ASSERT ((UINTN) Hob.HandoffInformationTable->EfiMemoryBottom == Hob.HandoffInformationTable->EfiMemoryBottom);
ASSERT ((UINTN)Hob.HandoffInformationTable->EfiFreeMemoryTop == Hob.HandoffInformationTable->EfiFreeMemoryTop);
ASSERT ((UINTN)Hob.HandoffInformationTable->EfiMemoryTop == Hob.HandoffInformationTable->EfiMemoryTop);
ASSERT ((UINTN)Hob.HandoffInformationTable->EfiFreeMemoryBottom == Hob.HandoffInformationTable->EfiFreeMemoryBottom);
ASSERT ((UINTN)Hob.HandoffInformationTable->EfiMemoryBottom == Hob.HandoffInformationTable->EfiMemoryBottom);
//
// Try to find Resource Descriptor HOB that contains Hob range EfiMemoryBottom..EfiMemoryTop
//
PhitResourceHob = FindResourceDescriptorByRange(Hob.Raw, Hob.HandoffInformationTable->EfiMemoryBottom, Hob.HandoffInformationTable->EfiMemoryTop);
PhitResourceHob = FindResourceDescriptorByRange (Hob.Raw, Hob.HandoffInformationTable->EfiMemoryBottom, Hob.HandoffInformationTable->EfiMemoryTop);
if (PhitResourceHob == NULL) {
//
// Boot loader's Phit Hob is not in an available Resource Descriptor, find another Resource Descriptor for new Phit Hob
//
ResourceHob = FindAnotherHighestBelow4GResourceDescriptor(Hob.Raw, MinimalNeededSize, NULL);
ResourceHob = FindAnotherHighestBelow4GResourceDescriptor (Hob.Raw, MinimalNeededSize, NULL);
if (ResourceHob == NULL) {
return EFI_NOT_FOUND;
}
@ -315,7 +327,7 @@ BuildHobs (
// In the Resource Descriptor HOB contains boot loader Hob, there is no enough free memory size for payload hob
// Find another Resource Descriptor Hob
//
ResourceHob = FindAnotherHighestBelow4GResourceDescriptor(Hob.Raw, MinimalNeededSize, PhitResourceHob);
ResourceHob = FindAnotherHighestBelow4GResourceDescriptor (Hob.Raw, MinimalNeededSize, PhitResourceHob);
if (ResourceHob == NULL) {
return EFI_NOT_FOUND;
}
@ -325,7 +337,8 @@ BuildHobs (
FreeMemoryTop = ResourceHob->PhysicalStart + ResourceHob->ResourceLength;
MemoryTop = FreeMemoryTop;
}
HobConstructor ((VOID *) (UINTN) MemoryBottom, (VOID *) (UINTN) MemoryTop, (VOID *) (UINTN) FreeMemoryBottom, (VOID *) (UINTN) FreeMemoryTop);
HobConstructor ((VOID *)(UINTN)MemoryBottom, (VOID *)(UINTN)MemoryTop, (VOID *)(UINTN)FreeMemoryBottom, (VOID *)(UINTN)FreeMemoryTop);
//
// From now on, mHobList will point to the new Hob range.
//
@ -333,7 +346,7 @@ BuildHobs (
//
// Create an empty FvHob for the DXE FV that contains DXE core.
//
BuildFvHob ((EFI_PHYSICAL_ADDRESS) 0, 0);
BuildFvHob ((EFI_PHYSICAL_ADDRESS)0, 0);
//
// Since payload created new Hob, move all hobs except PHIT from boot loader hob list.
//
@ -342,27 +355,28 @@ BuildHobs (
// Add this hob to payload HOB
AddNewHob (&Hob);
}
Hob.Raw = GET_NEXT_HOB (Hob);
}
//
// Get DXE FV location
//
GuidHob = GetFirstGuidHob(&gUniversalPayloadExtraDataGuid);
GuidHob = GetFirstGuidHob (&gUniversalPayloadExtraDataGuid);
ASSERT (GuidHob != NULL);
ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *) GET_GUID_HOB_DATA (GuidHob);
ExtraData = (UNIVERSAL_PAYLOAD_EXTRA_DATA *)GET_GUID_HOB_DATA (GuidHob);
ASSERT (ExtraData->Count == 1);
ASSERT (AsciiStrCmp (ExtraData->Entry[0].Identifier, "uefi_fv") == 0);
*DxeFv = (EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) ExtraData->Entry[0].Base;
*DxeFv = (EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)ExtraData->Entry[0].Base;
ASSERT ((*DxeFv)->FvLength == ExtraData->Entry[0].Size);
//
// Create guid hob for acpi board information
//
GuidHob = GetFirstGuidHob(&gUniversalPayloadAcpiTableGuid);
GuidHob = GetFirstGuidHob (&gUniversalPayloadAcpiTableGuid);
if (GuidHob != NULL) {
AcpiTable = (UNIVERSAL_PAYLOAD_ACPI_TABLE *) GET_GUID_HOB_DATA (GuidHob);
AcpiTable = (UNIVERSAL_PAYLOAD_ACPI_TABLE *)GET_GUID_HOB_DATA (GuidHob);
AcpiBoardInfo = BuildHobFromAcpi ((UINT64)AcpiTable->Rsdp);
ASSERT (AcpiBoardInfo != NULL);
}
@ -371,9 +385,9 @@ BuildHobs (
// Update DXE FV information to first fv hob in the hob list, which
// is the empty FvHob created before.
//
FvHob = GetFirstHob (EFI_HOB_TYPE_FV);
FvHob->BaseAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) *DxeFv;
FvHob->Length = (*DxeFv)->FvLength;
FvHob = GetFirstHob (EFI_HOB_TYPE_FV);
FvHob->BaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)*DxeFv;
FvHob->Length = (*DxeFv)->FvLength;
return EFI_SUCCESS;
}
@ -387,28 +401,28 @@ BuildHobs (
EFI_STATUS
EFIAPI
_ModuleEntryPoint (
IN UINTN BootloaderParameter
IN UINTN BootloaderParameter
)
{
EFI_STATUS Status;
PHYSICAL_ADDRESS DxeCoreEntryPoint;
EFI_PEI_HOB_POINTERS Hob;
EFI_FIRMWARE_VOLUME_HEADER *DxeFv;
EFI_STATUS Status;
PHYSICAL_ADDRESS DxeCoreEntryPoint;
EFI_PEI_HOB_POINTERS Hob;
EFI_FIRMWARE_VOLUME_HEADER *DxeFv;
mHobList = (VOID *) BootloaderParameter;
mHobList = (VOID *)BootloaderParameter;
DxeFv = NULL;
// Call constructor for all libraries
ProcessLibraryConstructorList ();
DEBUG ((DEBUG_INFO, "Entering Universal Payload...\n"));
DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof(UINTN)));
DEBUG ((DEBUG_INFO, "sizeof(UINTN) = 0x%x\n", sizeof (UINTN)));
DEBUG_CODE (
//
// Dump the Hobs from boot loader
//
PrintHob (mHobList);
);
);
// Initialize floating point operating environment to be compliant with UEFI spec.
InitializeFloatingPointUnits ();
@ -425,9 +439,9 @@ _ModuleEntryPoint (
// Mask off all legacy 8259 interrupt sources
//
IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *) GetFirstHob(EFI_HOB_TYPE_HANDOFF);
Hob.HandoffInformationTable = (EFI_HOB_HANDOFF_INFO_TABLE *)GetFirstHob (EFI_HOB_TYPE_HANDOFF);
HandOffToDxeCore (DxeCoreEntryPoint, Hob);
// Should not get here

31
UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFunc.c
View File

@ -15,8 +15,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/HobLib.h>
#include "X64/VirtualMemory.h"
#include "UefiPayloadEntry.h"
#define STACK_SIZE 0x20000
#define STACK_SIZE 0x20000
/**
Transfers control to DxeCore.
@ -31,15 +30,15 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
VOID
HandOffToDxeCore (
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,
IN EFI_PEI_HOB_POINTERS HobList
)
{
VOID *BaseOfStack;
VOID *TopOfStack;
UINTN PageTables;
VOID *GhcbBase;
UINTN GhcbSize;
VOID *BaseOfStack;
VOID *TopOfStack;
UINTN PageTables;
VOID *GhcbBase;
UINTN GhcbSize;
//
// Clear page 0 and mark it as allocated if NULL pointer detection is enabled.
@ -49,7 +48,6 @@ HandOffToDxeCore (
BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);
}
//
// Allocate 128KB for the Stack
//
@ -60,7 +58,7 @@ HandOffToDxeCore (
// Compute the top of the stack we were allocated. Pre-allocate a UINTN
// for safety.
//
TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
//
@ -74,8 +72,12 @@ HandOffToDxeCore (
//
// Create page table and save PageMapLevel4 to CR3
//
PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE,
(EFI_PHYSICAL_ADDRESS) (UINTN) GhcbBase, GhcbSize);
PageTables = CreateIdentityMappingPageTables (
(EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack,
STACK_SIZE,
(EFI_PHYSICAL_ADDRESS)(UINTN)GhcbBase,
GhcbSize
);
} else {
//
// Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE
@ -85,7 +87,6 @@ HandOffToDxeCore (
ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);
}
if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {
AsmWriteCr3 (PageTables);
}
@ -93,7 +94,7 @@ HandOffToDxeCore (
//
// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.
//
UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);
UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);
//
// Transfer the control to the entry point of DxeCore.

382
UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c
View File

@ -35,7 +35,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Global variable to keep track current available memory used as page table.
//
PAGE_TABLE_POOL *mPageTablePool = NULL;
PAGE_TABLE_POOL *mPageTablePool = NULL;
/**
Clear legacy memory located at the first 4K-page, if available.
@ -48,39 +48,50 @@ PAGE_TABLE_POOL *mPageTablePool = NULL;
**/
VOID
ClearFirst4KPage (
IN VOID *HobStart
IN VOID *HobStart
)
{
EFI_PEI_HOB_POINTERS RscHob;
EFI_PEI_HOB_POINTERS MemHob;
BOOLEAN DoClear;
EFI_PEI_HOB_POINTERS RscHob;
EFI_PEI_HOB_POINTERS MemHob;
BOOLEAN DoClear;
RscHob.Raw = HobStart;
MemHob.Raw = HobStart;
DoClear = FALSE;
DoClear = FALSE;
//
// Check if page 0 exists and free
//
while ((RscHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,
RscHob.Raw)) != NULL) {
if (RscHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY &&
RscHob.ResourceDescriptor->PhysicalStart == 0) {
while ((RscHob.Raw = GetNextHob (
EFI_HOB_TYPE_RESOURCE_DESCRIPTOR,
RscHob.Raw
)) != NULL)
{
if ((RscHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
(RscHob.ResourceDescriptor->PhysicalStart == 0))
{
DoClear = TRUE;
//
// Make sure memory at 0-4095 has not been allocated.
//
while ((MemHob.Raw = GetNextHob (EFI_HOB_TYPE_MEMORY_ALLOCATION,
MemHob.Raw)) != NULL) {
while ((MemHob.Raw = GetNextHob (
EFI_HOB_TYPE_MEMORY_ALLOCATION,
MemHob.Raw
)) != NULL)
{
if (MemHob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress
< EFI_PAGE_SIZE) {
< EFI_PAGE_SIZE)
{
DoClear = FALSE;
break;
}
MemHob.Raw = GET_NEXT_HOB (MemHob);
}
break;
}
RscHob.Raw = GET_NEXT_HOB (RscHob);
}
@ -119,9 +130,9 @@ IsExecuteDisableBitAvailable (
VOID
)
{
UINT32 RegEax;
UINT32 RegEdx;
BOOLEAN Available;
UINT32 RegEax;
UINT32 RegEdx;
BOOLEAN Available;
Available = FALSE;
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
@ -172,9 +183,9 @@ EnableExecuteDisableBit (
VOID
)
{
UINT64 MsrRegisters;
UINT64 MsrRegisters;
MsrRegisters = AsmReadMsr64 (0xC0000080);
MsrRegisters = AsmReadMsr64 (0xC0000080);
MsrRegisters |= BIT11;
AsmWriteMsr64 (0xC0000080, MsrRegisters);
}
@ -195,20 +206,20 @@ EnableExecuteDisableBit (
**/
BOOLEAN
ToSplitPageTable (
IN EFI_PHYSICAL_ADDRESS Address,
IN UINTN Size,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
IN EFI_PHYSICAL_ADDRESS Address,
IN UINTN Size,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
)
{
if (IsNullDetectionEnabled () && Address == 0) {
if (IsNullDetectionEnabled () && (Address == 0)) {
return TRUE;
}
if (PcdGetBool (PcdCpuStackGuard)) {
if (StackBase >= Address && StackBase < (Address + Size)) {
if ((StackBase >= Address) && (StackBase < (Address + Size))) {
return TRUE;
}
}
@ -227,6 +238,7 @@ ToSplitPageTable (
return FALSE;
}
/**
Initialize a buffer pool for page table use only.
@ -246,18 +258,18 @@ ToSplitPageTable (
**/
BOOLEAN
InitializePageTablePool (
IN UINTN PoolPages
IN UINTN PoolPages
)
{
VOID *Buffer;
VOID *Buffer;
//
// Always reserve at least PAGE_TABLE_POOL_UNIT_PAGES, including one page for
// header.
//
PoolPages += 1; // Add one page for header.
PoolPages = ((PoolPages - 1) / PAGE_TABLE_POOL_UNIT_PAGES + 1) *
PAGE_TABLE_POOL_UNIT_PAGES;
PoolPages = ((PoolPages - 1) / PAGE_TABLE_POOL_UNIT_PAGES + 1) *
PAGE_TABLE_POOL_UNIT_PAGES;
Buffer = AllocateAlignedPages (PoolPages, PAGE_TABLE_POOL_ALIGNMENT);
if (Buffer == NULL) {
DEBUG ((DEBUG_ERROR, "ERROR: Out of aligned pages\r\n"));
@ -268,19 +280,19 @@ InitializePageTablePool (
// Link all pools into a list for easier track later.
//
if (mPageTablePool == NULL) {
mPageTablePool = Buffer;
mPageTablePool = Buffer;
mPageTablePool->NextPool = mPageTablePool;
} else {
((PAGE_TABLE_POOL *)Buffer)->NextPool = mPageTablePool->NextPool;
mPageTablePool->NextPool = Buffer;
mPageTablePool = Buffer;
mPageTablePool->NextPool = Buffer;
mPageTablePool = Buffer;
}
//
// Reserve one page for pool header.
//
mPageTablePool->FreePages = PoolPages - 1;
mPageTablePool->Offset = EFI_PAGES_TO_SIZE (1);
mPageTablePool->FreePages = PoolPages - 1;
mPageTablePool->Offset = EFI_PAGES_TO_SIZE (1);
return TRUE;
}
@ -304,10 +316,10 @@ InitializePageTablePool (
**/
VOID *
AllocatePageTableMemory (
IN UINTN Pages
IN UINTN Pages
)
{
VOID *Buffer;
VOID *Buffer;
if (Pages == 0) {
return NULL;
@ -316,8 +328,9 @@ AllocatePageTableMemory (
//
// Renew the pool if necessary.
//
if (mPageTablePool == NULL ||
Pages > mPageTablePool->FreePages) {
if ((mPageTablePool == NULL) ||
(Pages > mPageTablePool->FreePages))
{
if (!InitializePageTablePool (Pages)) {
return NULL;
}
@ -325,8 +338,8 @@ AllocatePageTableMemory (
Buffer = (UINT8 *)mPageTablePool + mPageTablePool->Offset;
mPageTablePool->Offset += EFI_PAGES_TO_SIZE (Pages);
mPageTablePool->FreePages -= Pages;
mPageTablePool->Offset += EFI_PAGES_TO_SIZE (Pages);
mPageTablePool->FreePages -= Pages;
return Buffer;
}
@ -344,18 +357,18 @@ AllocatePageTableMemory (
**/
VOID
Split2MPageTo4K (
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry2M,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry2M,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
)
{
EFI_PHYSICAL_ADDRESS PhysicalAddress4K;
UINTN IndexOfPageTableEntries;
PAGE_TABLE_4K_ENTRY *PageTableEntry;
UINT64 AddressEncMask;
EFI_PHYSICAL_ADDRESS PhysicalAddress4K;
UINTN IndexOfPageTableEntries;
PAGE_TABLE_4K_ENTRY *PageTableEntry;
UINT64 AddressEncMask;
//
// Make sure AddressEncMask is contained to smallest supported address field
@ -368,14 +381,14 @@ Split2MPageTo4K (
//
// Fill in 2M page entry.
//
*PageEntry2M = (UINT64) (UINTN) PageTableEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;
*PageEntry2M = (UINT64)(UINTN)PageTableEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;
PhysicalAddress4K = PhysicalAddress;
for (IndexOfPageTableEntries = 0; IndexOfPageTableEntries < 512; IndexOfPageTableEntries++, PageTableEntry++, PhysicalAddress4K += SIZE_4KB) {
//
// Fill in the Page Table entries
//
PageTableEntry->Uint64 = (UINT64) PhysicalAddress4K;
PageTableEntry->Uint64 = (UINT64)PhysicalAddress4K;
//
// The GHCB range consists of two pages per CPU, the GHCB and a
@ -383,24 +396,28 @@ Split2MPageTo4K (
// unencrypted page while the per-CPU variable page needs to be
// mapped encrypted. These pages alternate in assignment.
//
if ((GhcbBase == 0)
|| (PhysicalAddress4K < GhcbBase)
|| (PhysicalAddress4K >= GhcbBase + GhcbSize)
|| (((PhysicalAddress4K - GhcbBase) & SIZE_4KB) != 0)) {
if ( (GhcbBase == 0)
|| (PhysicalAddress4K < GhcbBase)
|| (PhysicalAddress4K >= GhcbBase + GhcbSize)
|| (((PhysicalAddress4K - GhcbBase) & SIZE_4KB) != 0))
{
PageTableEntry->Uint64 |= AddressEncMask;
}
PageTableEntry->Bits.ReadWrite = 1;
if ((IsNullDetectionEnabled () && PhysicalAddress4K == 0) ||
(PcdGetBool (PcdCpuStackGuard) && PhysicalAddress4K == StackBase)) {
if ((IsNullDetectionEnabled () && (PhysicalAddress4K == 0)) ||
(PcdGetBool (PcdCpuStackGuard) && (PhysicalAddress4K == StackBase)))
{
PageTableEntry->Bits.Present = 0;
} else {
PageTableEntry->Bits.Present = 1;
}
if (PcdGetBool (PcdSetNxForStack)
&& (PhysicalAddress4K >= StackBase)
&& (PhysicalAddress4K < StackBase + StackSize)) {
if ( PcdGetBool (PcdSetNxForStack)
&& (PhysicalAddress4K >= StackBase)
&& (PhysicalAddress4K < StackBase + StackSize))
{
//
// Set Nx bit for stack.
//
@ -422,18 +439,18 @@ Split2MPageTo4K (
**/
VOID
Split1GPageTo2M (
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry1G,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry1G,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
)
{
EFI_PHYSICAL_ADDRESS PhysicalAddress2M;
UINTN IndexOfPageDirectoryEntries;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINT64 AddressEncMask;
EFI_PHYSICAL_ADDRESS PhysicalAddress2M;
UINTN IndexOfPageDirectoryEntries;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINT64 AddressEncMask;
//
// Make sure AddressEncMask is contained to smallest supported address field
@ -446,7 +463,7 @@ Split1GPageTo2M (
//
// Fill in 1G page entry.
//
*PageEntry1G = (UINT64) (UINTN) PageDirectoryEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;
*PageEntry1G = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask | IA32_PG_P | IA32_PG_RW;
PhysicalAddress2M = PhysicalAddress;
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress2M += SIZE_2MB) {
@ -454,15 +471,15 @@ Split1GPageTo2M (
//
// Need to split this 2M page that covers NULL or stack range.
//
Split2MPageTo4K (PhysicalAddress2M, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);
Split2MPageTo4K (PhysicalAddress2M, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);
} else {
//
// Fill in the Page Directory entries
//
PageDirectoryEntry->Uint64 = (UINT64) PhysicalAddress2M | AddressEncMask;
PageDirectoryEntry->Uint64 = (UINT64)PhysicalAddress2M | AddressEncMask;
PageDirectoryEntry->Bits.ReadWrite = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
}
}
}
@ -477,9 +494,9 @@ Split1GPageTo2M (
**/
VOID
SetPageTablePoolReadOnly (
IN UINTN PageTableBase,
IN EFI_PHYSICAL_ADDRESS Address,
IN BOOLEAN Level4Paging
IN UINTN PageTableBase,
IN EFI_PHYSICAL_ADDRESS Address,
IN BOOLEAN Level4Paging
)
{
UINTN Index;
@ -519,13 +536,13 @@ SetPageTablePoolReadOnly (
LevelSize[3] = SIZE_1GB;
LevelSize[4] = SIZE_512GB;
AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) &
PAGING_1G_ADDRESS_MASK_64;
PageTable = (UINT64 *)(UINTN)PageTableBase;
PoolUnitSize = PAGE_TABLE_POOL_UNIT_SIZE;
AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) &
PAGING_1G_ADDRESS_MASK_64;
PageTable = (UINT64 *)(UINTN)PageTableBase;
PoolUnitSize = PAGE_TABLE_POOL_UNIT_SIZE;
for (Level = (Level4Paging) ? 4 : 3; Level > 0; --Level) {
Index = ((UINTN)RShiftU64 (Address, LevelShift[Level]));
Index = ((UINTN)RShiftU64 (Address, LevelShift[Level]));
Index &= PAGING_PAE_INDEX_MASK;
PageAttr = PageTable[Index];
@ -553,14 +570,13 @@ SetPageTablePoolReadOnly (
ASSERT (Index < EFI_PAGE_SIZE/sizeof (UINT64));
PageTable[Index] &= ~(UINT64)IA32_PG_RW;
PoolUnitSize -= LevelSize[Level];
PoolUnitSize -= LevelSize[Level];
++Index;
}
}
break;
} else {
//
// The smaller granularity of page must be needed.
@ -572,18 +588,20 @@ SetPageTablePoolReadOnly (
PhysicalAddress = PageAttr & LevelMask[Level];
for (EntryIndex = 0;
EntryIndex < EFI_PAGE_SIZE/sizeof (UINT64);
++EntryIndex) {
EntryIndex < EFI_PAGE_SIZE/sizeof (UINT64);
++EntryIndex)
{
NewPageTable[EntryIndex] = PhysicalAddress | AddressEncMask |
IA32_PG_P | IA32_PG_RW;
if (Level > 2) {
NewPageTable[EntryIndex] |= IA32_PG_PS;
}
PhysicalAddress += LevelSize[Level - 1];
}
PageTable[Index] = (UINT64)(UINTN)NewPageTable | AddressEncMask |
IA32_PG_P | IA32_PG_RW;
IA32_PG_P | IA32_PG_RW;
PageTable = NewPageTable;
}
}
@ -598,14 +616,14 @@ SetPageTablePoolReadOnly (
**/
VOID
EnablePageTableProtection (
IN UINTN PageTableBase,
IN BOOLEAN Level4Paging
IN UINTN PageTableBase,
IN BOOLEAN Level4Paging
)
{
PAGE_TABLE_POOL *HeadPool;
PAGE_TABLE_POOL *Pool;
UINT64 PoolSize;
EFI_PHYSICAL_ADDRESS Address;
PAGE_TABLE_POOL *HeadPool;
PAGE_TABLE_POOL *Pool;
UINT64 PoolSize;
EFI_PHYSICAL_ADDRESS Address;
if (mPageTablePool == NULL) {
return;
@ -615,14 +633,14 @@ EnablePageTableProtection (
// Disable write protection, because we need to mark page table to be write
// protected.
//
AsmWriteCr0 (AsmReadCr0() & ~CR0_WP);
AsmWriteCr0 (AsmReadCr0 () & ~CR0_WP);
//
// SetPageTablePoolReadOnly might update mPageTablePool. It's safer to
// remember original one in advance.
//
HeadPool = mPageTablePool;
Pool = HeadPool;
Pool = HeadPool;
do {
Address = (EFI_PHYSICAL_ADDRESS)(UINTN)Pool;
PoolSize = Pool->Offset + EFI_PAGES_TO_SIZE (Pool->FreePages);
@ -633,9 +651,9 @@ EnablePageTableProtection (
// protection to them one by one.
//
while (PoolSize > 0) {
SetPageTablePoolReadOnly(PageTableBase, Address, Level4Paging);
Address += PAGE_TABLE_POOL_UNIT_SIZE;
PoolSize -= PAGE_TABLE_POOL_UNIT_SIZE;
SetPageTablePoolReadOnly (PageTableBase, Address, Level4Paging);
Address += PAGE_TABLE_POOL_UNIT_SIZE;
PoolSize -= PAGE_TABLE_POOL_UNIT_SIZE;
}
Pool = Pool->NextPool;
@ -644,7 +662,7 @@ EnablePageTableProtection (
//
// Enable write protection, after page table attribute updated.
//
AsmWriteCr0 (AsmReadCr0() | CR0_WP);
AsmWriteCr0 (AsmReadCr0 () | CR0_WP);
}
/**
@ -661,37 +679,37 @@ EnablePageTableProtection (
**/
UINTN
CreateIdentityMappingPageTables (
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
)
{
UINT32 RegEax;
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX EcxFlags;
UINT32 RegEdx;
UINT8 PhysicalAddressBits;
EFI_PHYSICAL_ADDRESS PageAddress;
UINTN IndexOfPml5Entries;
UINTN IndexOfPml4Entries;
UINTN IndexOfPdpEntries;
UINTN IndexOfPageDirectoryEntries;
UINT32 NumberOfPml5EntriesNeeded;
UINT32 NumberOfPml4EntriesNeeded;
UINT32 NumberOfPdpEntriesNeeded;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel5Entry;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINTN TotalPagesNum;
UINTN BigPageAddress;
VOID *Hob;
BOOLEAN Page5LevelSupport;
BOOLEAN Page1GSupport;
PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
UINT64 AddressEncMask;
IA32_CR4 Cr4;
UINT32 RegEax;
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX EcxFlags;
UINT32 RegEdx;
UINT8 PhysicalAddressBits;
EFI_PHYSICAL_ADDRESS PageAddress;
UINTN IndexOfPml5Entries;
UINTN IndexOfPml4Entries;
UINTN IndexOfPdpEntries;
UINTN IndexOfPageDirectoryEntries;
UINT32 NumberOfPml5EntriesNeeded;
UINT32 NumberOfPml4EntriesNeeded;
UINT32 NumberOfPdpEntriesNeeded;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel5Entry;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINTN TotalPagesNum;
UINTN BigPageAddress;
VOID *Hob;
BOOLEAN Page5LevelSupport;
BOOLEAN Page1GSupport;
PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
UINT64 AddressEncMask;
IA32_CR4 Cr4;
//
// Set PageMapLevel5Entry to suppress incorrect compiler/analyzer warnings
@ -704,7 +722,7 @@ CreateIdentityMappingPageTables (
AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
Page1GSupport = FALSE;
if (PcdGetBool(PcdUse1GPageTable)) {
if (PcdGetBool (PcdUse1GPageTable)) {
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000001) {
AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
@ -719,12 +737,12 @@ CreateIdentityMappingPageTables (
//
Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
if (Hob != NULL) {
PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
if (RegEax >= 0x80000008) {
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
PhysicalAddressBits = (UINT8) RegEax;
PhysicalAddressBits = (UINT8)RegEax;
} else {
PhysicalAddressBits = 36;
}
@ -733,8 +751,12 @@ CreateIdentityMappingPageTables (
Page5LevelSupport = FALSE;
if (PcdGetBool (PcdUse5LevelPageTable)) {
AsmCpuidEx (
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO, NULL,
&EcxFlags.Uint32, NULL, NULL
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,
CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO,
NULL,
&EcxFlags.Uint32,
NULL,
NULL
);
if (EcxFlags.Bits.FiveLevelPage != 0) {
Page5LevelSupport = TRUE;
@ -749,7 +771,7 @@ CreateIdentityMappingPageTables (
// due to either unsupported by HW, or disabled by PCD.
//
ASSERT (PhysicalAddressBits <= 52);
if (!Page5LevelSupport && PhysicalAddressBits > 48) {
if (!Page5LevelSupport && (PhysicalAddressBits > 48)) {
PhysicalAddressBits = 48;
}
@ -758,19 +780,19 @@ CreateIdentityMappingPageTables (
//
NumberOfPml5EntriesNeeded = 1;
if (PhysicalAddressBits > 48) {
NumberOfPml5EntriesNeeded = (UINT32) LShiftU64 (1, PhysicalAddressBits - 48);
PhysicalAddressBits = 48;
NumberOfPml5EntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 48);
PhysicalAddressBits = 48;
}
NumberOfPml4EntriesNeeded = 1;
if (PhysicalAddressBits > 39) {
NumberOfPml4EntriesNeeded = (UINT32) LShiftU64 (1, PhysicalAddressBits - 39);
PhysicalAddressBits = 39;
NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 39);
PhysicalAddressBits = 39;
}
NumberOfPdpEntriesNeeded = 1;
ASSERT (PhysicalAddressBits > 30);
NumberOfPdpEntriesNeeded = (UINT32) LShiftU64 (1, PhysicalAddressBits - 30);
NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 30);
//
// Pre-allocate big pages to avoid later allocations.
@ -788,17 +810,22 @@ CreateIdentityMappingPageTables (
TotalPagesNum--;
}
DEBUG ((DEBUG_INFO, "Pml5=%u Pml4=%u Pdp=%u TotalPage=%Lu\n",
NumberOfPml5EntriesNeeded, NumberOfPml4EntriesNeeded,
NumberOfPdpEntriesNeeded, (UINT64)TotalPagesNum));
DEBUG ((
DEBUG_INFO,
"Pml5=%u Pml4=%u Pdp=%u TotalPage=%Lu\n",
NumberOfPml5EntriesNeeded,
NumberOfPml4EntriesNeeded,
NumberOfPdpEntriesNeeded,
(UINT64)TotalPagesNum
));
BigPageAddress = (UINTN) AllocatePageTableMemory (TotalPagesNum);
BigPageAddress = (UINTN)AllocatePageTableMemory (TotalPagesNum);
ASSERT (BigPageAddress != 0);
//
// By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
//
PageMap = (VOID *) BigPageAddress;
PageMap = (VOID *)BigPageAddress;
if (Page5LevelSupport) {
//
// By architecture only one PageMapLevel5 exists - so lets allocate storage for it.
@ -806,94 +833,98 @@ CreateIdentityMappingPageTables (
PageMapLevel5Entry = PageMap;
BigPageAddress += SIZE_4KB;
}
PageAddress = 0;
PageAddress = 0;
for ( IndexOfPml5Entries = 0
; IndexOfPml5Entries < NumberOfPml5EntriesNeeded
; IndexOfPml5Entries++) {
; IndexOfPml5Entries < NumberOfPml5EntriesNeeded
; IndexOfPml5Entries++)
{
//
// Each PML5 entry points to a page of PML4 entires.
// So lets allocate space for them and fill them in in the IndexOfPml4Entries loop.
// When 5-Level Paging is disabled, below allocation happens only once.
//
PageMapLevel4Entry = (VOID *) BigPageAddress;
PageMapLevel4Entry = (VOID *)BigPageAddress;
BigPageAddress += SIZE_4KB;
if (Page5LevelSupport) {
//
// Make a PML5 Entry
//
PageMapLevel5Entry->Uint64 = (UINT64) (UINTN) PageMapLevel4Entry | AddressEncMask;
PageMapLevel5Entry->Uint64 = (UINT64)(UINTN)PageMapLevel4Entry | AddressEncMask;
PageMapLevel5Entry->Bits.ReadWrite = 1;
PageMapLevel5Entry->Bits.Present = 1;
PageMapLevel5Entry++;
}
for ( IndexOfPml4Entries = 0
; IndexOfPml4Entries < (NumberOfPml5EntriesNeeded == 1 ? NumberOfPml4EntriesNeeded : 512)
; IndexOfPml4Entries++, PageMapLevel4Entry++) {
; IndexOfPml4Entries < (NumberOfPml5EntriesNeeded == 1 ? NumberOfPml4EntriesNeeded : 512)
; IndexOfPml4Entries++, PageMapLevel4Entry++)
{
//
// Each PML4 entry points to a page of Page Directory Pointer entires.
// So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
//
PageDirectoryPointerEntry = (VOID *) BigPageAddress;
BigPageAddress += SIZE_4KB;
PageDirectoryPointerEntry = (VOID *)BigPageAddress;
BigPageAddress += SIZE_4KB;
//
// Make a PML4 Entry
//
PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;
PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;
PageMapLevel4Entry->Bits.ReadWrite = 1;
PageMapLevel4Entry->Bits.Present = 1;
PageMapLevel4Entry->Bits.Present = 1;
if (Page1GSupport) {
PageDirectory1GEntry = (VOID *) PageDirectoryPointerEntry;
PageDirectory1GEntry = (VOID *)PageDirectoryPointerEntry;
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
if (ToSplitPageTable (PageAddress, SIZE_1GB, StackBase, StackSize, GhcbBase, GhcbSize)) {
Split1GPageTo2M (PageAddress, (UINT64 *) PageDirectory1GEntry, StackBase, StackSize, GhcbBase, GhcbSize);
Split1GPageTo2M (PageAddress, (UINT64 *)PageDirectory1GEntry, StackBase, StackSize, GhcbBase, GhcbSize);
} else {
//
// Fill in the Page Directory entries
//
PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
PageDirectory1GEntry->Bits.ReadWrite = 1;
PageDirectory1GEntry->Bits.Present = 1;
PageDirectory1GEntry->Bits.MustBe1 = 1;
PageDirectory1GEntry->Bits.Present = 1;
PageDirectory1GEntry->Bits.MustBe1 = 1;
}
}
} else {
for ( IndexOfPdpEntries = 0
; IndexOfPdpEntries < (NumberOfPml4EntriesNeeded == 1 ? NumberOfPdpEntriesNeeded : 512)
; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
; IndexOfPdpEntries < (NumberOfPml4EntriesNeeded == 1 ? NumberOfPdpEntriesNeeded : 512)
; IndexOfPdpEntries++, PageDirectoryPointerEntry++)
{
//
// Each Directory Pointer entries points to a page of Page Directory entires.
// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
//
PageDirectoryEntry = (VOID *) BigPageAddress;
BigPageAddress += SIZE_4KB;
PageDirectoryEntry = (VOID *)BigPageAddress;
BigPageAddress += SIZE_4KB;
//
// Fill in a Page Directory Pointer Entries
//
PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
PageDirectoryPointerEntry->Bits.ReadWrite = 1;
PageDirectoryPointerEntry->Bits.Present = 1;
PageDirectoryPointerEntry->Bits.Present = 1;
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {
if (ToSplitPageTable (PageAddress, SIZE_2MB, StackBase, StackSize, GhcbBase, GhcbSize)) {
//
// Need to split this 2M page that covers NULL or stack range.
//
Split2MPageTo4K (PageAddress, (UINT64 *) PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);
Split2MPageTo4K (PageAddress, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, GhcbBase, GhcbSize);
} else {
//
// Fill in the Page Directory entries
//
PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
PageDirectoryEntry->Bits.ReadWrite = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
}
}
}
@ -901,7 +932,7 @@ CreateIdentityMappingPageTables (
//
// Fill with null entry for unused PDPTE
//
ZeroMem (PageDirectoryPointerEntry, (512 - IndexOfPdpEntries) * sizeof(PAGE_MAP_AND_DIRECTORY_POINTER));
ZeroMem (PageDirectoryPointerEntry, (512 - IndexOfPdpEntries) * sizeof (PAGE_MAP_AND_DIRECTORY_POINTER));
}
}
@ -912,7 +943,7 @@ CreateIdentityMappingPageTables (
}
if (Page5LevelSupport) {
Cr4.UintN = AsmReadCr4 ();
Cr4.UintN = AsmReadCr4 ();
Cr4.Bits.LA57 = 1;
AsmWriteCr4 (Cr4.UintN);
//
@ -936,4 +967,3 @@ CreateIdentityMappingPageTables (
return (UINTN)PageMap;
}

215
UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.h
View File

@ -13,38 +13,37 @@ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef _VIRTUAL_MEMORY_H_
#define _VIRTUAL_MEMORY_H_
#define SYS_CODE64_SEL 0x38
#define SYS_CODE64_SEL 0x38
#pragma pack(1)
typedef union {
struct {
UINT32 LimitLow : 16;
UINT32 BaseLow : 16;
UINT32 BaseMid : 8;
UINT32 Type : 4;
UINT32 System : 1;
UINT32 Dpl : 2;
UINT32 Present : 1;
UINT32 LimitHigh : 4;
UINT32 Software : 1;
UINT32 Reserved : 1;
UINT32 DefaultSize : 1;
UINT32 Granularity : 1;
UINT32 BaseHigh : 8;
UINT32 LimitLow : 16;
UINT32 BaseLow : 16;
UINT32 BaseMid : 8;
UINT32 Type : 4;
UINT32 System : 1;
UINT32 Dpl : 2;
UINT32 Present : 1;
UINT32 LimitHigh : 4;
UINT32 Software : 1;
UINT32 Reserved : 1;
UINT32 DefaultSize : 1;
UINT32 Granularity : 1;
UINT32 BaseHigh : 8;
} Bits;
UINT64 Uint64;
UINT64 Uint64;
} IA32_GDT;
typedef struct {
IA32_IDT_GATE_DESCRIPTOR Ia32IdtEntry;
UINT32 Offset32To63;
UINT32 Reserved;
IA32_IDT_GATE_DESCRIPTOR Ia32IdtEntry;
UINT32 Offset32To63;
UINT32 Reserved;
} X64_IDT_GATE_DESCRIPTOR;
//
@ -54,18 +53,18 @@ typedef struct {
typedef union {
struct {
UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Reserved:1; // Reserved
UINT64 MustBeZero:2; // Must Be Zero
UINT64 Available:3; // Available for use by system software
UINT64 PageTableBaseAddress:40; // Page Table Base Address
UINT64 AvabilableHigh:11; // Available for use by system software
UINT64 Nx:1; // No Execute bit
UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Reserved : 1; // Reserved
UINT64 MustBeZero : 2; // Must Be Zero
UINT64 Available : 3; // Available for use by system software
UINT64 PageTableBaseAddress : 40; // Page Table Base Address
UINT64 AvabilableHigh : 11; // Available for use by system software
UINT64 Nx : 1; // No Execute bit
} Bits;
UINT64 Uint64;
} PAGE_MAP_AND_DIRECTORY_POINTER;
@ -75,19 +74,19 @@ typedef union {
//
typedef union {
struct {
UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 PAT:1; //
UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available:3; // Available for use by system software
UINT64 PageTableBaseAddress:40; // Page Table Base Address
UINT64 AvabilableHigh:11; // Available for use by system software
UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 PAT : 1; //
UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available : 3; // Available for use by system software
UINT64 PageTableBaseAddress : 40; // Page Table Base Address
UINT64 AvabilableHigh : 11; // Available for use by system software
UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution
} Bits;
UINT64 Uint64;
} PAGE_TABLE_4K_ENTRY;
@ -97,21 +96,21 @@ typedef union {
//
typedef union {
struct {
UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 MustBe1:1; // Must be 1
UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available:3; // Available for use by system software
UINT64 PAT:1; //
UINT64 MustBeZero:8; // Must be zero;
UINT64 PageTableBaseAddress:31; // Page Table Base Address
UINT64 AvabilableHigh:11; // Available for use by system software
UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 MustBe1 : 1; // Must be 1
UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available : 3; // Available for use by system software
UINT64 PAT : 1; //
UINT64 MustBeZero : 8; // Must be zero;
UINT64 PageTableBaseAddress : 31; // Page Table Base Address
UINT64 AvabilableHigh : 11; // Available for use by system software
UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution
} Bits;
UINT64 Uint64;
} PAGE_TABLE_ENTRY;
@ -121,45 +120,45 @@ typedef union {
//
typedef union {
struct {
UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 MustBe1:1; // Must be 1
UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available:3; // Available for use by system software
UINT64 PAT:1; //
UINT64 MustBeZero:17; // Must be zero;
UINT64 PageTableBaseAddress:22; // Page Table Base Address
UINT64 AvabilableHigh:11; // Available for use by system software
UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User
UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 MustBe1 : 1; // Must be 1
UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available : 3; // Available for use by system software
UINT64 PAT : 1; //
UINT64 MustBeZero : 17; // Must be zero;
UINT64 PageTableBaseAddress : 22; // Page Table Base Address
UINT64 AvabilableHigh : 11; // Available for use by system software
UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution
} Bits;
UINT64 Uint64;
} PAGE_TABLE_1G_ENTRY;
#pragma pack()
#define CR0_WP BIT16
#define CR0_WP BIT16
#define IA32_PG_P BIT0
#define IA32_PG_RW BIT1
#define IA32_PG_PS BIT7
#define IA32_PG_P BIT0
#define IA32_PG_RW BIT1
#define IA32_PG_PS BIT7
#define PAGING_PAE_INDEX_MASK 0x1FF
#define PAGING_PAE_INDEX_MASK 0x1FF
#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
#define PAGING_L1_ADDRESS_SHIFT 12
#define PAGING_L2_ADDRESS_SHIFT 21
#define PAGING_L3_ADDRESS_SHIFT 30
#define PAGING_L4_ADDRESS_SHIFT 39
#define PAGING_L1_ADDRESS_SHIFT 12
#define PAGING_L2_ADDRESS_SHIFT 21
#define PAGING_L3_ADDRESS_SHIFT 30
#define PAGING_L4_ADDRESS_SHIFT 39
#define PAGING_PML4E_NUMBER 4
#define PAGING_PML4E_NUMBER 4
#define PAGE_TABLE_POOL_ALIGNMENT BASE_2MB
#define PAGE_TABLE_POOL_UNIT_SIZE SIZE_2MB
@ -168,9 +167,9 @@ typedef union {
(~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1))
typedef struct {
VOID *NextPool;
UINTN Offset;
UINTN FreePages;
VOID *NextPool;
UINTN Offset;
UINTN FreePages;
} PAGE_TABLE_POOL;
/**
@ -207,12 +206,12 @@ EnableExecuteDisableBit (
**/
VOID
Split2MPageTo4K (
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry2M,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
IN EFI_PHYSICAL_ADDRESS PhysicalAddress,
IN OUT UINT64 *PageEntry2M,
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbSize
);
/**
@ -229,13 +228,12 @@ Split2MPageTo4K (
**/
UINTN
CreateIdentityMappingPageTables (
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbkSize
IN EFI_PHYSICAL_ADDRESS StackBase,
IN UINTN StackSize,
IN EFI_PHYSICAL_ADDRESS GhcbBase,
IN UINTN GhcbkSize
);
/**
Fix up the vector number in the vector code.
@ -247,11 +245,10 @@ CreateIdentityMappingPageTables (
VOID
EFIAPI
AsmVectorFixup (
VOID *VectorBase,
UINT8 VectorNum
VOID *VectorBase,
UINT8 VectorNum
);
/**
Get the information of vector template.
@ -278,7 +275,7 @@ AsmGetVectorTemplatInfo (
**/
VOID
ClearFirst4KPage (
IN VOID *HobStart
IN VOID *HobStart
);
/**
@ -301,8 +298,8 @@ IsNullDetectionEnabled (
**/
VOID
EnablePageTableProtection (
IN UINTN PageTableBase,
IN BOOLEAN Level4Paging
IN UINTN PageTableBase,
IN BOOLEAN Level4Paging
);
/**
@ -324,7 +321,7 @@ EnablePageTableProtection (
**/
VOID *
AllocatePageTableMemory (
IN UINTN Pages
IN UINTN Pages
);
#endif