mirror of https://github.com/acidanthera/audk.git
1. Updated PalCallStatic.s in BaseCacheMaintenanceLib
2. Updated PalCallStatic.s in BaseTimerLibLocalApic git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@467 6f19259b-4bc3-4df7-8a09-765794883524
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@ -49,7 +49,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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<Arch ArchType="IPF">
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<Filename>IpfCache.c</Filename>
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<Filename>Ipf/Cpu.s</Filename>
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<Filename>Ipf/CallPalProc.s</Filename>
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<Filename>Ipf/PalCallStatic.s</Filename>
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</Arch>
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</SourceFiles>
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<Includes>
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@ -1,38 +0,0 @@
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/// @file
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/// Contains an implementation of CallPalProcStatic on Itanium-based
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/// architecture.
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///
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/// Copyright (c) 2006, Intel Corporation
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/// All rights reserved. This program and the accompanying materials
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/// are licensed and made available under the terms and conditions of the BSD License
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/// which accompanies this distribution. The full text of the license may be found at
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/// http://opensource.org/licenses/bsd-license.php
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///
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/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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///
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/// Module Name: CallPalProc.s
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///
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///
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.auto
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.text
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.proc CallPalProcStatic
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.type CallPalProcStatic, @function
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CallPalProcStatic::
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mov r9 = ar.k5
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mov r8 = ip
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add r8 = (PalProcReturn - CallPalProcStatic), r8
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mov r28 = r32
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mov b7 = r9
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mov r29 = r33
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mov r30 = r34
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mov r31 = r35
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mov r32 = b0
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mov b0 = r8
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br.sptk b7
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PalProcReturn:
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mov b0 = r32
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br.ret.sptk.many b0
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.endp CallPalProcStatic
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@ -0,0 +1,48 @@
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/// @file
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/// Contains an implementation of CallPalProcStatic on Itanium-based
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/// architecture.
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///
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/// Copyright (c) 2006, Intel Corporation
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/// All rights reserved. This program and the accompanying materials
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/// are licensed and made available under the terms and conditions of the BSD License
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/// which accompanies this distribution. The full text of the license may be found at
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/// http://opensource.org/licenses/bsd-license.php
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///
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/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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///
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/// Module Name: PalCallStatic.s
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///
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///
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.auto
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.text
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.proc PalCallStatic
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.type PalCallStatic, @function
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.regstk 5, 0, 0, 0
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PalCallStatic::
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cmp.eq p6 = r0, in0
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mov r31 = in4
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mov r8 = ip
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(p6) mov in0 = ar.k5
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add r8 = (PalProcReturn - PalCallStatic), r8
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mov in4 = b0
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mov r30 = in3
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mov r29 = in2
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mov b7 = in0
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mov in3 = psr
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rsm 1 << 14 // Disable interrupts
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mov r28 = in1
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mov in0 = 256
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mov b0 = r8
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br.cond.sptk b7
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PalProcReturn:
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mov psr.l = in3
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cmp.eq p6 = in0, in1 // in1 == PAL_COPY_PAL?
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(p6) cmp.eq p6 = r0, r8 // Status == Success?
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(p6) add in2 = r9, in2
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(p6) mov ar.k5 = in2
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mov b0 = in4
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br.ret.sptk.many b0
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.endp PalCallStatic
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@ -20,7 +20,8 @@ typedef struct {
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} PAL_PROC_RETURN;
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PAL_PROC_RETURN
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CallPalProcStatic (
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PalCallStatic (
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IN CONST VOID *PalEntryPoint,
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IN UINT64 Arg1,
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IN UINT64 Arg2,
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IN UINT64 Arg3,
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@ -41,47 +42,7 @@ InvalidateInstructionCache (
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VOID
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)
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{
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CallPalProcStatic (1, 1, 1, 0);
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}
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/**
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Invalidates a range of instruction cache lines in the cache coherency domain
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of the calling CPU.
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Invalidates the instruction cache lines specified by Address and Length. If
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Address is not aligned on a cache line boundary, then entire instruction
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cache line containing Address is invalidated. If Address + Length is not
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aligned on a cache line boundary, then the entire instruction cache line
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containing Address + Length -1 is invalidated. This function may choose to
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invalidate the entire instruction cache if that is more efficient than
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invalidating the specified range. If Length is 0, the no instruction cache
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lines are invalidated. Address is returned.
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If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
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@param Address The base address of the instruction cache lines to
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invalidate. If the CPU is in a physical addressing mode, then
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Address is a physical address. If the CPU is in a virtual
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addressing mode, then Address is a virtual address.
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@param Length The number of bytes to invalidate from the instruction cache.
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@return Address
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**/
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VOID*
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EFIAPI
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InvalidateInstructionCacheRange (
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IN VOID *Address,
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IN UINTN Length
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)
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{
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ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
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if (Length > 0) {
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InvalidateInstructionCache ();
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}
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return Address;
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PalCallStatic (NULL, 1, 1, 1, 0);
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}
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/**
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@ -100,7 +61,7 @@ WriteBackInvalidateDataCache (
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VOID
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)
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{
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CallPalProcStatic (1, 2, 1, 0);
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PalCallStatic (NULL, 1, 2, 1, 0);
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}
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/**
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@ -160,7 +121,7 @@ WriteBackDataCache (
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VOID
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)
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{
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CallPalProcStatic (1, 2, 0, 0);
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PalCallStatic (NULL, 1, 2, 0, 0);
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}
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/**
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@ -45,7 +45,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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<Filename>x86TimerLib.c</Filename>
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</Arch>
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<Arch ArchType="IPF">
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<Filename>Ipf/CallPalProc.s</Filename>
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<Filename>Ipf/PalCallStatic.s</Filename>
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<Filename>Ipf/ReadItc.s</Filename>
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<Filename>Ipf/IpfTimerLib.c</Filename>
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</Arch>
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@ -1,38 +0,0 @@
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/// @file
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/// Contains an implementation of CallPalProcStatic on Itanium-based
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/// architecture.
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///
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/// Copyright (c) 2006, Intel Corporation
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/// All rights reserved. This program and the accompanying materials
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/// are licensed and made available under the terms and conditions of the BSD License
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/// which accompanies this distribution. The full text of the license may be found at
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/// http://opensource.org/licenses/bsd-license.php
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///
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/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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///
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/// Module Name: CallPalProc.s
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///
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///
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.auto
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.text
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.proc CallPalProcStatic
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.type CallPalProcStatic, @function
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CallPalProcStatic::
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mov r9 = ar.k5
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mov r8 = ip
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add r8 = (PalProcReturn - CallPalProcStatic), r8
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mov r28 = r32
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mov b7 = r9
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mov r29 = r33
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mov r30 = r34
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mov r31 = r35
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mov r32 = b0
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mov b0 = r8
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br.sptk b7
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PalProcReturn:
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mov b0 = r32
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br.ret.sptk.many b0
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.endp CallPalProcStatic
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@ -31,7 +31,8 @@ typedef struct {
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} PAL_PROC_RETURN;
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PAL_PROC_RETURN
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CallPalProcStatic (
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PalCallStatic (
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IN CONST VOID *PalEntryPoint,
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IN UINT64 Arg1,
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IN UINT64 Arg2,
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IN UINT64 Arg3,
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@ -142,11 +143,11 @@ GetPerformanceCounterProperties (
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PAL_PROC_RETURN PalRet;
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UINT64 BaseFrequence;
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PalRet = CallPalProcStatic (13, 0, 0, 0);
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PalRet = PalCallStatic (NULL, 13, 0, 0, 0);
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ASSERT (PalRet.Status == 0);
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BaseFrequence = PalRet.r9;
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PalRet = CallPalProcStatic (14, 0, 0, 0);
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PalRet = PalCallStatic (NULL, 14, 0, 0, 0);
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ASSERT (PalRet.Status == 0);
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*StartValue = 0;
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@ -0,0 +1,48 @@
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/// @file
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/// Contains an implementation of CallPalProcStatic on Itanium-based
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/// architecture.
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///
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/// Copyright (c) 2006, Intel Corporation
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/// All rights reserved. This program and the accompanying materials
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/// are licensed and made available under the terms and conditions of the BSD License
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/// which accompanies this distribution. The full text of the license may be found at
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/// http://opensource.org/licenses/bsd-license.php
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///
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/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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///
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/// Module Name: PalCallStatic.s
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///
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///
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.auto
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.text
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.proc PalCallStatic
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.type PalCallStatic, @function
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.regstk 5, 0, 0, 0
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PalCallStatic::
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cmp.eq p6 = r0, in0
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mov r31 = in4
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mov r8 = ip
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(p6) mov in0 = ar.k5
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add r8 = (PalProcReturn - PalCallStatic), r8
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mov in4 = b0
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mov r30 = in3
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mov r29 = in2
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mov b7 = in0
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mov in3 = psr
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rsm 1 << 14 // Disable interrupts
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mov r28 = in1
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mov in0 = 256
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mov b0 = r8
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br.cond.sptk b7
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PalProcReturn:
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mov psr.l = in3
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cmp.eq p6 = in0, in1 // in1 == PAL_COPY_PAL?
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(p6) cmp.eq p6 = r0, r8 // Status == Success?
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(p6) add in2 = r9, in2
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(p6) mov ar.k5 = in2
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mov b0 = in4
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br.ret.sptk.many b0
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.endp PalCallStatic
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