mirror of https://github.com/acidanthera/audk.git
ArmPkg/Drivers/TimerDxe: Improve Timer initialisation.
- Registering a interrupt handler implicitly enables said interrupt. This is in the UEFI Spec. No need to enable the interrupts a second time. - Make sure the Timer is completely disabled before configuring it. Only enable after configuration is complete. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14433 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1,7 +1,7 @@
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/** @file
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Timer Architecture Protocol driver of the ARM flavor
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Copyright (c) 2011 ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2011-2013 ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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@ -336,6 +336,10 @@ TimerInitialize (
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ASSERT_EFI_ERROR (Status);
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// Disable the timer
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TimerCtrlReg = ArmArchTimerGetTimerCtrlReg ();
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TimerCtrlReg |= ARM_ARCH_TIMER_IMASK;
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TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
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ArmArchTimerSetTimerCtrlReg (TimerCtrlReg);
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Status = TimerDriverSetTimerPeriod (&gTimer, 0);
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ASSERT_EFI_ERROR (Status);
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@ -349,11 +353,6 @@ TimerInitialize (
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Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerIntrNum), TimerInterruptHandler);
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ASSERT_EFI_ERROR (Status);
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// Unmask timer interrupts
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TimerCtrlReg = ArmArchTimerGetTimerCtrlReg ();
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TimerCtrlReg &= ~ARM_ARCH_TIMER_IMASK;
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ArmArchTimerSetTimerCtrlReg (TimerCtrlReg);
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// Set up default timer
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Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
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ASSERT_EFI_ERROR (Status);
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@ -366,11 +365,9 @@ TimerInitialize (
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);
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ASSERT_EFI_ERROR(Status);
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// enable Secure timer interrupts
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Status = gInterrupt->EnableInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerSecIntrNum));
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// enable NonSecure timer interrupts
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Status = gInterrupt->EnableInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerIntrNum));
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// Everything is ready, unmask and enable timer interrupts
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TimerCtrlReg = ARM_ARCH_TIMER_ENABLE;
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ArmArchTimerSetTimerCtrlReg (TimerCtrlReg);
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// Register for an ExitBootServicesEvent
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Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);
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