ArmPkg/Drivers/TimerDxe: Improve Timer initialisation.

- Registering a interrupt handler implicitly enables said interrupt. This
  is in the UEFI Spec. No need to enable the interrupts a second time.
- Make sure the Timer is completely disabled before configuring it. Only
  enable after configuration is complete.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14433 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2013-06-19 18:08:02 +00:00 committed by oliviermartin
parent ec6b73d7a6
commit e703b085f6
1 changed files with 15 additions and 18 deletions

View File

@ -1,7 +1,7 @@
/** @file
Timer Architecture Protocol driver of the ARM flavor
Copyright (c) 2011 ARM Ltd. All rights reserved.<BR>
Copyright (c) 2011-2013 ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@ -336,6 +336,10 @@ TimerInitialize (
ASSERT_EFI_ERROR (Status);
// Disable the timer
TimerCtrlReg = ArmArchTimerGetTimerCtrlReg ();
TimerCtrlReg |= ARM_ARCH_TIMER_IMASK;
TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE;
ArmArchTimerSetTimerCtrlReg (TimerCtrlReg);
Status = TimerDriverSetTimerPeriod (&gTimer, 0);
ASSERT_EFI_ERROR (Status);
@ -349,11 +353,6 @@ TimerInitialize (
Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerIntrNum), TimerInterruptHandler);
ASSERT_EFI_ERROR (Status);
// Unmask timer interrupts
TimerCtrlReg = ArmArchTimerGetTimerCtrlReg ();
TimerCtrlReg &= ~ARM_ARCH_TIMER_IMASK;
ArmArchTimerSetTimerCtrlReg (TimerCtrlReg);
// Set up default timer
Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
ASSERT_EFI_ERROR (Status);
@ -366,11 +365,9 @@ TimerInitialize (
);
ASSERT_EFI_ERROR(Status);
// enable Secure timer interrupts
Status = gInterrupt->EnableInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerSecIntrNum));
// enable NonSecure timer interrupts
Status = gInterrupt->EnableInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerIntrNum));
// Everything is ready, unmask and enable timer interrupts
TimerCtrlReg = ARM_ARCH_TIMER_ENABLE;
ArmArchTimerSetTimerCtrlReg (TimerCtrlReg);
// Register for an ExitBootServicesEvent
Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);