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StandaloneMmPkg: Make StandaloneMmCpu driver architecture independent 

StandaloneMmCpu now can supports more architectures like RISC-V besides
ARM/AARCH64.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: levi.yun <yeoreum.yun@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
This commit is contained in:
Tuan Phan 2023-09-28 14:14:03 -07:00 committed by mergify[bot]
parent 74b5309da9
commit e7a7169446
5 changed files with 46 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
StandaloneMmPkg/Drivers/StandaloneMmCpu/EventHandle.c
View File

@ -3,6 +3,7 @@
Copyright (c) 2016 HP Development Company, L.P.
Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.
Copyright (c) 2021, Linaro Limited
Copyright (c) 2023, Ventana Micro System Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@ -11,8 +12,6 @@
#include <Base.h>
#include <Pi/PiMmCis.h>
#include <Library/ArmSvcLib.h>
#include <Library/ArmLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
@ -22,10 +21,7 @@
#include <Guid/ZeroGuid.h>
#include <Guid/MmramMemoryReserve.h>
#include <IndustryStandard/ArmFfaSvc.h>
#include <IndustryStandard/ArmStdSmc.h>
#include "StandaloneMmCpu.h"
#include <StandaloneMmCpu.h>
EFI_STATUS
EFIAPI
@ -108,7 +104,7 @@ CheckBufferAddr (
}
/**
The PI Standalone MM entry point for the TF-A CPU driver.
The PI Standalone MM entry point for the CPU driver.
@param [in] EventId The event Id.
@param [in] CpuNumber The CPU number.
@ -121,7 +117,7 @@ CheckBufferAddr (
@retval EFI_UNSUPPORTED Operation not supported.
**/
EFI_STATUS
PiMmStandaloneArmTfCpuDriverEntry (
PiMmStandaloneMmCpuDriverEntry (
IN UINTN EventId,
IN UINTN CpuNumber,
IN UINTN NsCommBufferAddr
@ -135,17 +131,6 @@ PiMmStandaloneArmTfCpuDriverEntry (
DEBUG ((DEBUG_INFO, "Received event - 0x%x on cpu %d\n", EventId, CpuNumber));
Status = EFI_SUCCESS;
//
// ARM TF passes SMC FID of the MM_COMMUNICATE interface as the Event ID upon
// receipt of a synchronous MM request. Use the Event ID to distinguish
// between synchronous and asynchronous events.
//
if ((ARM_SMC_ID_MM_COMMUNICATE != EventId) &&
(ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ != EventId))
{
DEBUG ((DEBUG_ERROR, "UnRecognized Event - 0x%x\n", EventId));
return EFI_INVALID_PARAMETER;
}
// Perform parameter validation of NsCommBufferAddr
if (NsCommBufferAddr == (UINTN)NULL) {
@ -177,7 +162,7 @@ PiMmStandaloneArmTfCpuDriverEntry (
}
// X1 contains the VA of the normal world memory accessible from
// S-EL0
// secure world.
CopyMem (GuidedEventContext, (CONST VOID *)NsCommBufferAddr, NsCommBufferSize);
// Stash the pointer to the allocated Event Context for this CPU

22
StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.c
View File

@ -3,6 +3,7 @@
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2016 HP Development Company, L.P.
Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.
Copyright (c) 2023, Ventana Micro System Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@ -10,10 +11,7 @@
#include <Base.h>
#include <Pi/PiMmCis.h>
#include <Library/Arm/StandaloneMmCoreEntryPoint.h>
#include <Library/DebugLib.h>
#include <Library/ArmSvcLib.h>
#include <Library/ArmLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/HobLib.h>
@ -22,7 +20,7 @@
#include <Guid/ZeroGuid.h>
#include <Guid/MmramMemoryReserve.h>
#include "StandaloneMmCpu.h"
#include <StandaloneMmCpu.h>
// GUID to identify HOB with whereabouts of communication buffer with Normal
// World
@ -31,7 +29,7 @@ extern EFI_GUID gEfiStandaloneMmNonSecureBufferGuid;
// GUID to identify HOB where the entry point of this CPU driver will be
// populated to allow the entry point driver to invoke it upon receipt of an
// event
extern EFI_GUID gEfiArmTfCpuDriverEpDescriptorGuid;
extern EFI_GUID gEfiMmCpuDriverEpDescriptorGuid;
//
// Private copy of the MM system table for future use
@ -96,7 +94,7 @@ StandaloneMmCpuInitialize (
IN EFI_MM_SYSTEM_TABLE *SystemTable // not actual systemtable
)
{
ARM_TF_CPU_DRIVER_EP_DESCRIPTOR *CpuDriverEntryPointDesc;
MM_CPU_DRIVER_EP_DESCRIPTOR *CpuDriverEntryPointDesc;
EFI_CONFIGURATION_TABLE *ConfigurationTable;
MP_INFORMATION_HOB_DATA *MpInformationHobData;
EFI_MMRAM_DESCRIPTOR *NsCommBufMmramRange;
@ -133,7 +131,7 @@ StandaloneMmCpuInitialize (
}
// Retrieve the Hoblist from the MMST to extract the details of the NS
// communication buffer that has been reserved by S-EL1/EL3
// communication buffer that has been reserved for StandaloneMmPkg
ConfigurationTable = mMmst->MmConfigurationTable;
for (Index = 0; Index < mMmst->NumberOfTableEntries; Index++) {
if (CompareGuid (&gEfiHobListGuid, &(ConfigurationTable[Index].VendorGuid))) {
@ -154,11 +152,11 @@ StandaloneMmCpuInitialize (
//
Status = GetGuidedHobData (
HobStart,
&gEfiArmTfCpuDriverEpDescriptorGuid,
&gEfiMmCpuDriverEpDescriptorGuid,
(VOID **)&CpuDriverEntryPointDesc
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "ArmTfCpuDriverEpDesc HOB data extraction failed - 0x%x\n", Status));
DEBUG ((DEBUG_ERROR, "MmCpuDriverEpDesc HOB data extraction failed - 0x%x\n", Status));
return Status;
}
@ -166,10 +164,10 @@ StandaloneMmCpuInitialize (
DEBUG ((
DEBUG_INFO,
"Sharing Cpu Driver EP *0x%lx = 0x%lx\n",
(UINTN)CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr,
(UINTN)PiMmStandaloneArmTfCpuDriverEntry
(UINTN)CpuDriverEntryPointDesc->MmCpuDriverEpPtr,
(UINTN)PiMmStandaloneMmCpuDriverEntry
));
*(CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr) = PiMmStandaloneArmTfCpuDriverEntry;
*(CpuDriverEntryPointDesc->MmCpuDriverEpPtr) = PiMmStandaloneMmCpuDriverEntry;
// Find the descriptor that contains the whereabouts of the buffer for
// communication with the Normal world.

9
StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.inf
View File

@ -1,9 +1,10 @@
## @file
# Standalone MM CPU driver for ARM Standard Platforms
# Standalone MM CPU driver
#
# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2016 HP Development Company, L.P.
# Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.
# Copyright (c) 2023, Ventana Micro System Inc. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
@ -19,18 +20,14 @@
[Sources]
StandaloneMmCpu.c
StandaloneMmCpu.h
EventHandle.c
[Packages]
ArmPkg/ArmPkg.dec
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
StandaloneMmPkg/StandaloneMmPkg.dec
[LibraryClasses]
ArmLib
ArmSvcLib
BaseMemoryLib
DebugLib
HobLib
@ -46,7 +43,7 @@
gZeroGuid
gMpInformationHobGuid
gEfiStandaloneMmNonSecureBufferGuid
gEfiArmTfCpuDriverEpDescriptorGuid
gEfiMmCpuDriverEpDescriptorGuid
[Depex]
TRUE

22
StandaloneMmPkg/Drivers/StandaloneMmCpu/StandaloneMmCpu.h → StandaloneMmPkg/Include/StandaloneMmCpu.h
View File

@ -7,14 +7,26 @@
**/
#ifndef _ARM_TF_CPU_DRIVER_H_
#define _ARM_TF_CPU_DRIVER_H_
#ifndef MM_CPU_DRIVER_H_
#define MM_CPU_DRIVER_H_
#include <Protocol/MmCommunication2.h>
#include <Protocol/MmConfiguration.h>
#include <Protocol/MmCpu.h>
#include <Guid/MpInformation.h>
typedef
EFI_STATUS
(*PI_MM_CPU_DRIVER_ENTRYPOINT) (
IN UINTN EventId,
IN UINTN CpuNumber,
IN UINTN NsCommBufferAddr
);
typedef struct {
PI_MM_CPU_DRIVER_ENTRYPOINT *MmCpuDriverEpPtr;
} MM_CPU_DRIVER_EP_DESCRIPTOR;
//
// CPU driver initialization specific declarations
//
@ -35,7 +47,7 @@ extern MP_INFORMATION_HOB_DATA *mMpInformationHobData;
extern EFI_MM_CONFIGURATION_PROTOCOL mMmConfig;
/**
The PI Standalone MM entry point for the TF-A CPU driver.
The PI Standalone MM entry point for the CPU driver.
@param [in] EventId The event Id.
@param [in] CpuNumber The CPU number.
@ -48,7 +60,7 @@ extern EFI_MM_CONFIGURATION_PROTOCOL mMmConfig;
@retval EFI_UNSUPPORTED Operation not supported.
**/
EFI_STATUS
PiMmStandaloneArmTfCpuDriverEntry (
PiMmStandaloneMmCpuDriverEntry (
IN UINTN EventId,
IN UINTN CpuNumber,
IN UINTN NsCommBufferAddr
@ -79,4 +91,4 @@ PiMmCpuTpFwRootMmiHandler (
IN OUT UINTN *CommBufferSize OPTIONAL
);
#endif
#endif /* MM_CPU_DRIVER_H_ */

2
StandaloneMmPkg/StandaloneMmPkg.dec
View File

@ -46,7 +46,7 @@
gEfiMmPeiMmramMemoryReserveGuid = { 0x0703f912, 0xbf8d, 0x4e2a, { 0xbe, 0x07, 0xab, 0x27, 0x25, 0x25, 0xc5, 0x92 }}
gEfiStandaloneMmNonSecureBufferGuid = { 0xf00497e3, 0xbfa2, 0x41a1, { 0x9d, 0x29, 0x54, 0xc2, 0xe9, 0x37, 0x21, 0xc5 }}
gEfiArmTfCpuDriverEpDescriptorGuid = { 0x6ecbd5a1, 0xc0f8, 0x4702, { 0x83, 0x01, 0x4f, 0xc2, 0xc5, 0x47, 0x0a, 0x51 }}
gEfiMmCpuDriverEpDescriptorGuid = { 0x6ecbd5a1, 0xc0f8, 0x4702, { 0x83, 0x01, 0x4f, 0xc2, 0xc5, 0x47, 0x0a, 0x51 }}
[PcdsFixedAtBuild, PcdsPatchableInModule]
## Maximum permitted encapsulation levels of sections in a firmware volume,