mirror of https://github.com/acidanthera/audk.git
StandaloneMmPkg: Make StandaloneMmCpu driver architecture independent
StandaloneMmCpu now can supports more architectures like RISC-V besides ARM/AARCH64. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: levi.yun <yeoreum.yun@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
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e7a7169446
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@ -3,6 +3,7 @@
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Copyright (c) 2016 HP Development Company, L.P.
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Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.
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Copyright (c) 2021, Linaro Limited
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Copyright (c) 2023, Ventana Micro System Inc. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -11,8 +12,6 @@
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#include <Base.h>
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#include <Pi/PiMmCis.h>
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#include <Library/ArmSvcLib.h>
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#include <Library/ArmLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/HobLib.h>
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@ -22,10 +21,7 @@
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#include <Guid/ZeroGuid.h>
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#include <Guid/MmramMemoryReserve.h>
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#include <IndustryStandard/ArmFfaSvc.h>
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#include <IndustryStandard/ArmStdSmc.h>
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#include "StandaloneMmCpu.h"
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#include <StandaloneMmCpu.h>
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EFI_STATUS
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EFIAPI
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@ -108,7 +104,7 @@ CheckBufferAddr (
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}
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/**
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The PI Standalone MM entry point for the TF-A CPU driver.
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The PI Standalone MM entry point for the CPU driver.
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@param [in] EventId The event Id.
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@param [in] CpuNumber The CPU number.
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@ -121,7 +117,7 @@ CheckBufferAddr (
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@retval EFI_UNSUPPORTED Operation not supported.
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**/
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EFI_STATUS
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PiMmStandaloneArmTfCpuDriverEntry (
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PiMmStandaloneMmCpuDriverEntry (
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IN UINTN EventId,
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IN UINTN CpuNumber,
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IN UINTN NsCommBufferAddr
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@ -135,17 +131,6 @@ PiMmStandaloneArmTfCpuDriverEntry (
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DEBUG ((DEBUG_INFO, "Received event - 0x%x on cpu %d\n", EventId, CpuNumber));
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Status = EFI_SUCCESS;
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//
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// ARM TF passes SMC FID of the MM_COMMUNICATE interface as the Event ID upon
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// receipt of a synchronous MM request. Use the Event ID to distinguish
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// between synchronous and asynchronous events.
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//
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if ((ARM_SMC_ID_MM_COMMUNICATE != EventId) &&
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(ARM_SVC_ID_FFA_MSG_SEND_DIRECT_REQ != EventId))
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{
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DEBUG ((DEBUG_ERROR, "UnRecognized Event - 0x%x\n", EventId));
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return EFI_INVALID_PARAMETER;
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}
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// Perform parameter validation of NsCommBufferAddr
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if (NsCommBufferAddr == (UINTN)NULL) {
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@ -177,7 +162,7 @@ PiMmStandaloneArmTfCpuDriverEntry (
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}
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// X1 contains the VA of the normal world memory accessible from
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// S-EL0
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// secure world.
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CopyMem (GuidedEventContext, (CONST VOID *)NsCommBufferAddr, NsCommBufferSize);
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// Stash the pointer to the allocated Event Context for this CPU
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@ -3,6 +3,7 @@
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2016 HP Development Company, L.P.
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Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.
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Copyright (c) 2023, Ventana Micro System Inc. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -10,10 +11,7 @@
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#include <Base.h>
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#include <Pi/PiMmCis.h>
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#include <Library/Arm/StandaloneMmCoreEntryPoint.h>
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#include <Library/DebugLib.h>
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#include <Library/ArmSvcLib.h>
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#include <Library/ArmLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/HobLib.h>
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@ -22,7 +20,7 @@
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#include <Guid/ZeroGuid.h>
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#include <Guid/MmramMemoryReserve.h>
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#include "StandaloneMmCpu.h"
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#include <StandaloneMmCpu.h>
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// GUID to identify HOB with whereabouts of communication buffer with Normal
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// World
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@ -31,7 +29,7 @@ extern EFI_GUID gEfiStandaloneMmNonSecureBufferGuid;
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// GUID to identify HOB where the entry point of this CPU driver will be
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// populated to allow the entry point driver to invoke it upon receipt of an
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// event
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extern EFI_GUID gEfiArmTfCpuDriverEpDescriptorGuid;
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extern EFI_GUID gEfiMmCpuDriverEpDescriptorGuid;
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//
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// Private copy of the MM system table for future use
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@ -96,17 +94,17 @@ StandaloneMmCpuInitialize (
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IN EFI_MM_SYSTEM_TABLE *SystemTable // not actual systemtable
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)
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{
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ARM_TF_CPU_DRIVER_EP_DESCRIPTOR *CpuDriverEntryPointDesc;
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EFI_CONFIGURATION_TABLE *ConfigurationTable;
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MP_INFORMATION_HOB_DATA *MpInformationHobData;
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EFI_MMRAM_DESCRIPTOR *NsCommBufMmramRange;
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EFI_STATUS Status;
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EFI_HANDLE DispatchHandle;
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UINT32 MpInfoSize;
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UINTN Index;
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UINTN ArraySize;
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VOID *HobStart;
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EFI_MMRAM_HOB_DESCRIPTOR_BLOCK *MmramRangesHob;
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MM_CPU_DRIVER_EP_DESCRIPTOR *CpuDriverEntryPointDesc;
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EFI_CONFIGURATION_TABLE *ConfigurationTable;
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MP_INFORMATION_HOB_DATA *MpInformationHobData;
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EFI_MMRAM_DESCRIPTOR *NsCommBufMmramRange;
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EFI_STATUS Status;
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EFI_HANDLE DispatchHandle;
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UINT32 MpInfoSize;
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UINTN Index;
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UINTN ArraySize;
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VOID *HobStart;
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EFI_MMRAM_HOB_DESCRIPTOR_BLOCK *MmramRangesHob;
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ASSERT (SystemTable != NULL);
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mMmst = SystemTable;
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@ -133,7 +131,7 @@ StandaloneMmCpuInitialize (
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}
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// Retrieve the Hoblist from the MMST to extract the details of the NS
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// communication buffer that has been reserved by S-EL1/EL3
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// communication buffer that has been reserved for StandaloneMmPkg
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ConfigurationTable = mMmst->MmConfigurationTable;
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for (Index = 0; Index < mMmst->NumberOfTableEntries; Index++) {
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if (CompareGuid (&gEfiHobListGuid, &(ConfigurationTable[Index].VendorGuid))) {
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@ -154,11 +152,11 @@ StandaloneMmCpuInitialize (
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//
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Status = GetGuidedHobData (
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HobStart,
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&gEfiArmTfCpuDriverEpDescriptorGuid,
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&gEfiMmCpuDriverEpDescriptorGuid,
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(VOID **)&CpuDriverEntryPointDesc
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "ArmTfCpuDriverEpDesc HOB data extraction failed - 0x%x\n", Status));
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DEBUG ((DEBUG_ERROR, "MmCpuDriverEpDesc HOB data extraction failed - 0x%x\n", Status));
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return Status;
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}
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DEBUG ((
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DEBUG_INFO,
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"Sharing Cpu Driver EP *0x%lx = 0x%lx\n",
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(UINTN)CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr,
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(UINTN)PiMmStandaloneArmTfCpuDriverEntry
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(UINTN)CpuDriverEntryPointDesc->MmCpuDriverEpPtr,
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(UINTN)PiMmStandaloneMmCpuDriverEntry
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));
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*(CpuDriverEntryPointDesc->ArmTfCpuDriverEpPtr) = PiMmStandaloneArmTfCpuDriverEntry;
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*(CpuDriverEntryPointDesc->MmCpuDriverEpPtr) = PiMmStandaloneMmCpuDriverEntry;
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// Find the descriptor that contains the whereabouts of the buffer for
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// communication with the Normal world.
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## @file
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# Standalone MM CPU driver for ARM Standard Platforms
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# Standalone MM CPU driver
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#
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# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
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# Copyright (c) 2016 HP Development Company, L.P.
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# Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.
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# Copyright (c) 2023, Ventana Micro System Inc. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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##
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@ -19,18 +20,14 @@
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[Sources]
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StandaloneMmCpu.c
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StandaloneMmCpu.h
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EventHandle.c
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[Packages]
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ArmPkg/ArmPkg.dec
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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StandaloneMmPkg/StandaloneMmPkg.dec
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[LibraryClasses]
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ArmLib
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ArmSvcLib
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BaseMemoryLib
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DebugLib
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HobLib
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gZeroGuid
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gMpInformationHobGuid
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gEfiStandaloneMmNonSecureBufferGuid
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gEfiArmTfCpuDriverEpDescriptorGuid
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gEfiMmCpuDriverEpDescriptorGuid
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[Depex]
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TRUE
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**/
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#ifndef _ARM_TF_CPU_DRIVER_H_
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#define _ARM_TF_CPU_DRIVER_H_
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#ifndef MM_CPU_DRIVER_H_
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#define MM_CPU_DRIVER_H_
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#include <Protocol/MmCommunication2.h>
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#include <Protocol/MmConfiguration.h>
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#include <Protocol/MmCpu.h>
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#include <Guid/MpInformation.h>
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typedef
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EFI_STATUS
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(*PI_MM_CPU_DRIVER_ENTRYPOINT) (
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IN UINTN EventId,
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IN UINTN CpuNumber,
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IN UINTN NsCommBufferAddr
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);
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typedef struct {
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PI_MM_CPU_DRIVER_ENTRYPOINT *MmCpuDriverEpPtr;
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} MM_CPU_DRIVER_EP_DESCRIPTOR;
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//
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// CPU driver initialization specific declarations
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//
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extern EFI_MM_CONFIGURATION_PROTOCOL mMmConfig;
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/**
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The PI Standalone MM entry point for the TF-A CPU driver.
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The PI Standalone MM entry point for the CPU driver.
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@param [in] EventId The event Id.
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@param [in] CpuNumber The CPU number.
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@retval EFI_UNSUPPORTED Operation not supported.
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**/
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EFI_STATUS
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PiMmStandaloneArmTfCpuDriverEntry (
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PiMmStandaloneMmCpuDriverEntry (
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IN UINTN EventId,
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IN UINTN CpuNumber,
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IN UINTN NsCommBufferAddr
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IN OUT UINTN *CommBufferSize OPTIONAL
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);
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#endif
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#endif /* MM_CPU_DRIVER_H_ */
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gEfiMmPeiMmramMemoryReserveGuid = { 0x0703f912, 0xbf8d, 0x4e2a, { 0xbe, 0x07, 0xab, 0x27, 0x25, 0x25, 0xc5, 0x92 }}
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gEfiStandaloneMmNonSecureBufferGuid = { 0xf00497e3, 0xbfa2, 0x41a1, { 0x9d, 0x29, 0x54, 0xc2, 0xe9, 0x37, 0x21, 0xc5 }}
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gEfiArmTfCpuDriverEpDescriptorGuid = { 0x6ecbd5a1, 0xc0f8, 0x4702, { 0x83, 0x01, 0x4f, 0xc2, 0xc5, 0x47, 0x0a, 0x51 }}
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gEfiMmCpuDriverEpDescriptorGuid = { 0x6ecbd5a1, 0xc0f8, 0x4702, { 0x83, 0x01, 0x4f, 0xc2, 0xc5, 0x47, 0x0a, 0x51 }}
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[PcdsFixedAtBuild, PcdsPatchableInModule]
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## Maximum permitted encapsulation levels of sections in a firmware volume,
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