ArmPkg: Replaced gArmTokenSpaceGuid.PcdGicNumInterrupts by ArmGicGetMaxNumInterrupts()

The maximum number of interrupts can be retrieve through the GIC distributor.

Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13244 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/ArmPkg.dec

@@ -2,7 +2,7 @@
 # ARM processor package.
 #
 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
 #
 #    This program and the accompanying materials
 #    are licensed and made available under the terms and conditions of the BSD License
@@ -82,7 +82,6 @@
   #
   gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
-  gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
   gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025
 
   #

ArmPkg/Drivers/PL390Gic/PL390Gic.c

@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
 *  
 *  This program and the accompanying materials                          
 *  are licensed and made available under the terms and conditions of the BSD License         
@@ -17,6 +17,15 @@
 #include <Library/ArmGicLib.h>
 #include <Library/PcdLib.h>
 
+UINTN
+EFIAPI
+ArmGicGetMaxNumInterrupts (
+  IN  INTN          GicDistributorBase
+  )
+{
+  return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);
+}
+
 VOID
 EFIAPI
 ArmGicSendSgiTo (

ArmPkg/Drivers/PL390Gic/PL390GicDxe.c

@@ -3,6 +3,7 @@
 Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
 Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
 Portions copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR> 
+
 This program and the accompanying materials                          
 are licensed and made available under the terms and conditions of the BSD License         
 which accompanies this distribution.  The full text of the license may be found at        
@@ -26,6 +27,7 @@ Abstract:
 #include <Library/BaseLib.h>
 #include <Library/DebugLib.h>
 #include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
 #include <Library/UefiBootServicesTableLib.h>
 #include <Library/UefiLib.h>
 #include <Library/PcdLib.h>
@@ -35,18 +37,6 @@ Abstract:
 #include <Protocol/Cpu.h>
 #include <Protocol/HardwareInterrupt.h>
 
-// number of 32-bit registers needed to represent those interrupts as a bit
-// (used for enable set, enable clear, pending set, pending clear, and active regs)
-#define ARM_GIC_NUM_REG_PER_INT_BITS   (PcdGet32(PcdGicNumInterrupts) / 32)
-
-// number of 32-bit registers needed to represent those interrupts as two bits
-// (used for configuration reg)
-#define ARM_GIC_NUM_REG_PER_INT_CFG    (PcdGet32(PcdGicNumInterrupts) / 16)
-
-// number of 32-bit registers needed to represent interrupts as 8-bit priority field
-// (used for priority regs)
-#define ARM_GIC_NUM_REG_PER_INT_BYTES  (PcdGet32(PcdGicNumInterrupts) / 4)
-
 #define ARM_GIC_DEFAULT_PRIORITY  0x80
 
 extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol;
@@ -56,7 +46,10 @@ extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol;
 //
 EFI_EVENT EfiExitBootServicesEvent      = (EFI_EVENT)NULL;
 
-HARDWARE_INTERRUPT_HANDLER  gRegisteredInterruptHandlers[FixedPcdGet32(PcdGicNumInterrupts)];
+// Maximum Number of Interrupts
+UINTN mGicNumInterrupts                 = 0;
+
+HARDWARE_INTERRUPT_HANDLER  *gRegisteredInterruptHandlers = NULL;
 
 /**
   Register Handler for the specified interrupt source.
@@ -77,7 +70,7 @@ RegisterInterruptSource (
   IN HARDWARE_INTERRUPT_HANDLER         Handler
   )
 {
-  if (Source > PcdGet32(PcdGicNumInterrupts)) {
+  if (Source > mGicNumInterrupts) {
     ASSERT(FALSE);
     return EFI_UNSUPPORTED;
   }
@@ -120,7 +113,7 @@ EnableInterruptSource (
   UINT32    RegOffset;
   UINTN     RegShift;
   
-  if (Source > PcdGet32(PcdGicNumInterrupts)) {
+  if (Source > mGicNumInterrupts) {
     ASSERT(FALSE);
     return EFI_UNSUPPORTED;
   }
@@ -155,7 +148,7 @@ DisableInterruptSource (
   UINT32    RegOffset;
   UINTN     RegShift;
   
-  if (Source > PcdGet32(PcdGicNumInterrupts)) {
+  if (Source > mGicNumInterrupts) {
     ASSERT(FALSE);
     return EFI_UNSUPPORTED;
   }
@@ -192,7 +185,7 @@ GetInterruptSourceState (
   UINT32    RegOffset;
   UINTN     RegShift;
   
-  if (Source > PcdGet32(PcdGicNumInterrupts)) {
+  if (Source > mGicNumInterrupts) {
     ASSERT(FALSE);
     return EFI_UNSUPPORTED;
   }
@@ -228,7 +221,7 @@ EndOfInterrupt (
   IN HARDWARE_INTERRUPT_SOURCE          Source
   )
 {
-  if (Source > PcdGet32(PcdGicNumInterrupts)) {
+  if (Source > mGicNumInterrupts) {
     ASSERT(FALSE);
     return EFI_UNSUPPORTED;
   }
@@ -261,7 +254,7 @@ IrqInterruptHandler (
   GicInterrupt = MmioRead32 (PcdGet32(PcdGicInterruptInterfaceBase) + ARM_GIC_ICCIAR);
 
   // Special Interrupts (ID1020-ID1023) have an Interrupt ID greater than the number of interrupt (ie: Spurious interrupt).
-  if (GicInterrupt >= PcdGet32(PcdGicNumInterrupts)) {
+  if (GicInterrupt >= mGicNumInterrupts) {
     // The special interrupt do not need to be acknowledge
     return;
   }
@@ -312,11 +305,11 @@ ExitBootServicesEvent (
   UINTN    Index;
   
   // Acknowledge all pending interrupts
-  for (Index = 0; Index < PcdGet32(PcdGicNumInterrupts); Index++) {
+  for (Index = 0; Index < mGicNumInterrupts; Index++) {
     DisableInterruptSource (&gHardwareInterruptProtocol, Index);
   }
 
-  for (Index = 0; Index < PcdGet32(PcdGicNumInterrupts); Index++) {
+  for (Index = 0; Index < mGicNumInterrupts; Index++) {
     EndOfInterrupt (&gHardwareInterruptProtocol, Index);
   }
 
@@ -354,7 +347,9 @@ InterruptDxeInitialize (
   // Make sure the Interrupt Controller Protocol is not already installed in the system.
   ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
 
-  for (Index = 0; Index < PcdGet32(PcdGicNumInterrupts); Index++) {
+  mGicNumInterrupts = ArmGicGetMaxNumInterrupts (PcdGet32(PcdGicDistributorBase));
+
+  for (Index = 0; Index < mGicNumInterrupts; Index++) {
     DisableInterruptSource (&gHardwareInterruptProtocol, Index);
     
     // Set Priority 
@@ -368,7 +363,7 @@ InterruptDxeInitialize (
   }
 
   // Configure interrupts for cpu 0
-  for (Index = 0; Index < ARM_GIC_NUM_REG_PER_INT_BYTES; Index++) {
+  for (Index = 0; Index < (mGicNumInterrupts / 4); Index++) {
     MmioWrite32 (PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDIPTR + (Index*4), 0x01010101);
   }
 
@@ -384,7 +379,8 @@ InterruptDxeInitialize (
   // Enable gic distributor
   MmioWrite32 (PcdGet32(PcdGicDistributorBase) + ARM_GIC_ICDDCR, 0x1);
   
-  ZeroMem (&gRegisteredInterruptHandlers, sizeof (gRegisteredInterruptHandlers));
+  // Initialize the array for the Interrupt Handlers
+  gRegisteredInterruptHandlers = (HARDWARE_INTERRUPT_HANDLER*)AllocateZeroPool (sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);
   
   Status = gBS->InstallMultipleProtocolInterfaces (
                   &gHardwareInterruptHandle,

ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf

@@ -1,6 +1,8 @@
 #/** @file
 #  
 #  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+#  Copyright (c) 2012, ARM Ltd. All rights reserved.<BR>
+#
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD License
 #  which accompanies this distribution.  The full text of the license may be found at
@@ -22,6 +24,7 @@
 
 
 [Sources.common]
+  PL390Gic.c
   PL390GicDxe.c
 
 [Packages]
@@ -35,6 +38,7 @@
   UefiBootServicesTableLib
   DebugLib
   PrintLib
+  MemoryAllocationLib
   UefiDriverEntryPoint
   IoLib
 
@@ -45,7 +49,6 @@
 [FixedPcd.common]
   gArmTokenSpaceGuid.PcdGicDistributorBase
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
-  gArmTokenSpaceGuid.PcdGicNumInterrupts
 
 [Depex]
   gEfiCpuArchProtocolGuid

ArmPkg/Drivers/PL390Gic/PL390GicSec.c

@@ -52,7 +52,7 @@ ArmGicSetupNonSecure (
   // Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt).
   if (IS_PRIMARY_CORE(MpId)) {
     // Ensure all GIC interrupts are Non-Secure
-    for (Index = 0; Index < (PcdGet32(PcdGicNumInterrupts) / 32); Index++) {
+    for (Index = 0; Index < (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32); Index++) {
       MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);
     }
   } else {
@@ -80,7 +80,7 @@ ArmGicSetSecureInterrupts (
   UINT32 InterruptStatus;
 
   // We must not have more interrupts defined by the mask than the number of available interrupts
-  ASSERT(GicSecureInterruptMaskSize <= (PcdGet32(PcdGicNumInterrupts) / 32));
+  ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32));
 
   // Set all the interrupts defined by the mask as Secure
   for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) {

ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf

@@ -34,7 +34,6 @@
   PcdLib
 
 [FixedPcd.common]
-  gArmTokenSpaceGuid.PcdGicNumInterrupts
   gArmTokenSpaceGuid.PcdGicSgiIntId
 
   gArmTokenSpaceGuid.PcdArmPrimaryCoreMask

ArmPkg/Include/Library/ArmGicLib.h

@@ -102,6 +102,12 @@ ArmGicEnableDistributor (
   IN  INTN          GicDistributorBase
   );
 
+UINTN
+EFIAPI
+ArmGicGetMaxNumInterrupts (
+  IN  INTN          GicDistributorBase
+  );
+
 VOID
 EFIAPI
 ArmGicSendSgiTo (

ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc

@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2011, ARM Limited. All rights reserved.
+#  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
 #  
 #  This program and the accompanying materials                          
 #  are licensed and made available under the terms and conditions of the BSD License         
@@ -130,7 +130,6 @@
   #
   gArmTokenSpaceGuid.PcdGicDistributorBase|0x10041000
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x10040000
-  gArmTokenSpaceGuid.PcdGicNumInterrupts|96
 
   #
   # ARM L2x0 PCDs

ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc

@@ -127,7 +127,6 @@
   #
   gArmTokenSpaceGuid.PcdGicDistributorBase|0x1F001000
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x1F000100
-  gArmTokenSpaceGuid.PcdGicNumInterrupts|96
 
   #
   # ARM L2x0 PCDs