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Ring3: Summarized all known problems for AARCH64.
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038a03aa34
commit
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@ -92,6 +92,7 @@
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UefiCpuPkg/UefiCpuPkg.dec
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UefiCpuPkg/UefiCpuPkg.dec
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OvmfPkg/OvmfPkg.dec
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OvmfPkg/OvmfPkg.dec
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ArmPkg/ArmPkg.dec
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ArmPkg/ArmPkg.dec
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ArmVirtPkg/ArmVirtPkg.dec
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[LibraryClasses]
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[LibraryClasses]
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BaseMemoryLib
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BaseMemoryLib
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@ -69,8 +69,22 @@ call:
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// (x4) &CoreSp
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// (x4) &CoreSp
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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ASM_FUNC(ArmCallRing3)
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ASM_FUNC(ArmCallRing3)
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// Save FP and LR on Core Stack.
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// Save registers.
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stp x29, x30, [sp, #-0x10]!
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sub sp, sp, #0x100
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stp q8, q9, [sp, #0xe0]
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stp q10, q11, [sp, #0xc0]
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stp q12, q13, [sp, #0xa0]
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stp q14, q15, [sp, #0x80]
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stp xzr, x16, [sp, #0x70]
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stp x17, x18, [sp, #0x60]
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stp x19, x20, [sp, #0x50]
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stp x21, x22, [sp, #0x40]
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stp x23, x24, [sp, #0x30]
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stp x25, x26, [sp, #0x20]
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stp x27, x28, [sp, #0x10]
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stp x29, x30, [sp]
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// Disable interrupts.
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// Disable interrupts.
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msr daifset, #0xf
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msr daifset, #0xf
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isb
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isb
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@ -112,9 +126,21 @@ ASM_FUNC(ReturnToCore)
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msr far_el1, xzr
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msr far_el1, xzr
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// Switch to Core Stack.
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// Switch to Core Stack.
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mov sp, x1
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mov sp, x1
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// Restore Stack.
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// Restore registers and Stack.
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ldp x29, x30, [sp]
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ldp q8, q9, [sp, #0xe0]
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add sp, sp, #0x10
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ldp q10, q11, [sp, #0xc0]
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ldp q12, q13, [sp, #0xa0]
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ldp q14, q15, [sp, #0x80]
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ldr x16, [sp, #0x78]
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ldp x17, x18, [sp, #0x60]
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ldp x19, x20, [sp, #0x50]
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ldp x21, x22, [sp, #0x40]
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ldp x23, x24, [sp, #0x30]
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ldp x25, x26, [sp, #0x20]
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ldp x27, x28, [sp, #0x10]
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ldp x29, x30, [sp]
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add sp, sp, #0x100
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// Enable interrupts.
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// Enable interrupts.
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msr daifclr, #0xf
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msr daifclr, #0xf
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isb
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isb
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@ -6,12 +6,14 @@
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**/
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**/
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#include <Chipset/AArch64.h>
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#include <Chipset/AArch64.h>
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#include <Guid/EarlyPL011BaseAddress.h>
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#include <Library/ArmLib.h>
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#include <Library/ArmLib.h>
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#include <Library/DefaultExceptionHandlerLib.h>
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#include <Library/DefaultExceptionHandlerLib.h>
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#include "DxeMain.h"
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#include "DxeMain.h"
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STATIC UINTN mCoreSp;
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STATIC UINTN mCoreSp;
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UINTN gUartBaseAddress;
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EFI_STATUS
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EFI_STATUS
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EFIAPI
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EFIAPI
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@ -70,6 +72,12 @@ SysCallBootService (
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DisableSMAP ();
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DisableSMAP ();
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CopyMem ((VOID *)((UINTN)Physical + sizeof (UINTN)), (VOID *)UserRsp, 8 * sizeof (UINTN));
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CopyMem ((VOID *)((UINTN)Physical + sizeof (UINTN)), (VOID *)UserRsp, 8 * sizeof (UINTN));
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SetUefiImageMemoryAttributes (
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gUartBaseAddress,
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EFI_PAGE_SIZE,
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EFI_MEMORY_XP
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);
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EnableSMAP ();
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EnableSMAP ();
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Status = CallBootService (
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Status = CallBootService (
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@ -78,6 +86,12 @@ SysCallBootService (
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(RING3_STACK *)(UINTN)Physical
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(RING3_STACK *)(UINTN)Physical
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);
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);
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SetUefiImageMemoryAttributes (
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gUartBaseAddress,
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EFI_PAGE_SIZE,
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EFI_MEMORY_XP | EFI_MEMORY_USER
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);
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CoreFreePages (Physical, EFI_SIZE_TO_PAGES (9 * sizeof (UINTN)));
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CoreFreePages (Physical, EFI_SIZE_TO_PAGES (9 * sizeof (UINTN)));
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return Status;
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return Status;
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@ -86,10 +100,17 @@ SysCallBootService (
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VOID
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VOID
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EFIAPI
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EFIAPI
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InitializeMsr (
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InitializeMsr (
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VOID
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IN OUT EFI_CONFIGURATION_TABLE *Table,
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IN UINTN NumberOfEntries
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)
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)
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{
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{
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UINTN Tcr;
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UINTN Tcr;
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UINTN Index;
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EARLY_PL011_BASE_ADDRESS *UartBase;
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EFI_PHYSICAL_ADDRESS Physical;
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EFI_HOB_GENERIC_HEADER *Ring3Hob;
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UINT16 HobLength;
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EFI_STATUS Status;
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//
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//
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// If HCR_EL2.NV is 1 and the current Exception level is EL1,
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// If HCR_EL2.NV is 1 and the current Exception level is EL1,
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// then EL1 read accesses to the CurrentEL register return a value of 0x2 in bits[3:2].
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// then EL1 read accesses to the CurrentEL register return a value of 0x2 in bits[3:2].
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@ -103,6 +124,49 @@ InitializeMsr (
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Tcr = ArmGetTCR ();
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Tcr = ArmGetTCR ();
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Tcr |= TCR_EL1_HPD0_MASK | TCR_EL1_HPD1_MASK;
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Tcr |= TCR_EL1_HPD0_MASK | TCR_EL1_HPD1_MASK;
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ArmSetTCR (Tcr);
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ArmSetTCR (Tcr);
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//
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// Problem 1: Uart is memory maped.
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//
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for (Index = 0; Index < NumberOfEntries; ++Index) {
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if (CompareGuid (&gEfiHobListGuid, &(Table[Index].VendorGuid))) {
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UartBase = GET_GUID_HOB_DATA (Table[Index].VendorTable);
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gUartBaseAddress = UartBase->DebugAddress;
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//
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// Copy Hob into Ring3.
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//
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Status = CoreAllocatePages (
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AllocateAnyPages,
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EfiRing3MemoryType,
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1,
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&Physical
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Core: Failed to allocate memory for Ring3Hob.\n"));
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ASSERT (FALSE);
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}
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DEBUG ((DEBUG_ERROR, "UartBaseAddress = %p.\n", gUartBaseAddress));
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Ring3Hob = (EFI_HOB_GENERIC_HEADER *)(UINTN)Physical;
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HobLength = (UINT16)((sizeof (EFI_HOB_GUID_TYPE) + sizeof (EARLY_PL011_BASE_ADDRESS) + 0x7) & (~0x7));
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Ring3Hob->HobType = EFI_HOB_TYPE_GUID_EXTENSION;
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Ring3Hob->HobLength = HobLength;
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Ring3Hob->Reserved = 0;
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CopyGuid (&((EFI_HOB_GUID_TYPE *)Ring3Hob)->Name, &gEarlyPL011BaseAddressGuid);
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Ring3Hob = (EFI_HOB_GENERIC_HEADER *)((UINTN)Ring3Hob + HobLength);
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Ring3Hob->HobType = EFI_HOB_TYPE_END_OF_HOB_LIST;
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Ring3Hob->HobLength = sizeof (EFI_HOB_GENERIC_HEADER);
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Ring3Hob->Reserved = 0;
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Table[Index].VendorTable = (VOID *)(UINTN)Physical;
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UartBase = GET_GUID_HOB_DATA (Table[Index].VendorTable);
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UartBase->DebugAddress = gUartBaseAddress;
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}
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}
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if (ArmHasPan ()) {
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if (ArmHasPan ()) {
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//
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//
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@ -10,7 +10,8 @@
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VOID
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VOID
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EFIAPI
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EFIAPI
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InitializeMsr (
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InitializeMsr (
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VOID
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IN OUT EFI_CONFIGURATION_TABLE *Table,
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IN UINTN NumberOfEntries
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)
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)
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{
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{
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@ -12,7 +12,8 @@
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VOID
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VOID
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EFIAPI
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EFIAPI
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InitializeMsr (
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InitializeMsr (
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VOID
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IN OUT EFI_CONFIGURATION_TABLE *Table,
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IN UINTN NumberOfEntries
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)
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)
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{
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{
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UINT64 Msr;
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UINT64 Msr;
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@ -18,7 +18,8 @@ VOID *gRing3Interfaces;
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VOID
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VOID
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EFIAPI
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EFIAPI
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InitializeMsr (
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InitializeMsr (
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VOID
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IN OUT EFI_CONFIGURATION_TABLE *Table,
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IN UINTN NumberOfEntries
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);
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);
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EFI_STATUS
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EFI_STATUS
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@ -141,7 +142,10 @@ InitializeRing3 (
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SetUefiImageMemoryAttributes ((UINTN)gRing3CallStackBase, SizeOfStack, EFI_MEMORY_XP | EFI_MEMORY_USER);
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SetUefiImageMemoryAttributes ((UINTN)gRing3CallStackBase, SizeOfStack, EFI_MEMORY_XP | EFI_MEMORY_USER);
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DEBUG ((DEBUG_ERROR, "Core: gRing3CallStackTop = %p\n", gRing3CallStackTop));
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DEBUG ((DEBUG_ERROR, "Core: gRing3CallStackTop = %p\n", gRing3CallStackTop));
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InitializeMsr ();
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InitializeMsr (
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gRing3Data->SystemTable.ConfigurationTable,
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gRing3Data->SystemTable.NumberOfTableEntries
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);
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return Status;
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return Status;
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}
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}
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@ -13,6 +13,10 @@ EFI_FILE_PROTOCOL mRing3FileProtocol;
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EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *mRing3SimpleFileSystemPointer;
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EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *mRing3SimpleFileSystemPointer;
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#if defined (MDE_CPU_AARCH64)
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extern UINTN gUartBaseAddress;
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#endif
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typedef struct {
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typedef struct {
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EFI_FILE_PROTOCOL Protocol;
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EFI_FILE_PROTOCOL Protocol;
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EFI_FILE_PROTOCOL *Ring3File;
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EFI_FILE_PROTOCOL *Ring3File;
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@ -69,8 +73,16 @@ GoToRing3 (
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EFI_MEMORY_XP | EFI_MEMORY_USER
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EFI_MEMORY_XP | EFI_MEMORY_USER
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);
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);
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}
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}
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#elif defined (MDE_CPU_AARCH64)
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//
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// Necessary fix for DEBUG printings.
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//
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SetUefiImageMemoryAttributes (
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gUartBaseAddress,
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EFI_PAGE_SIZE,
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EFI_MEMORY_XP | EFI_MEMORY_USER
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);
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#endif
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#endif
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Status = CallRing3 (Input);
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Status = CallRing3 (Input);
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#if defined (MDE_CPU_X64) || defined (MDE_CPU_IA32)
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#if defined (MDE_CPU_X64) || defined (MDE_CPU_IA32)
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@ -81,6 +93,21 @@ GoToRing3 (
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EFI_MEMORY_XP
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EFI_MEMORY_XP
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);
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);
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}
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}
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#elif defined (MDE_CPU_AARCH64)
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//
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// Problem 2: Uart memory maped page is not allocated at the very beginnig
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// and can be used for translation table later.
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//
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DisableSMAP ();
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//
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// Problem 3: QEMU ramdomly breaks GP registers' context.
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//
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SetUefiImageMemoryAttributes (
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gUartBaseAddress,
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EFI_PAGE_SIZE,
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EFI_MEMORY_XP
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);
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EnableSMAP ();
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#endif
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#endif
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CoreFreePages (Ring3Pages, PagesNumber);
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CoreFreePages (Ring3Pages, PagesNumber);
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@ -12,7 +12,8 @@
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VOID
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VOID
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EFIAPI
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EFIAPI
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InitializeMsr (
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InitializeMsr (
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VOID
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IN OUT EFI_CONFIGURATION_TABLE *Table,
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IN UINTN NumberOfEntries
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)
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)
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{
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{
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UINT64 Msr;
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UINT64 Msr;
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