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MdePkg/PciSegmentLib: Fix typo in function header comments
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Ruiyu Ni
parent
5f5bdf4ab5
commit
ebdde8ff26
@ -23,7 +23,7 @@
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access method. Modules will typically use the PCI Segment Library for its PCI configuration
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accesses when PCI Segments other than Segment #0 must be accessed.
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Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -345,8 +345,7 @@ PciSegmentBitFieldAnd8 (
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/**
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Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
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bitwise OR, and writes the result back to the bit field in the
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8-bit port.
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bitwise OR, and writes the result back to the bit field in the 8-bit port.
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Reads the 8-bit PCI configuration register specified by Address, performs a
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bitwise AND followed by a bitwise OR between the read result and
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@ -431,11 +430,10 @@ PciSegmentWrite16 (
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a 16-bit value.
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Reads the 16-bit PCI configuration register specified by Address, performs a
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bitwise OR between the read result and the value specified by
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OrData, and writes the result to the 16-bit PCI configuration register
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specified by Address. The value written to the PCI configuration register is
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returned. This function must guarantee that all PCI read and write operations
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are serialized.
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bitwise OR between the read result and the value specified by OrData, and
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writes the result to the 16-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned. This function
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must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@ -573,9 +571,15 @@ PciSegmentBitFieldWrite16 (
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);
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/**
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Reads the 16-bit PCI configuration register specified by Address,
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performs a bitwise OR between the read result and the value specified by OrData,
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and writes the result to the 16-bit PCI configuration register specified by Address.
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Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
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the result back to the bit field in the 16-bit port.
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Reads the 16-bit PCI configuration register specified by Address, performs a
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bitwise OR between the read result and the value specified by
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OrData, and writes the result to the 16-bit PCI configuration register
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specified by Address. The value written to the PCI configuration register is
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returned. This function must guarantee that all PCI read and write operations
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are serialized. Extra left bits in OrData are stripped.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@ -604,31 +608,31 @@ PciSegmentBitFieldOr16 (
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);
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/**
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Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
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and writes the result back to the bit field in the 16-bit port.
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Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
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AND, writes the result back to the bit field in the 16-bit register.
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Reads the 16-bit PCI configuration register specified by Address,
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performs a bitwise OR between the read result and the value specified by OrData,
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and writes the result to the 16-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are serialized.
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Extra left bits in OrData are stripped.
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Reads the 16-bit PCI configuration register specified by Address, performs a
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bitwise AND between the read result and the value specified by AndData, and
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writes the result to the 16-bit PCI configuration register specified by
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Address. The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are
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serialized. Extra left bits in AndData are stripped.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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If StartBit is greater than 7, then ASSERT().
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If EndBit is greater than 7, then ASSERT().
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If StartBit is greater than 15, then ASSERT().
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If EndBit is greater than 15, then ASSERT().
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If EndBit is less than StartBit, then ASSERT().
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If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param StartBit The ordinal of the least significant bit in the bit field.
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The ordinal of the least significant bit in a byte is bit 0.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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The ordinal of the most significant bit in a byte is bit 7.
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@param AndData The value to AND with the read value from the PCI configuration register.
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Range 0..15.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@return The value written back to the PCI configuration register.
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**/
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UINT16
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@ -919,7 +923,7 @@ PciSegmentBitFieldOr32 (
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If EndBit is less than StartBit, then ASSERT().
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If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address PCI configuration register to write.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..31.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@ -2,7 +2,7 @@
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PCI Segment Library that layers on top of the PCI Library which only
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supports segment 0 PCI configuration access.
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Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are
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licensed and made available under the terms and conditions of
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the BSD License which accompanies this distribution. The full
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@ -75,7 +75,7 @@ PciSegmentRegisterForRuntimeAccess (
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@return The 8-bit PCI configuration register specified by Address.
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@ -99,7 +99,7 @@ PciSegmentRead8 (
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Value The value to write.
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@return The value written to the PCI configuration register.
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@ -128,7 +128,7 @@ PciSegmentWrite8 (
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param OrData The value to OR with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@ -154,7 +154,7 @@ PciSegmentOr8 (
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This function must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@ -183,7 +183,7 @@ PciSegmentAnd8 (
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If any reserved bits in Address are set, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the PCI configuration register.
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@ -213,7 +213,7 @@ PciSegmentAndThenOr8 (
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If EndBit is greater than 7, then ASSERT().
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If EndBit is less than StartBit, then ASSERT().
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@param Address The PCI configuration register to read.
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@param Address PCI configuration register to read.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..7.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@ -247,12 +247,12 @@ PciSegmentBitFieldRead8 (
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If EndBit is less than StartBit, then ASSERT().
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If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..7.
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@param EndBit The ordinal of the most significant bit in the bit field.
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Range 0..7.
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@param Value The new value of the bit field.
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@param Value New value of the bit field.
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@return The value written back to the PCI configuration register.
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@ -289,7 +289,7 @@ PciSegmentBitFieldWrite8 (
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If EndBit is less than StartBit, then ASSERT().
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If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..7.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@ -331,7 +331,7 @@ PciSegmentBitFieldOr8 (
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If EndBit is less than StartBit, then ASSERT().
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If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..7.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@ -358,8 +358,7 @@ PciSegmentBitFieldAnd8 (
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/**
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Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
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bitwise OR, and writes the result back to the bit field in the
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8-bit port.
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bitwise OR, and writes the result back to the bit field in the 8-bit port.
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Reads the 8-bit PCI configuration register specified by Address, performs a
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bitwise AND followed by a bitwise OR between the read result and
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@ -376,7 +375,7 @@ PciSegmentBitFieldAnd8 (
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If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..7.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@ -412,7 +411,7 @@ PciSegmentBitFieldAndThenOr8 (
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@return The 16-bit PCI configuration register specified by Address.
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@ -437,7 +436,7 @@ PciSegmentRead16 (
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Value The value to write.
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@return The parameter of Value.
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@ -460,16 +459,15 @@ PciSegmentWrite16 (
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a 16-bit value.
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Reads the 16-bit PCI configuration register specified by Address, performs a
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bitwise OR between the read result and the value specified by
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OrData, and writes the result to the 16-bit PCI configuration register
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specified by Address. The value written to the PCI configuration register is
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returned. This function must guarantee that all PCI read and write operations
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are serialized.
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bitwise OR between the read result and the value specified by OrData, and
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writes the result to the 16-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned. This function
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must guarantee that all PCI read and write operations are serialized.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function and
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@param Address Address that encodes the PCI Segment, Bus, Device, Function and
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Register.
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@param OrData The value to OR with the PCI configuration register.
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@ -498,7 +496,7 @@ PciSegmentOr16 (
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@ -528,7 +526,7 @@ PciSegmentAnd16 (
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param AndData The value to AND with the PCI configuration register.
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@param OrData The value to OR with the PCI configuration register.
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@ -559,7 +557,7 @@ PciSegmentAndThenOr16 (
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If EndBit is greater than 15, then ASSERT().
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If EndBit is less than StartBit, then ASSERT().
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@param Address The PCI configuration register to read.
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@param Address PCI configuration register to read.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@ -594,12 +592,12 @@ PciSegmentBitFieldRead16 (
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If EndBit is less than StartBit, then ASSERT().
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If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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Range 0..15.
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@param Value The new value of the bit field.
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@param Value New value of the bit field.
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@return The value written back to the PCI configuration register.
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@ -620,9 +618,15 @@ PciSegmentBitFieldWrite16 (
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}
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/**
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Reads the 16-bit PCI configuration register specified by Address,
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performs a bitwise OR between the read result and the value specified by OrData,
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and writes the result to the 16-bit PCI configuration register specified by Address.
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Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
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the result back to the bit field in the 16-bit port.
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Reads the 16-bit PCI configuration register specified by Address, performs a
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bitwise OR between the read result and the value specified by
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OrData, and writes the result to the 16-bit PCI configuration register
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specified by Address. The value written to the PCI configuration register is
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returned. This function must guarantee that all PCI read and write operations
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are serialized. Extra left bits in OrData are stripped.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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@ -631,7 +635,7 @@ PciSegmentBitFieldWrite16 (
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If EndBit is less than StartBit, then ASSERT().
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If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@ -657,31 +661,31 @@ PciSegmentBitFieldOr16 (
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}
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/**
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Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
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and writes the result back to the bit field in the 16-bit port.
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Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
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AND, writes the result back to the bit field in the 16-bit register.
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Reads the 16-bit PCI configuration register specified by Address,
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performs a bitwise OR between the read result and the value specified by OrData,
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and writes the result to the 16-bit PCI configuration register specified by Address.
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The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are serialized.
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Extra left bits in OrData are stripped.
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Reads the 16-bit PCI configuration register specified by Address, performs a
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bitwise AND between the read result and the value specified by AndData, and
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writes the result to the 16-bit PCI configuration register specified by
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Address. The value written to the PCI configuration register is returned.
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This function must guarantee that all PCI read and write operations are
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serialized. Extra left bits in AndData are stripped.
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 16-bit boundary, then ASSERT().
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If StartBit is greater than 7, then ASSERT().
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If EndBit is greater than 7, then ASSERT().
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If StartBit is greater than 15, then ASSERT().
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If EndBit is greater than 15, then ASSERT().
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If EndBit is less than StartBit, then ASSERT().
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If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param StartBit The ordinal of the least significant bit in the bit field.
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The ordinal of the least significant bit in a byte is bit 0.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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The ordinal of the most significant bit in a byte is bit 7.
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@param AndData The value to AND with the read value from the PCI configuration register.
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Range 0..15.
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@param AndData The value to AND with the PCI configuration register.
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@return The value written to the PCI configuration register.
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@return The value written back to the PCI configuration register.
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**/
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UINT16
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@ -719,7 +723,7 @@ PciSegmentBitFieldAnd16 (
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If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
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@param Address The PCI configuration register to write.
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@param Address PCI configuration register to write.
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@param StartBit The ordinal of the least significant bit in the bit field.
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Range 0..15.
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@param EndBit The ordinal of the most significant bit in the bit field.
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@ -755,7 +759,7 @@ PciSegmentBitFieldAndThenOr16 (
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 32-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@return The 32-bit PCI configuration register specified by Address.
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@ -780,7 +784,7 @@ PciSegmentRead32 (
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If any reserved bits in Address are set, then ASSERT().
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If Address is not aligned on a 32-bit boundary, then ASSERT().
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@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
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@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@return The parameter of Value.
|
||||
@ -810,7 +814,7 @@ PciSegmentWrite32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -838,7 +842,7 @@ PciSegmentOr32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -868,7 +872,7 @@ PciSegmentAnd32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@ -899,7 +903,7 @@ PciSegmentAndThenOr32 (
|
||||
If EndBit is greater than 31, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to read.
|
||||
@param Address PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -934,12 +938,12 @@ PciSegmentBitFieldRead32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param Value The new value of the bit field.
|
||||
@param Value New value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@ -976,7 +980,7 @@ PciSegmentBitFieldWrite32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1018,7 +1022,7 @@ PciSegmentBitFieldOr32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1063,7 +1067,7 @@ PciSegmentBitFieldAnd32 (
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1105,10 +1109,10 @@ PciSegmentBitFieldAndThenOr32 (
|
||||
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
|
||||
If Size > 0 and Buffer is NULL, then ASSERT().
|
||||
|
||||
@param StartAddress The starting address that encodes the PCI Segment, Bus, Device,
|
||||
@param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
|
||||
Function and Register.
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer receiving the data read.
|
||||
@param Size Size in bytes of the transfer.
|
||||
@param Buffer Pointer to a buffer receiving the data read.
|
||||
|
||||
@return Size
|
||||
|
||||
@ -1203,10 +1207,10 @@ PciSegmentReadBuffer (
|
||||
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
|
||||
If Size > 0 and Buffer is NULL, then ASSERT().
|
||||
|
||||
@param StartAddress The starting address that encodes the PCI Segment, Bus, Device,
|
||||
@param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
|
||||
Function and Register.
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer containing the data to write.
|
||||
@param Size Size in bytes of the transfer.
|
||||
@param Buffer Pointer to a buffer containing the data to write.
|
||||
|
||||
@return The parameter of Size.
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/** @file
|
||||
PCI Segment Library implementation using PCI CFG2 PPI.
|
||||
|
||||
Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials are
|
||||
licensed and made available under the terms and conditions of
|
||||
the BSD License which accompanies this distribution. The full
|
||||
@ -168,7 +168,7 @@ PeiPciSegmentLibPciCfg2WriteWorker (
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
|
||||
@retval RETURN_SUCCESS The PCI device was registered for runtime access.
|
||||
@ -198,8 +198,7 @@ PciSegmentRegisterForRuntimeAccess (
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function,
|
||||
and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
|
||||
@return The 8-bit PCI configuration register specified by Address.
|
||||
|
||||
@ -223,7 +222,7 @@ PciSegmentRead8 (
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -252,7 +251,7 @@ PciSegmentWrite8 (
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -278,7 +277,7 @@ PciSegmentOr8 (
|
||||
This function must guarantee that all PCI read and write operations are serialized.
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -307,7 +306,7 @@ PciSegmentAnd8 (
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@ -337,7 +336,7 @@ PciSegmentAndThenOr8 (
|
||||
If EndBit is greater than 7, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to read.
|
||||
@param Address PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -371,12 +370,12 @@ PciSegmentBitFieldRead8 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param Value The new value of the bit field.
|
||||
@param Value New value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@ -413,7 +412,7 @@ PciSegmentBitFieldWrite8 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -455,7 +454,7 @@ PciSegmentBitFieldOr8 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -482,8 +481,7 @@ PciSegmentBitFieldAnd8 (
|
||||
|
||||
/**
|
||||
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
|
||||
bitwise OR, and writes the result back to the bit field in the
|
||||
8-bit port.
|
||||
bitwise OR, and writes the result back to the bit field in the 8-bit port.
|
||||
|
||||
Reads the 8-bit PCI configuration register specified by Address, performs a
|
||||
bitwise AND followed by a bitwise OR between the read result and
|
||||
@ -500,7 +498,7 @@ PciSegmentBitFieldAnd8 (
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -536,7 +534,7 @@ PciSegmentBitFieldAndThenOr8 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
|
||||
@return The 16-bit PCI configuration register specified by Address.
|
||||
|
||||
@ -561,7 +559,7 @@ PciSegmentRead16 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@return The parameter of Value.
|
||||
@ -584,16 +582,15 @@ PciSegmentWrite16 (
|
||||
a 16-bit value.
|
||||
|
||||
Reads the 16-bit PCI configuration register specified by Address, performs a
|
||||
bitwise OR between the read result and the value specified by
|
||||
OrData, and writes the result to the 16-bit PCI configuration register
|
||||
specified by Address. The value written to the PCI configuration register is
|
||||
returned. This function must guarantee that all PCI read and write operations
|
||||
are serialized.
|
||||
bitwise OR between the read result and the value specified by OrData, and
|
||||
writes the result to the 16-bit PCI configuration register specified by Address.
|
||||
The value written to the PCI configuration register is returned. This function
|
||||
must guarantee that all PCI read and write operations are serialized.
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function and
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function and
|
||||
Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@ -622,7 +619,7 @@ PciSegmentOr16 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -652,7 +649,7 @@ PciSegmentAnd16 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@ -683,7 +680,7 @@ PciSegmentAndThenOr16 (
|
||||
If EndBit is greater than 15, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to read.
|
||||
@param Address PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -718,12 +715,12 @@ PciSegmentBitFieldRead16 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param Value The new value of the bit field.
|
||||
@param Value New value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@ -744,9 +741,15 @@ PciSegmentBitFieldWrite16 (
|
||||
}
|
||||
|
||||
/**
|
||||
Reads the 16-bit PCI configuration register specified by Address,
|
||||
performs a bitwise OR between the read result and the value specified by OrData,
|
||||
and writes the result to the 16-bit PCI configuration register specified by Address.
|
||||
Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
|
||||
the result back to the bit field in the 16-bit port.
|
||||
|
||||
Reads the 16-bit PCI configuration register specified by Address, performs a
|
||||
bitwise OR between the read result and the value specified by
|
||||
OrData, and writes the result to the 16-bit PCI configuration register
|
||||
specified by Address. The value written to the PCI configuration register is
|
||||
returned. This function must guarantee that all PCI read and write operations
|
||||
are serialized. Extra left bits in OrData are stripped.
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
@ -755,7 +758,7 @@ PciSegmentBitFieldWrite16 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -781,31 +784,31 @@ PciSegmentBitFieldOr16 (
|
||||
}
|
||||
|
||||
/**
|
||||
Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
|
||||
and writes the result back to the bit field in the 16-bit port.
|
||||
Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
|
||||
AND, writes the result back to the bit field in the 16-bit register.
|
||||
|
||||
Reads the 16-bit PCI configuration register specified by Address,
|
||||
performs a bitwise OR between the read result and the value specified by OrData,
|
||||
and writes the result to the 16-bit PCI configuration register specified by Address.
|
||||
The value written to the PCI configuration register is returned.
|
||||
This function must guarantee that all PCI read and write operations are serialized.
|
||||
Extra left bits in OrData are stripped.
|
||||
Reads the 16-bit PCI configuration register specified by Address, performs a
|
||||
bitwise AND between the read result and the value specified by AndData, and
|
||||
writes the result to the 16-bit PCI configuration register specified by
|
||||
Address. The value written to the PCI configuration register is returned.
|
||||
This function must guarantee that all PCI read and write operations are
|
||||
serialized. Extra left bits in AndData are stripped.
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
If StartBit is greater than 7, then ASSERT().
|
||||
If EndBit is greater than 7, then ASSERT().
|
||||
If StartBit is greater than 15, then ASSERT().
|
||||
If EndBit is greater than 15, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
The ordinal of the least significant bit in a byte is bit 0.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
The ordinal of the most significant bit in a byte is bit 7.
|
||||
@param AndData The value to AND with the read value from the PCI configuration register.
|
||||
Range 0..15.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT16
|
||||
@ -843,7 +846,7 @@ PciSegmentBitFieldAnd16 (
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -879,8 +882,7 @@ PciSegmentBitFieldAndThenOr16 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function,
|
||||
and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
|
||||
@return The 32-bit PCI configuration register specified by Address.
|
||||
|
||||
@ -905,8 +907,7 @@ PciSegmentRead32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device,
|
||||
Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@return The parameter of Value.
|
||||
@ -936,7 +937,7 @@ PciSegmentWrite32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -964,8 +965,7 @@ PciSegmentOr32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function,
|
||||
and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -995,8 +995,7 @@ PciSegmentAnd32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function,
|
||||
and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@ -1027,7 +1026,7 @@ PciSegmentAndThenOr32 (
|
||||
If EndBit is greater than 31, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to read.
|
||||
@param Address PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1062,12 +1061,12 @@ PciSegmentBitFieldRead32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param Value The new value of the bit field.
|
||||
@param Value New value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@ -1104,7 +1103,7 @@ PciSegmentBitFieldWrite32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1146,7 +1145,7 @@ PciSegmentBitFieldOr32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1191,7 +1190,7 @@ PciSegmentBitFieldAnd32 (
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1233,10 +1232,10 @@ PciSegmentBitFieldAndThenOr32 (
|
||||
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
|
||||
If Size > 0 and Buffer is NULL, then ASSERT().
|
||||
|
||||
@param StartAddress The starting address that encodes the PCI Segment, Bus,
|
||||
Device, Function and Register.
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer receiving the data read.
|
||||
@param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
|
||||
Function and Register.
|
||||
@param Size Size in bytes of the transfer.
|
||||
@param Buffer Pointer to a buffer receiving the data read.
|
||||
|
||||
@return Size
|
||||
|
||||
@ -1332,10 +1331,10 @@ PciSegmentReadBuffer (
|
||||
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
|
||||
If Size > 0 and Buffer is NULL, then ASSERT().
|
||||
|
||||
@param StartAddress The starting address that encodes the PCI Segment, Bus,
|
||||
Device, Function and Register.
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer containing the data to write.
|
||||
@param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
|
||||
Function and Register.
|
||||
@param Size Size in bytes of the transfer.
|
||||
@param Buffer Pointer to a buffer containing the data to write.
|
||||
|
||||
@return The parameter of Size.
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/** @file
|
||||
PCI Segment Library implementation using PCI Root Bridge I/O Protocol.
|
||||
|
||||
Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials are
|
||||
licensed and made available under the terms and conditions of
|
||||
the BSD License which accompanies this distribution. The full
|
||||
@ -246,7 +246,7 @@ DxePciSegmentLibPciRootBridgeIoWriteWorker (
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Bus, Device, Function and
|
||||
@param Address Address that encodes the PCI Bus, Device, Function and
|
||||
Register.
|
||||
|
||||
@retval RETURN_SUCCESS The PCI device was registered for runtime access.
|
||||
@ -276,7 +276,7 @@ PciSegmentRegisterForRuntimeAccess (
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
|
||||
@return The 8-bit PCI configuration register specified by Address.
|
||||
|
||||
@ -300,7 +300,7 @@ PciSegmentRead8 (
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -329,7 +329,7 @@ PciSegmentWrite8 (
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -355,7 +355,7 @@ PciSegmentOr8 (
|
||||
This function must guarantee that all PCI read and write operations are serialized.
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -384,7 +384,7 @@ PciSegmentAnd8 (
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@ -414,7 +414,7 @@ PciSegmentAndThenOr8 (
|
||||
If EndBit is greater than 7, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to read.
|
||||
@param Address PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -448,12 +448,12 @@ PciSegmentBitFieldRead8 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param Value The new value of the bit field.
|
||||
@param Value New value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@ -490,7 +490,7 @@ PciSegmentBitFieldWrite8 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -532,7 +532,7 @@ PciSegmentBitFieldOr8 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -559,8 +559,7 @@ PciSegmentBitFieldAnd8 (
|
||||
|
||||
/**
|
||||
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
|
||||
bitwise OR, and writes the result back to the bit field in the
|
||||
8-bit port.
|
||||
bitwise OR, and writes the result back to the bit field in the 8-bit port.
|
||||
|
||||
Reads the 8-bit PCI configuration register specified by Address, performs a
|
||||
bitwise AND followed by a bitwise OR between the read result and
|
||||
@ -577,7 +576,7 @@ PciSegmentBitFieldAnd8 (
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..7.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -613,7 +612,7 @@ PciSegmentBitFieldAndThenOr8 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
|
||||
@return The 16-bit PCI configuration register specified by Address.
|
||||
|
||||
@ -638,7 +637,7 @@ PciSegmentRead16 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@return The parameter of Value.
|
||||
@ -661,16 +660,15 @@ PciSegmentWrite16 (
|
||||
a 16-bit value.
|
||||
|
||||
Reads the 16-bit PCI configuration register specified by Address, performs a
|
||||
bitwise OR between the read result and the value specified by
|
||||
OrData, and writes the result to the 16-bit PCI configuration register
|
||||
specified by Address. The value written to the PCI configuration register is
|
||||
returned. This function must guarantee that all PCI read and write operations
|
||||
are serialized.
|
||||
bitwise OR between the read result and the value specified by OrData, and
|
||||
writes the result to the 16-bit PCI configuration register specified by Address.
|
||||
The value written to the PCI configuration register is returned. This function
|
||||
must guarantee that all PCI read and write operations are serialized.
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function and
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function and
|
||||
Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@ -699,7 +697,7 @@ PciSegmentOr16 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -729,7 +727,7 @@ PciSegmentAnd16 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@ -760,7 +758,7 @@ PciSegmentAndThenOr16 (
|
||||
If EndBit is greater than 15, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to read.
|
||||
@param Address PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -795,12 +793,12 @@ PciSegmentBitFieldRead16 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param Value The new value of the bit field.
|
||||
@param Value New value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@ -821,9 +819,15 @@ PciSegmentBitFieldWrite16 (
|
||||
}
|
||||
|
||||
/**
|
||||
Reads the 16-bit PCI configuration register specified by Address,
|
||||
performs a bitwise OR between the read result and the value specified by OrData,
|
||||
and writes the result to the 16-bit PCI configuration register specified by Address.
|
||||
Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, writes
|
||||
the result back to the bit field in the 16-bit port.
|
||||
|
||||
Reads the 16-bit PCI configuration register specified by Address, performs a
|
||||
bitwise OR between the read result and the value specified by
|
||||
OrData, and writes the result to the 16-bit PCI configuration register
|
||||
specified by Address. The value written to the PCI configuration register is
|
||||
returned. This function must guarantee that all PCI read and write operations
|
||||
are serialized. Extra left bits in OrData are stripped.
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
@ -832,7 +836,7 @@ PciSegmentBitFieldWrite16 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -858,31 +862,31 @@ PciSegmentBitFieldOr16 (
|
||||
}
|
||||
|
||||
/**
|
||||
Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
|
||||
and writes the result back to the bit field in the 16-bit port.
|
||||
Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
|
||||
AND, writes the result back to the bit field in the 16-bit register.
|
||||
|
||||
Reads the 16-bit PCI configuration register specified by Address,
|
||||
performs a bitwise OR between the read result and the value specified by OrData,
|
||||
and writes the result to the 16-bit PCI configuration register specified by Address.
|
||||
The value written to the PCI configuration register is returned.
|
||||
This function must guarantee that all PCI read and write operations are serialized.
|
||||
Extra left bits in OrData are stripped.
|
||||
Reads the 16-bit PCI configuration register specified by Address, performs a
|
||||
bitwise AND between the read result and the value specified by AndData, and
|
||||
writes the result to the 16-bit PCI configuration register specified by
|
||||
Address. The value written to the PCI configuration register is returned.
|
||||
This function must guarantee that all PCI read and write operations are
|
||||
serialized. Extra left bits in AndData are stripped.
|
||||
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 16-bit boundary, then ASSERT().
|
||||
If StartBit is greater than 7, then ASSERT().
|
||||
If EndBit is greater than 7, then ASSERT().
|
||||
If StartBit is greater than 15, then ASSERT().
|
||||
If EndBit is greater than 15, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
The ordinal of the least significant bit in a byte is bit 0.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
The ordinal of the most significant bit in a byte is bit 7.
|
||||
@param AndData The value to AND with the read value from the PCI configuration register.
|
||||
Range 0..15.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
**/
|
||||
UINT16
|
||||
@ -920,7 +924,7 @@ PciSegmentBitFieldAnd16 (
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..15.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -956,7 +960,7 @@ PciSegmentBitFieldAndThenOr16 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
|
||||
@return The 32-bit PCI configuration register specified by Address.
|
||||
|
||||
@ -981,7 +985,7 @@ PciSegmentRead32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Value The value to write.
|
||||
|
||||
@return The parameter of Value.
|
||||
@ -1011,7 +1015,7 @@ PciSegmentWrite32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -1039,7 +1043,7 @@ PciSegmentOr32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
|
||||
@return The value written to the PCI configuration register.
|
||||
@ -1069,7 +1073,7 @@ PciSegmentAnd32 (
|
||||
If any reserved bits in Address are set, then ASSERT().
|
||||
If Address is not aligned on a 32-bit boundary, then ASSERT().
|
||||
|
||||
@param Address The address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param AndData The value to AND with the PCI configuration register.
|
||||
@param OrData The value to OR with the PCI configuration register.
|
||||
|
||||
@ -1100,7 +1104,7 @@ PciSegmentAndThenOr32 (
|
||||
If EndBit is greater than 31, then ASSERT().
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to read.
|
||||
@param Address PCI configuration register to read.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1135,12 +1139,12 @@ PciSegmentBitFieldRead32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param Value The new value of the bit field.
|
||||
@param Value New value of the bit field.
|
||||
|
||||
@return The value written back to the PCI configuration register.
|
||||
|
||||
@ -1177,7 +1181,7 @@ PciSegmentBitFieldWrite32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1219,7 +1223,7 @@ PciSegmentBitFieldOr32 (
|
||||
If EndBit is less than StartBit, then ASSERT().
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1264,7 +1268,7 @@ PciSegmentBitFieldAnd32 (
|
||||
If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
|
||||
|
||||
@param Address The PCI configuration register to write.
|
||||
@param Address PCI configuration register to write.
|
||||
@param StartBit The ordinal of the least significant bit in the bit field.
|
||||
Range 0..31.
|
||||
@param EndBit The ordinal of the most significant bit in the bit field.
|
||||
@ -1306,10 +1310,10 @@ PciSegmentBitFieldAndThenOr32 (
|
||||
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
|
||||
If Size > 0 and Buffer is NULL, then ASSERT().
|
||||
|
||||
@param StartAddress The starting address that encodes the PCI Segment, Bus, Device,
|
||||
@param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
|
||||
Function and Register.
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer receiving the data read.
|
||||
@param Size Size in bytes of the transfer.
|
||||
@param Buffer Pointer to a buffer receiving the data read.
|
||||
|
||||
@return Size
|
||||
|
||||
@ -1404,10 +1408,10 @@ PciSegmentReadBuffer (
|
||||
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
|
||||
If Size > 0 and Buffer is NULL, then ASSERT().
|
||||
|
||||
@param StartAddress The starting address that encodes the PCI Segment, Bus, Device,
|
||||
@param StartAddress Starting address that encodes the PCI Segment, Bus, Device,
|
||||
Function and Register.
|
||||
@param Size The size in bytes of the transfer.
|
||||
@param Buffer The pointer to a buffer containing the data to write.
|
||||
@param Size Size in bytes of the transfer.
|
||||
@param Buffer Pointer to a buffer containing the data to write.
|
||||
|
||||
@return The parameter of Size.
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user