mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/CpuMpPei: Add CodeSegment and DataSegment fields
Added CodeSegment and DataSegment fields in MP_CPU_EXCHANGE_INFO. They are set to the values of current BSP's CS and DS. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
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@ -455,6 +455,8 @@ WakeUpAP (
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ExchangeInfo->PmodeOffset = PeiCpuMpData->AddressMap.PModeEntryOffset;
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ExchangeInfo->PmodeOffset = PeiCpuMpData->AddressMap.PModeEntryOffset;
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ExchangeInfo->LmodeOffset = PeiCpuMpData->AddressMap.LModeEntryOffset;
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ExchangeInfo->LmodeOffset = PeiCpuMpData->AddressMap.LModeEntryOffset;
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ExchangeInfo->Cr3 = AsmReadCr3 ();
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ExchangeInfo->Cr3 = AsmReadCr3 ();
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ExchangeInfo->CodeSegment = AsmReadCs ();
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ExchangeInfo->DataSegment = AsmReadDs ();
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ExchangeInfo->CFunction = (UINTN) ApCFunction;
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ExchangeInfo->CFunction = (UINTN) ApCFunction;
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ExchangeInfo->NumApsExecuting = 0;
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ExchangeInfo->NumApsExecuting = 0;
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ExchangeInfo->PeiCpuMpData = PeiCpuMpData;
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ExchangeInfo->PeiCpuMpData = PeiCpuMpData;
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@ -119,6 +119,8 @@ typedef struct {
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UINTN BufferStart;
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UINTN BufferStart;
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UINTN PmodeOffset;
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UINTN PmodeOffset;
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UINTN NumApsExecuting;
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UINTN NumApsExecuting;
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UINTN CodeSegment;
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UINTN DataSegment;
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UINTN LmodeOffset;
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UINTN LmodeOffset;
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UINTN Cr3;
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UINTN Cr3;
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PEI_CPU_MP_DATA *PeiCpuMpData;
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PEI_CPU_MP_DATA *PeiCpuMpData;
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@ -1,5 +1,5 @@
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;------------------------------------------------------------------------------ ;
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;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; which accompanies this distribution. The full text of the license may be found at
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@ -37,4 +37,6 @@ IdtrLocation equ LockLocation + 16h
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BufferStartLocation equ LockLocation + 1Ch
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BufferStartLocation equ LockLocation + 1Ch
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PmodeOffsetLocation equ LockLocation + 20h
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PmodeOffsetLocation equ LockLocation + 20h
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NumApsExecutingLoction equ LockLocation + 24h
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NumApsExecutingLoction equ LockLocation + 24h
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CodeSegmentLocation equ LockLocation + 28h
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DataSegmentLocation equ LockLocation + 2Ch
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@ -1,5 +1,5 @@
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;------------------------------------------------------------------------------ ;
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;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; which accompanies this distribution. The full text of the license may be found at
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@ -39,7 +39,9 @@ IdtrLocation equ LockLocation + 2Ah
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BufferStartLocation equ LockLocation + 34h
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BufferStartLocation equ LockLocation + 34h
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PmodeOffsetLocation equ LockLocation + 3Ch
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PmodeOffsetLocation equ LockLocation + 3Ch
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NumApsExecutingLoction equ LockLocation + 44h
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NumApsExecutingLoction equ LockLocation + 44h
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LmodeOffsetLocation equ LockLocation + 4Ch
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CodeSegmentLocation equ LockLocation + 4Ch
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Cr3Location equ LockLocation + 54h
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DataSegmentLocation equ LockLocation + 54h
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LmodeOffsetLocation equ LockLocation + 5Ch
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Cr3Location equ LockLocation + 64h
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;-------------------------------------------------------------------------------
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;-------------------------------------------------------------------------------
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