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IntelFsp2(Wrapper)Pkg: Revert from e8208100 to 737f812b 

Commit formats had issues so reverted 9 commits
from IntelFsp2Pkg and IntelFsp2WrapperPkg.
Will re-submit them with correct formats.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
This commit is contained in:
Chasel, Chiu 2018-09-28 10:31:37 +08:00
parent 61d3f1000e
commit ed5de31189
9 changed files with 51 additions and 76 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
View File

@ -58,11 +58,17 @@
FspSecPlatformLib
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## UNDEFINED
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage ## CONSUMES
[FixedPcd]
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry ## CONSUMES
[Ppis]
gEfiTemporaryRamSupportPpiGuid ## PRODUCES

11
IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf
View File

@ -52,6 +52,17 @@
FspCommonLib
FspSecPlatformLib
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## UNDEFINED
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES
[FixedPcd]
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry ## CONSUMES
[Ppis]
gEfiTemporaryRamSupportPpiGuid ## PRODUCES

5
IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
View File

@ -53,9 +53,14 @@
FspSecPlatformLib
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## UNDEFINED
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize ## CONSUMES
[FixedPcd]
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry ## CONSUMES
[Ppis]
gEfiTemporaryRamSupportPpiGuid ## PRODUCES

5
IntelFsp2Pkg/Library/BaseFspCommonLib/BaseFspCommonLib.inf
View File

@ -33,3 +33,8 @@
[Pcd]
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress ## CONSUMES
[FixedPcd]
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES

9
IntelFsp2Pkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf
View File

@ -35,6 +35,12 @@
PerformanceLib
ReportStatusCodeLib
[Pcd]
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES
[Guids]
gFspPerformanceDataGuid ## CONSUMES ## GUID
gFspEventEndOfFirmwareGuid ## PRODUCES ## GUID
@ -43,3 +49,6 @@
[Protocols]
gEfiPciEnumerationCompleteProtocolGuid ## CONSUMES
[FixedPcd]
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry ## CONSUMES

4
IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf
View File

@ -34,5 +34,9 @@
BaseLib
IoLib
[FixedPcd]
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry ## CONSUMES

83
IntelFsp2Pkg/Tools/GenCfgOpt.py
View File

@ -1,6 +1,6 @@
## @ GenCfgOpt.py
#
# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
# The full text of the license may be found at
@ -418,8 +418,6 @@ EndList
return ""
def ParseDscFile (self, DscFile, FvDir):
Hardcode = False
AutoAlign = False
self._CfgItemList = []
self._CfgPageDict = {}
self._CfgBlkDict = {}
@ -440,8 +438,6 @@ EndList
DscLines = DscFd.readlines()
DscFd.close()
MaxAlign = 32 #Default align to 32, but if there are 64 bit unit, align to 64
SizeAlign = 0 #record the struct max align
while len(DscLines):
DscLine = DscLines.pop(0).strip()
Handle = False
@ -453,7 +449,7 @@ EndList
IsUpdSect = False
if Match.group(1).lower() == "Defines".lower():
IsDefSect = True
if (Match.group(1).lower() == "PcdsFeatureFlag".lower() or Match.group(1).lower() == "PcdsFixedAtBuild".lower()):
if Match.group(1).lower() == "PcdsFeatureFlag".lower():
IsPcdSect = True
elif Match.group(1).lower() == "PcdsDynamicVpd.Upd".lower():
ConfigDict = {}
@ -468,7 +464,6 @@ EndList
ConfigDict['comment'] = ''
ConfigDict['subreg'] = []
IsUpdSect = True
Offset = 0
else:
if IsDefSect or IsPcdSect or IsUpdSect or IsVpdSect:
if re.match("^!else($|\s+#.+)", DscLine):
@ -496,7 +491,7 @@ EndList
IfStack.append(Result)
ElifStack.append(0)
else:
Match = re.match("!(if|elseif)\s+(.+)", DscLine.split("#")[0])
Match = re.match("!(if|elseif)\s+(.+)", DscLine)
if Match:
Result = self.EvaluateExpress(Match.group(2))
if Match.group(1) == "if":
@ -535,7 +530,6 @@ EndList
NewDscLines = IncludeDsc.readlines()
IncludeDsc.close()
DscLines = NewDscLines + DscLines
Offset = 0
else:
if DscLine.startswith('!'):
print("ERROR: Unrecoginized directive for line '%s'" % DscLine)
@ -626,22 +620,13 @@ EndList
# Check VPD/UPD
if IsUpdSect:
Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+|\*)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
else:
Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)(?:\s*\|\s*(.+))?", DscLine)
if Match:
ConfigDict['space'] = Match.group(1)
ConfigDict['cname'] = Match.group(2)
if Match.group(3) != '*':
Hardcode = True
Offset = int (Match.group(3), 16)
else:
AutoAlign = True
if Hardcode and AutoAlign:
print("Hardcode and auto-align mixed mode is not supported by GenCfgOpt")
raise SystemExit
ConfigDict['offset'] = Offset
ConfigDict['offset'] = int (Match.group(3), 16)
if ConfigDict['order'] == -1:
ConfigDict['order'] = ConfigDict['offset'] << 8
else:
@ -653,7 +638,6 @@ EndList
Length = int (Match.group(4), 16)
else :
Length = int (Match.group(4))
Offset += Length
else:
Value = Match.group(4)
if Value is None:
@ -681,52 +665,6 @@ EndList
ConfigDict['help'] = ''
ConfigDict['type'] = ''
ConfigDict['option'] = ''
if IsUpdSect and AutoAlign:
ItemLength = int(ConfigDict['length'])
ItemOffset = int(ConfigDict['offset'])
ItemStruct = ConfigDict['struct']
Unit = 1
if ItemLength in [1, 2, 4, 8] and not ConfigDict['value'].startswith('{'):
Unit = ItemLength
# If there are 64 bit unit, align to 64
if Unit == 8:
MaxAlign = 64
SizeAlign = 8
if ItemStruct != '':
UnitDict = {'UINT8':1, 'UINT16':2, 'UINT32':4, 'UINT64':8}
if ItemStruct in ['UINT8', 'UINT16', 'UINT32', 'UINT64']:
Unit = UnitDict[ItemStruct]
# If there are 64 bit unit, align to 64
if Unit == 8:
MaxAlign = 64
SizeAlign = max(SizeAlign, Unit)
if (ConfigDict['embed'].find(':START') != -1):
Base = ItemOffset
SubOffset = ItemOffset - Base
SubRemainder = SubOffset % Unit
if SubRemainder:
Diff = Unit - SubRemainder
Offset = Offset + Diff
ItemOffset = ItemOffset + Diff
if (ConfigDict['embed'].find(':END') != -1):
Remainder = Offset % (MaxAlign/8) # MaxAlign is either 32 or 64
if Remainder:
Diff = (MaxAlign/8) - Remainder
Offset = Offset + Diff
ItemOffset = ItemOffset + Diff
MaxAlign = 32 # Reset to default 32 align when struct end
if (ConfigDict['cname'] == 'UpdTerminator'):
# ItemLength is the size of UpdTerminator
# Itemlength might be 16, 32, or 64
# Struct align to 64 if UpdTerminator
# or struct size is 64 bit, else align to 32
Remainder = Offset % max(ItemLength/8, 4, SizeAlign)
Offset = Offset + ItemLength
if Remainder:
Diff = max(ItemLength/8, 4, SizeAlign) - Remainder
ItemOffset = ItemOffset + Diff
ConfigDict['offset'] = ItemOffset
self._CfgItemList.append(ConfigDict.copy())
ConfigDict['name'] = ''
@ -1038,13 +976,6 @@ EndList
NewTextBody.extend(OldTextBody)
return NewTextBody
def WriteLinesWithoutTailingSpace (self, HeaderFd, Line):
TxtBody2 = Line.splitlines(True)
for Line2 in TxtBody2:
Line2 = Line2.rstrip()
Line2 += '\n'
HeaderFd.write (Line2)
return 0
def CreateHeaderFile (self, InputHeaderFile):
FvDir = self._FvDir
@ -1244,7 +1175,7 @@ EndList
Index += 1
for Item in range(len(StructStart)):
if Index >= StructStartWithComment[Item] and Index <= StructEnd[Item]:
self.WriteLinesWithoutTailingSpace(HeaderFd, Line)
HeaderFd.write (Line)
HeaderFd.write("#pragma pack()\n\n")
HeaderFd.write("#endif\n")
HeaderFd.close()
@ -1289,7 +1220,7 @@ EndList
Index += 1
for Item in range(len(StructStart)):
if Index >= StructStartWithComment[Item] and Index <= StructEnd[Item]:
self.WriteLinesWithoutTailingSpace(HeaderFd, Line)
HeaderFd.write (Line)
HeaderFd.write("#pragma pack()\n\n")
HeaderFd.write("#endif\n")
HeaderFd.close()

1
IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
View File

@ -61,6 +61,7 @@
gFspHobGuid ## CONSUMES ## HOB
[Pcd]
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES
gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi ## CONSUMES
[Depex]

3
IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/BaseFspWrapperPlatformLibSample.inf
View File

@ -55,3 +55,6 @@
[LibraryClasses]
[Pcd]
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES