mirror of https://github.com/acidanthera/audk.git
MdePkg/BaseRngLib: Remove global variable for RDRAND state update
As a BASE type library, some PEI drivers could link and use it.
Tcg2Pei.inf is an example. On edk2-stable202408 version, PEI drivers
that link the library include the global variable of mRdRandSupported.
The previous commit (c3a8ca7
) that refers to the global variable actually
is found to influence the link status. Updating the global variable
in PEI drivers could affect the following issues.
PEI ROM Boot : Global variable is not updated
PEI RAM Boot : PEI FV integration/security check is failed
To address these issues, remove the global variable usage.
Signed-off-by: Phil Noh <Phil.Noh@amd.com>
This commit is contained in:
parent
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commit
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@ -2,6 +2,7 @@
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Random number generator services that uses RdRand instruction access
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Random number generator services that uses RdRand instruction access
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to provide high-quality random numbers.
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to provide high-quality random numbers.
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Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>
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Copyright (c) 2023, Arm Limited. All rights reserved.<BR>
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Copyright (c) 2023, Arm Limited. All rights reserved.<BR>
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Copyright (c) 2022, Pedro Falcato. All rights reserved.<BR>
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Copyright (c) 2022, Pedro Falcato. All rights reserved.<BR>
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Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
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Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
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@ -23,8 +24,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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//
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//
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#define RDRAND_MASK BIT30
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#define RDRAND_MASK BIT30
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STATIC BOOLEAN mRdRandSupported;
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//
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//
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// Intel SDM says 10 tries is good enough for reliable RDRAND usage.
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// Intel SDM says 10 tries is good enough for reliable RDRAND usage.
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//
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//
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@ -124,20 +123,6 @@ BaseRngLibConstructor (
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VOID
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VOID
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)
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)
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{
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{
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UINT32 RegEcx;
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//
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// Determine RDRAND support by examining bit 30 of the ECX register returned by
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// CPUID. A value of 1 indicates that processor support RDRAND instruction.
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//
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AsmCpuid (1, 0, 0, &RegEcx, 0);
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mRdRandSupported = ((RegEcx & RDRAND_MASK) == RDRAND_MASK);
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if (mRdRandSupported) {
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mRdRandSupported = TestRdRand ();
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}
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return EFI_SUCCESS;
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return EFI_SUCCESS;
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}
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}
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@ -156,7 +141,6 @@ ArchGetRandomNumber16 (
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OUT UINT16 *Rand
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OUT UINT16 *Rand
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)
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)
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{
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{
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ASSERT (mRdRandSupported);
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return AsmRdRand16 (Rand);
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return AsmRdRand16 (Rand);
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}
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}
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@ -175,7 +159,6 @@ ArchGetRandomNumber32 (
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OUT UINT32 *Rand
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OUT UINT32 *Rand
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)
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)
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{
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{
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ASSERT (mRdRandSupported);
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return AsmRdRand32 (Rand);
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return AsmRdRand32 (Rand);
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}
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}
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@ -194,7 +177,6 @@ ArchGetRandomNumber64 (
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OUT UINT64 *Rand
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OUT UINT64 *Rand
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)
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)
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{
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{
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ASSERT (mRdRandSupported);
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return AsmRdRand64 (Rand);
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return AsmRdRand64 (Rand);
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}
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}
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@ -211,7 +193,22 @@ ArchIsRngSupported (
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VOID
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VOID
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)
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)
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{
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{
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return mRdRandSupported;
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BOOLEAN RdRandSupported;
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UINT32 RegEcx;
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//
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// Determine RDRAND support by examining bit 30 of the ECX register returned by
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// CPUID. A value of 1 indicates that processor support RDRAND instruction.
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//
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AsmCpuid (1, 0, 0, &RegEcx, 0);
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RdRandSupported = ((RegEcx & RDRAND_MASK) == RDRAND_MASK);
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if (RdRandSupported) {
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RdRandSupported = TestRdRand ();
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}
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return RdRandSupported;
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}
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}
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/**
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/**
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