ArmPkg: rename misleading local #define in CpuDxe

The local #define TT_ATTR_INDX_INVALID is used as a local error code
in the AArch64 implementation, but is misleadingly named to match the
definitions in ArmPkg/Include/Chipset/AArch64Mmu.h.

Rename it INVALID_ENTRY to reduce confusion and improve readability.

Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
This commit is contained in:
Leif Lindholm 2020-04-03 12:30:46 +01:00 committed by mergify[bot]
parent ef5dcba975
commit ee026ea78b
1 changed files with 7 additions and 7 deletions

View File

@ -13,7 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/MemoryAllocationLib.h> #include <Library/MemoryAllocationLib.h>
#include "CpuDxe.h" #include "CpuDxe.h"
#define TT_ATTR_INDX_INVALID ((UINT32)~0) #define INVALID_ENTRY ((UINT32)~0)
#define MIN_T0SZ 16 #define MIN_T0SZ 16
#define BITS_PER_LEVEL 9 #define BITS_PER_LEVEL 9
@ -98,7 +98,7 @@ GetFirstPageAttribute (
{ {
return FirstEntry & TT_ATTR_INDX_MASK; return FirstEntry & TT_ATTR_INDX_MASK;
} else { } else {
return TT_ATTR_INDX_INVALID; return INVALID_ENTRY;
} }
} }
@ -139,8 +139,8 @@ GetNextEntryAttribute (
// If Entry is a Table Descriptor type entry then go through the sub-level table // If Entry is a Table Descriptor type entry then go through the sub-level table
if ((EntryType == TT_TYPE_BLOCK_ENTRY) || if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) { ((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {
if ((*PrevEntryAttribute == TT_ATTR_INDX_INVALID) || (EntryAttribute != *PrevEntryAttribute)) { if ((*PrevEntryAttribute == INVALID_ENTRY) || (EntryAttribute != *PrevEntryAttribute)) {
if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) { if (*PrevEntryAttribute != INVALID_ENTRY) {
// Update GCD with the last region // Update GCD with the last region
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
*StartGcdRegion, *StartGcdRegion,
@ -164,7 +164,7 @@ GetNextEntryAttribute (
(BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))), (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),
PrevEntryAttribute, StartGcdRegion); PrevEntryAttribute, StartGcdRegion);
} else { } else {
if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) { if (*PrevEntryAttribute != INVALID_ENTRY) {
// Update GCD with the last region // Update GCD with the last region
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
*StartGcdRegion, *StartGcdRegion,
@ -173,7 +173,7 @@ GetNextEntryAttribute (
// Start of the new region // Start of the new region
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel)); *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
*PrevEntryAttribute = TT_ATTR_INDX_INVALID; *PrevEntryAttribute = INVALID_ENTRY;
} }
} }
} }
@ -238,7 +238,7 @@ SyncCacheConfig (
&PageAttribute, &BaseAddressGcdRegion); &PageAttribute, &BaseAddressGcdRegion);
// Update GCD with the last region if valid // Update GCD with the last region if valid
if (PageAttribute != TT_ATTR_INDX_INVALID) { if (PageAttribute != INVALID_ENTRY) {
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
BaseAddressGcdRegion, BaseAddressGcdRegion,
EndAddressGcdRegion - BaseAddressGcdRegion, EndAddressGcdRegion - BaseAddressGcdRegion,