UefiCpuPkg CpuCommonFeaturesLib: Enable Ppin feature.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h

@@ -854,4 +854,59 @@ FeatureControlGetConfigData (
   IN UINTN               NumberOfProcessors
   );
 
+/**
+  Detects if Protected Processor Inventory Number feature supported on current 
+  processor.
+
+  @param[in]  ProcessorNumber  The index of the CPU executing this function.
+  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+                               structure for the CPU executing this function.
+  @param[in]  ConfigData       A pointer to the configuration buffer returned
+                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
+                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
+                               RegisterCpuFeature().
+
+  @retval TRUE     Enhanced Intel SpeedStep feature is supported.
+  @retval FALSE    Enhanced Intel SpeedStep feature is not supported.
+
+  @note This service could be called by BSP/APs.
+**/
+BOOLEAN
+EFIAPI
+PpinSupport (
+  IN UINTN                             ProcessorNumber,
+  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
+  IN VOID                              *ConfigData  OPTIONAL
+  );
+
+/**
+  Initializes Protected Processor Inventory Number feature to specific state.
+
+  @param[in]  ProcessorNumber  The index of the CPU executing this function.
+  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+                               structure for the CPU executing this function.
+  @param[in]  ConfigData       A pointer to the configuration buffer returned
+                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
+                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
+                               RegisterCpuFeature().
+  @param[in]  State            If TRUE, then the Protected Processor Inventory 
+                               Number feature must be enabled.
+                               If FALSE, then the Protected Processor Inventory 
+                               Number feature must be disabled.
+
+  @retval RETURN_SUCCESS       Protected Processor Inventory Number feature is 
+                               initialized.
+  @retval RETURN_DEVICE_ERROR  Device can't change state because it has been 
+                               locked.
+
+**/
+RETURN_STATUS
+EFIAPI
+PpinInitialize (
+  IN UINTN                             ProcessorNumber,
+  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
+  IN VOID                              *ConfigData,  OPTIONAL
+  IN BOOLEAN                           State
+  );
+
 #endif

UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c

@@ -206,6 +206,17 @@ CpuCommonFeaturesLibConstructor (
                );
     ASSERT_EFI_ERROR (Status);
   }
+  if (IsCpuFeatureSupported (CPU_FEATURE_PPIN)) {
+    Status = RegisterCpuFeature (
+               "PPIN",
+               NULL,
+               PpinSupport,
+               PpinInitialize,
+               CPU_FEATURE_PPIN,
+               CPU_FEATURE_END
+               );
+    ASSERT_EFI_ERROR (Status);
+  }
 
   return RETURN_SUCCESS;
 }

UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf

@@ -47,6 +47,7 @@
   MonitorMwait.c
   PendingBreak.c
   X2Apic.c
+  Ppin.c
 
 [Packages]
   MdePkg/MdePkg.dec

UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c

@@ -0,0 +1,114 @@
+/** @file
+  Protected Processor Inventory Number(PPIN) feature.
+
+  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "CpuCommonFeatures.h"
+
+/**
+  Detects if Protected Processor Inventory Number feature supported on current 
+  processor.
+
+  @param[in]  ProcessorNumber  The index of the CPU executing this function.
+  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+                               structure for the CPU executing this function.
+  @param[in]  ConfigData       A pointer to the configuration buffer returned
+                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
+                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
+                               RegisterCpuFeature().
+
+  @retval TRUE     Enhanced Intel SpeedStep feature is supported.
+  @retval FALSE    Enhanced Intel SpeedStep feature is not supported.
+
+  @note This service could be called by BSP/APs.
+**/
+BOOLEAN
+EFIAPI
+PpinSupport (
+  IN UINTN                             ProcessorNumber,
+  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
+  IN VOID                              *ConfigData  OPTIONAL
+  )
+{
+  MSR_IVY_BRIDGE_PLATFORM_INFO_1_REGISTER    PlatformInfo;
+
+  if ((CpuInfo->DisplayFamily == 0x06) && 
+      ((CpuInfo->DisplayModel == 0x3E) ||      // Xeon E5 V2
+       (CpuInfo->DisplayModel == 0x56) ||      // Xeon Processor D Product
+       (CpuInfo->DisplayModel == 0x4F) ||      // Xeon E5 v4, E7 v4
+       (CpuInfo->DisplayModel == 0x55) ||      // Xeon Processor Scalable
+       (CpuInfo->DisplayModel == 0x57) ||      // Xeon Phi processor 3200, 5200, 7200 series.
+       (CpuInfo->DisplayModel == 0x85)         // Future Xeon phi processor 
+     )) {
+    //
+    // Check whether platform support this feature.
+    //
+    PlatformInfo.Uint64 = AsmReadMsr64 (MSR_IVY_BRIDGE_PLATFORM_INFO_1);
+    return (PlatformInfo.Bits.PPIN_CAP != 0);
+  }
+
+  return FALSE;
+}
+
+/**
+  Initializes Protected Processor Inventory Number feature to specific state.
+
+  @param[in]  ProcessorNumber  The index of the CPU executing this function.
+  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
+                               structure for the CPU executing this function.
+  @param[in]  ConfigData       A pointer to the configuration buffer returned
+                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
+                               CPU_FEATURE_GET_CONFIG_DATA was not provided in
+                               RegisterCpuFeature().
+  @param[in]  State            If TRUE, then the Protected Processor Inventory 
+                               Number feature must be enabled.
+                               If FALSE, then the Protected Processor Inventory 
+                               Number feature must be disabled.
+
+  @retval RETURN_SUCCESS       Protected Processor Inventory Number feature is 
+                               initialized.
+  @retval RETURN_DEVICE_ERROR  Device can't change state because it has been 
+                               locked.
+
+**/
+RETURN_STATUS
+EFIAPI
+PpinInitialize (
+  IN UINTN                             ProcessorNumber,
+  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
+  IN VOID                              *ConfigData,  OPTIONAL
+  IN BOOLEAN                           State
+  )
+{
+  MSR_IVY_BRIDGE_PPIN_CTL_REGISTER     MsrPpinCtrl;
+
+  //
+  // Check whether device already lock this register.
+  // If already locked, just base on the request state and
+  // the current state to return the status.
+  //
+  MsrPpinCtrl.Uint64 = AsmReadMsr64 (MSR_IVY_BRIDGE_PPIN_CTL);
+  if (MsrPpinCtrl.Bits.LockOut != 0) {
+    return MsrPpinCtrl.Bits.Enable_PPIN == State ? RETURN_SUCCESS : RETURN_DEVICE_ERROR;
+  }
+
+  CPU_REGISTER_TABLE_WRITE_FIELD (
+    ProcessorNumber,
+    Msr,
+    MSR_IVY_BRIDGE_PPIN_CTL,
+    MSR_IVY_BRIDGE_PPIN_CTL_REGISTER,
+    Bits.Enable_PPIN,
+    (State) ? 1 : 0
+    );
+
+  return RETURN_SUCCESS;
+}