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UefiCpuPkg/PiSmmCpuDxeSmm: Combine CR read/write action. 

Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
This commit is contained in:
Dong, Eric 2019-08-16 11:57:26 +08:00 committed by Ray Ni
parent 35c2809ba6
commit ef21a304e0
1 changed files with 62 additions and 42 deletions
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104
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
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@ -159,6 +159,58 @@ S3WaitForSemaphore (
) != Value); ) != Value);
} }
/**
Read / write CR value.
@param[in] CrIndex The CR index which need to read/write.
@param[in] Read Read or write. TRUE is read.
@param[in,out] CrValue CR value.
@retval EFI_SUCCESS means read/write success, else return EFI_UNSUPPORTED.
**/
UINTN
ReadWriteCr (
IN UINT32 CrIndex,
IN BOOLEAN Read,
IN OUT UINTN *CrValue
)
{
switch (CrIndex) {
case 0:
if (Read) {
*CrValue = AsmReadCr0 ();
} else {
AsmWriteCr0 (*CrValue);
}
break;
case 2:
if (Read) {
*CrValue = AsmReadCr2 ();
} else {
AsmWriteCr2 (*CrValue);
}
break;
case 3:
if (Read) {
*CrValue = AsmReadCr3 ();
} else {
AsmWriteCr3 (*CrValue);
}
break;
case 4:
if (Read) {
*CrValue = AsmReadCr4 ();
} else {
AsmWriteCr4 (*CrValue);
}
break;
default:
return EFI_UNSUPPORTED;;
}
return EFI_SUCCESS;
}
/** /**
Initialize the CPU registers from a register table. Initialize the CPU registers from a register table.
@ -188,6 +240,7 @@ ProgramProcessorRegister (
UINTN ProcessorIndex; UINTN ProcessorIndex;
UINTN ValidThreadCount; UINTN ValidThreadCount;
UINT32 *ValidCoreCountPerPackage; UINT32 *ValidCoreCountPerPackage;
EFI_STATUS Status;
// //
// Traverse Register Table of this logical processor // Traverse Register Table of this logical processor
@ -206,50 +259,17 @@ ProgramProcessorRegister (
// The specified register is Control Register // The specified register is Control Register
// //
case ControlRegister: case ControlRegister:
switch (RegisterTableEntry->Index) { Status = ReadWriteCr (RegisterTableEntry->Index, TRUE, &Value);
case 0: if (EFI_ERROR (Status)) {
Value = AsmReadCr0 ();
Value = (UINTN) BitFieldWrite64 (
Value,
RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
(UINTN) RegisterTableEntry->Value
);
AsmWriteCr0 (Value);
break;
case 2:
Value = AsmReadCr2 ();
Value = (UINTN) BitFieldWrite64 (
Value,
RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
(UINTN) RegisterTableEntry->Value
);
AsmWriteCr2 (Value);
break;
case 3:
Value = AsmReadCr3 ();
Value = (UINTN) BitFieldWrite64 (
Value,
RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
(UINTN) RegisterTableEntry->Value
);
AsmWriteCr3 (Value);
break;
case 4:
Value = AsmReadCr4 ();
Value = (UINTN) BitFieldWrite64 (
Value,
RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
(UINTN) RegisterTableEntry->Value
);
AsmWriteCr4 (Value);
break;
default:
break; break;
} }
Value = (UINTN) BitFieldWrite64 (
Value,
RegisterTableEntry->ValidBitStart,
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,
RegisterTableEntry->Value
);
ReadWriteCr (RegisterTableEntry->Index, FALSE, &Value);
break; break;
// //
// The specified register is Model Specific Register // The specified register is Model Specific Register