mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmLib: ArmReadVBar implementation missing in AArch64
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15274 6f19259b-4bc3-4df7-8a09-765794883524
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@ -45,6 +45,7 @@ GCC_ASM_EXPORT (ArmDataMemoryBarrier)
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GCC_ASM_EXPORT (ArmDataSyncronizationBarrier)
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GCC_ASM_EXPORT (ArmDataSyncronizationBarrier)
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GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
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GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
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GCC_ASM_EXPORT (ArmWriteVBar)
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GCC_ASM_EXPORT (ArmWriteVBar)
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GCC_ASM_EXPORT (ArmReadVBar)
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GCC_ASM_EXPORT (ArmVFPImplemented)
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GCC_ASM_EXPORT (ArmVFPImplemented)
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GCC_ASM_EXPORT (ArmEnableVFP)
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GCC_ASM_EXPORT (ArmEnableVFP)
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GCC_ASM_EXPORT (ArmCallWFI)
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GCC_ASM_EXPORT (ArmCallWFI)
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@ -411,6 +412,16 @@ ASM_PFX(ArmWriteVBar):
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4: isb
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4: isb
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ret
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ret
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ASM_PFX(ArmReadVBar):
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EL1_OR_EL2_OR_EL3(x1)
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1: mrs x0, vbar_el1 // Set the Address of the EL1 Vector Table in the VBAR register
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ret
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2: mrs x0, vbar_el2 // Set the Address of the EL2 Vector Table in the VBAR register
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ret
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3: mrs x0, vbar_el3 // Set the Address of the EL3 Vector Table in the VBAR register
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ret
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ASM_PFX(ArmEnableVFP):
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ASM_PFX(ArmEnableVFP):
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// Check whether floating-point is implemented in the processor.
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// Check whether floating-point is implemented in the processor.
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mov x1, x30 // Save LR
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mov x1, x30 // Save LR
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