mirror of https://github.com/acidanthera/audk.git
ShellPkg: Update 'pci' command for updated class codes
This updated the strings to be compliant with PCI CODE AND ID ASSIGNMENT SPECIFICATION 1.5. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Signed-off-by: Chris Phillips <chrisp@hp.com> Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15885 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Jaben Carsey
jcarsey
parent
c173a7b9d6
commit
f056e4c180
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@ -1,7 +1,7 @@
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/** @file
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Main file for Pci shell Debug1 function.
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Copyright (c) 2013 Hewlett-Packard Development Company, L.P.
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(C) Copyright 2013-2014 Hewlett-Packard Development Company, L.P.
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Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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@ -20,7 +20,6 @@
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#include <IndustryStandard/Acpi.h>
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#include "Pci.h"
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#define PCI_CLASS_STRING_LIMIT 54
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//
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// Printable strings for Pci class code
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//
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@ -63,9 +62,19 @@ PCI_CLASS_ENTRY PCISubClass_0e[];
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PCI_CLASS_ENTRY PCISubClass_0f[];
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PCI_CLASS_ENTRY PCISubClass_10[];
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PCI_CLASS_ENTRY PCISubClass_11[];
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PCI_CLASS_ENTRY PCISubClass_12[];
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PCI_CLASS_ENTRY PCISubClass_13[];
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PCI_CLASS_ENTRY PCIPIFClass_0100[];
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PCI_CLASS_ENTRY PCIPIFClass_0101[];
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PCI_CLASS_ENTRY PCIPIFClass_0105[];
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PCI_CLASS_ENTRY PCIPIFClass_0106[];
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PCI_CLASS_ENTRY PCIPIFClass_0107[];
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PCI_CLASS_ENTRY PCIPIFClass_0108[];
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PCI_CLASS_ENTRY PCIPIFClass_0109[];
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PCI_CLASS_ENTRY PCIPIFClass_0300[];
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PCI_CLASS_ENTRY PCIPIFClass_0604[];
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PCI_CLASS_ENTRY PCIPIFClass_0609[];
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PCI_CLASS_ENTRY PCIPIFClass_060b[];
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PCI_CLASS_ENTRY PCIPIFClass_0700[];
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PCI_CLASS_ENTRY PCIPIFClass_0701[];
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PCI_CLASS_ENTRY PCIPIFClass_0703[];
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@ -76,6 +85,8 @@ PCI_CLASS_ENTRY PCIPIFClass_0803[];
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PCI_CLASS_ENTRY PCIPIFClass_0904[];
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PCI_CLASS_ENTRY PCIPIFClass_0c00[];
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PCI_CLASS_ENTRY PCIPIFClass_0c03[];
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PCI_CLASS_ENTRY PCIPIFClass_0c07[];
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PCI_CLASS_ENTRY PCIPIFClass_0d01[];
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PCI_CLASS_ENTRY PCIPIFClass_0e00[];
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//
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@ -172,6 +183,16 @@ PCI_CLASS_ENTRY gClassStringList[] = {
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L"Data Acquisition & Signal Processing Controllers",
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PCISubClass_11
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},
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{
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0x12,
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L"Processing Accelerators",
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PCISubClass_12
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},
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{
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0x13,
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L"Non-Essential Instrumentation",
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PCISubClass_13
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},
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{
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0xff,
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L"Device does not fit in any defined classes",
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@ -221,8 +242,8 @@ PCI_CLASS_ENTRY PCISubClass_00[] = {
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PCI_CLASS_ENTRY PCISubClass_01[] = {
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{
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0x00,
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L"SCSI controller",
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PCIBlankEntry
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L"SCSI",
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PCIPIFClass_0100
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},
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{
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0x01,
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@ -244,6 +265,31 @@ PCI_CLASS_ENTRY PCISubClass_01[] = {
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L"RAID controller",
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PCIBlankEntry
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},
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{
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0x05,
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L"ATA controller with ADMA interface",
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PCIPIFClass_0105
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},
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{
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0x06,
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L"Serial ATA controller",
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PCIPIFClass_0106
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},
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{
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0x07,
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L"Serial Attached SCSI (SAS) controller ",
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PCIPIFClass_0107
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},
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{
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0x08,
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L"Non-volatile memory subsystem",
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PCIPIFClass_0108
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},
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{
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0x09,
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L"Universal Flash Storage (UFS) controller ",
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PCIPIFClass_0109
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},
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{
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0x80,
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L"Other mass storage controller",
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@ -282,6 +328,21 @@ PCI_CLASS_ENTRY PCISubClass_02[] = {
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L"ISDN controller",
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PCIBlankEntry
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},
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{
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0x05,
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L"WorldFip controller",
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PCIBlankEntry
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},
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{
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0x06,
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L"PICMG 2.14 Multi Computing",
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PCIBlankEntry
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},
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{
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0x07,
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L"InfiniBand controller",
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PCIBlankEntry
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},
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{
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0x80,
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L"Other network controller",
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@ -338,6 +399,11 @@ PCI_CLASS_ENTRY PCISubClass_04[] = {
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L"Computer Telephony device",
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PCIBlankEntry
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},
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{
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0x03,
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L"Mixed mode device",
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PCIBlankEntry
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},
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{
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0x80,
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L"Other multimedia device",
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@ -419,6 +485,21 @@ PCI_CLASS_ENTRY PCISubClass_06[] = {
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L"RACEway bridge",
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PCIBlankEntry
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},
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{
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0x09,
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L"Semi-transparent PCI-to-PCI bridge",
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PCIPIFClass_0609
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},
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{
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0x0A,
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L"InfiniBand-to-PCI host bridge",
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PCIBlankEntry
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},
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{
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0x0B,
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L"Advanced Switching to PCI host bridge",
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PCIPIFClass_060b
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},
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{
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0x80,
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L"Other bridge type",
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@ -452,6 +533,16 @@ PCI_CLASS_ENTRY PCISubClass_07[] = {
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L"Modem",
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PCIPIFClass_0703
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},
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{
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0x04,
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L"GPIB (IEEE 488.1/2) controller",
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PCIBlankEntry
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},
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{
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0x05,
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L"Smart Card",
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PCIBlankEntry
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},
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{
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0x80,
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L"Other communication device",
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@ -490,6 +581,21 @@ PCI_CLASS_ENTRY PCISubClass_08[] = {
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L"Generic PCI Hot-Plug controller",
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PCIBlankEntry
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},
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{
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0x05,
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L"SD Host controller",
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PCIBlankEntry
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},
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{
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0x06,
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L"IOMMU",
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PCIBlankEntry
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},
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{
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0x07,
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L"Root Complex Event Collector",
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PCIBlankEntry
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},
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{
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0x80,
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L"Other system peripheral",
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@ -609,8 +715,8 @@ PCI_CLASS_ENTRY PCISubClass_0b[] = {
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PCI_CLASS_ENTRY PCISubClass_0c[] = {
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{
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0x00,
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L"Firewire(IEEE 1394)",
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PCIPIFClass_0c03
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L"IEEE 1394",
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PCIPIFClass_0c00
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},
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{
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0x01,
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@ -625,7 +731,7 @@ PCI_CLASS_ENTRY PCISubClass_0c[] = {
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{
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0x03,
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L"USB",
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PCIPIFClass_0c00
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PCIPIFClass_0c03
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},
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{
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0x04,
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@ -637,6 +743,26 @@ PCI_CLASS_ENTRY PCISubClass_0c[] = {
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L"System Management Bus",
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PCIBlankEntry
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},
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{
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0x06,
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L"InfiniBand",
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PCIBlankEntry
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},
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{
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0x07,
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L"IPMI",
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PCIPIFClass_0c07
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},
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{
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0x08,
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L"SERCOS Interface Standard (IEC 61491)",
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PCIBlankEntry
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},
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{
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0x09,
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L"CANbus",
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PCIBlankEntry
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},
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{
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0x80,
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L"Other bus type",
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@ -657,14 +783,34 @@ PCI_CLASS_ENTRY PCISubClass_0d[] = {
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},
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{
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0x01,
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L"Consumer IR controller",
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PCIBlankEntry
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L"",
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PCIPIFClass_0d01
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},
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{
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0x10,
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L"RF controller",
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PCIBlankEntry
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},
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{
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0x11,
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L"Bluetooth",
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PCIBlankEntry
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},
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{
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0x12,
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L"Broadband",
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PCIBlankEntry
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},
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{
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0x20,
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L"Ethernet (802.11a – 5 GHz)",
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PCIBlankEntry
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},
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{
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0x21,
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L"Ethernet (802.11b – 2.4 GHz)",
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PCIBlankEntry
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},
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{
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0x80,
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L"Other type of wireless controller",
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@ -692,25 +838,30 @@ PCI_CLASS_ENTRY PCISubClass_0e[] = {
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PCI_CLASS_ENTRY PCISubClass_0f[] = {
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{
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0x00,
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0x01,
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L"TV",
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PCIBlankEntry
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},
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{
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0x01,
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0x02,
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L"Audio",
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PCIBlankEntry
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},
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{
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0x02,
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0x03,
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L"Voice",
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PCIBlankEntry
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},
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{
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0x03,
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0x04,
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L"Data",
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PCIBlankEntry
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},
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{
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0x80,
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L"Other satellite communication controller",
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PCIBlankEntry
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},
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{
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0x00,
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NULL,
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@ -747,6 +898,21 @@ PCI_CLASS_ENTRY PCISubClass_11[] = {
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L"DPIO modules",
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PCIBlankEntry
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},
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{
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0x01,
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L"Performance Counters",
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PCIBlankEntry
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},
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{
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0x10,
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L"Communications synchronization plus time and frequency test/measurement ",
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PCIBlankEntry
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},
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{
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0x20,
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L"Management card",
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PCIBlankEntry
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},
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{
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0x80,
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L"Other DAQ & SP controllers",
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@ -759,9 +925,68 @@ PCI_CLASS_ENTRY PCISubClass_11[] = {
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}
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};
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PCI_CLASS_ENTRY PCISubClass_12[] = {
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{
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0x00,
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L"Processing Accelerator",
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PCIBlankEntry
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},
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{
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0x00,
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NULL,
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/* null string ends the list */NULL
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}
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};
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PCI_CLASS_ENTRY PCISubClass_13[] = {
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{
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0x00,
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L"Non-Essential Instrumentation Function",
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PCIBlankEntry
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},
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{
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0x00,
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NULL,
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/* null string ends the list */NULL
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}
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};
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//
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// Programming Interface entries
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//
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PCI_CLASS_ENTRY PCIPIFClass_0100[] = {
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{
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0x00,
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L"SCSI controller",
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PCIBlankEntry
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},
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{
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0x11,
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L"SCSI storage device SOP using PQI",
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PCIBlankEntry
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},
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{
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0x12,
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L"SCSI controller SOP using PQI",
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PCIBlankEntry
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},
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{
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0x13,
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L"SCSI storage device and controller SOP using PQI",
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PCIBlankEntry
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},
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{
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0x21,
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L"SCSI storage device SOP using NVMe",
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PCIBlankEntry
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},
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{
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0x00,
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NULL,
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/* null string ends the list */NULL
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}
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};
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PCI_CLASS_ENTRY PCIPIFClass_0101[] = {
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{
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0x00,
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@ -930,6 +1155,106 @@ PCI_CLASS_ENTRY PCIPIFClass_0101[] = {
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}
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};
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PCI_CLASS_ENTRY PCIPIFClass_0105[] = {
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{
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0x20,
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L"Single stepping",
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PCIBlankEntry
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},
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{
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0x30,
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L"Continuous operation",
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PCIBlankEntry
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},
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{
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0x00,
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NULL,
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/* null string ends the list */NULL
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}
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};
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PCI_CLASS_ENTRY PCIPIFClass_0106[] = {
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{
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0x00,
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L"",
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PCIBlankEntry
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},
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{
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0x01,
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L"AHCI",
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PCIBlankEntry
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},
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{
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0x02,
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L"Serial Storage Bus",
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PCIBlankEntry
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},
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{
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0x00,
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NULL,
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/* null string ends the list */NULL
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}
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};
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PCI_CLASS_ENTRY PCIPIFClass_0107[] = {
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{
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0x00,
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L"",
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PCIBlankEntry
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},
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{
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0x01,
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L"Obsolete",
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PCIBlankEntry
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},
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{
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0x00,
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NULL,
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/* null string ends the list */NULL
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}
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};
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PCI_CLASS_ENTRY PCIPIFClass_0108[] = {
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{
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0x00,
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L"",
|
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PCIBlankEntry
|
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},
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{
|
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0x01,
|
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L"NVMHCI",
|
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PCIBlankEntry
|
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},
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{
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0x02,
|
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L"NVM Express",
|
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PCIBlankEntry
|
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},
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{
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0x00,
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NULL,
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/* null string ends the list */NULL
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}
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};
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PCI_CLASS_ENTRY PCIPIFClass_0109[] = {
|
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{
|
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0x00,
|
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L"",
|
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PCIBlankEntry
|
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},
|
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{
|
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0x01,
|
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L"UFSHCI",
|
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PCIBlankEntry
|
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},
|
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{
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0x00,
|
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NULL,
|
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/* null string ends the list */NULL
|
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}
|
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};
|
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|
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PCI_CLASS_ENTRY PCIPIFClass_0300[] = {
|
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{
|
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0x00,
|
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|
|
@ -966,6 +1291,42 @@ PCI_CLASS_ENTRY PCIPIFClass_0604[] = {
|
|||
}
|
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};
|
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|
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PCI_CLASS_ENTRY PCIPIFClass_0609[] = {
|
||||
{
|
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0x40,
|
||||
L"Primary PCI bus side facing the system host processor",
|
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PCIBlankEntry
|
||||
},
|
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{
|
||||
0x80,
|
||||
L"Secondary PCI bus side facing the system host processor",
|
||||
PCIBlankEntry
|
||||
},
|
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{
|
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0x00,
|
||||
NULL,
|
||||
/* null string ends the list */NULL
|
||||
}
|
||||
};
|
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|
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PCI_CLASS_ENTRY PCIPIFClass_060b[] = {
|
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{
|
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0x00,
|
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L"Custom",
|
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PCIBlankEntry
|
||||
},
|
||||
{
|
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0x01,
|
||||
L"ASI-SIG Defined Portal",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
0x00,
|
||||
NULL,
|
||||
/* null string ends the list */NULL
|
||||
}
|
||||
};
|
||||
|
||||
PCI_CLASS_ENTRY PCIPIFClass_0700[] = {
|
||||
{
|
||||
0x00,
|
||||
|
|
@ -1198,12 +1559,40 @@ PCI_CLASS_ENTRY PCIPIFClass_0904[] = {
|
|||
PCI_CLASS_ENTRY PCIPIFClass_0c00[] = {
|
||||
{
|
||||
0x00,
|
||||
L"Universal Host Controller spec",
|
||||
L"",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
0x10,
|
||||
L"Open Host Controller spec",
|
||||
L"Using 1394 OpenHCI spec",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
0x00,
|
||||
NULL,
|
||||
/* null string ends the list */NULL
|
||||
}
|
||||
};
|
||||
|
||||
PCI_CLASS_ENTRY PCIPIFClass_0c03[] = {
|
||||
{
|
||||
0x00,
|
||||
L"UHCI",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
0x10,
|
||||
L"OHCI",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
0x20,
|
||||
L"EHCI",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
0x30,
|
||||
L"xHCI",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
|
|
@ -1223,15 +1612,38 @@ PCI_CLASS_ENTRY PCIPIFClass_0c00[] = {
|
|||
}
|
||||
};
|
||||
|
||||
PCI_CLASS_ENTRY PCIPIFClass_0c03[] = {
|
||||
PCI_CLASS_ENTRY PCIPIFClass_0c07[] = {
|
||||
{
|
||||
0x00,
|
||||
L"",
|
||||
L"SMIC",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
0x01,
|
||||
L"Keyboard Controller Style",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
0x02,
|
||||
L"Block Transfer",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
0x00,
|
||||
NULL,
|
||||
/* null string ends the list */NULL
|
||||
}
|
||||
};
|
||||
|
||||
PCI_CLASS_ENTRY PCIPIFClass_0d01[] = {
|
||||
{
|
||||
0x00,
|
||||
L"Consumer IR controller",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
0x10,
|
||||
L"Using 1394 OpenHCI spec",
|
||||
L"UWB Radio controller",
|
||||
PCIBlankEntry
|
||||
},
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in New Issue