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ArmPkg/ArmGicV3: switch to ASM_FUNC() asm macro 

Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This commit is contained in:
Ard Biesheuvel 2016-08-10 14:33:49 +02:00
parent 136df8b8b2
commit f0883e35de
2 changed files with 16 additions and 40 deletions
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28
ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S
View File

@ -32,24 +32,12 @@
#endif
.text
.align 2
GCC_ASM_EXPORT(ArmGicV3GetControlSystemRegisterEnable)
GCC_ASM_EXPORT(ArmGicV3SetControlSystemRegisterEnable)
GCC_ASM_EXPORT(ArmGicV3EnableInterruptInterface)
GCC_ASM_EXPORT(ArmGicV3DisableInterruptInterface)
GCC_ASM_EXPORT(ArmGicV3EndOfInterrupt)
GCC_ASM_EXPORT(ArmGicV3AcknowledgeInterrupt)
GCC_ASM_EXPORT(ArmGicV3SetPriorityMask)
GCC_ASM_EXPORT(ArmGicV3SetBinaryPointer)
//UINT32
//EFIAPI
//ArmGicV3GetControlSystemRegisterEnable (
// VOID
// );
ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, ICC_SRE_EL1
b 4f
@ -63,7 +51,7 @@ ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
//ArmGicV3SetControlSystemRegisterEnable (
// IN UINT32 ControlSystemRegisterEnable
// );
ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)
EL1_OR_EL2_OR_EL3(x1)
1: msr ICC_SRE_EL1, x0
b 4f
@ -77,7 +65,7 @@ ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
//ArmGicV3EnableInterruptInterface (
// VOID
// );
ASM_PFX(ArmGicV3EnableInterruptInterface):
ASM_FUNC(ArmGicV3EnableInterruptInterface)
mov x0, #1
msr ICC_IGRPEN1_EL1, x0
ret
@ -86,7 +74,7 @@ ASM_PFX(ArmGicV3EnableInterruptInterface):
//ArmGicV3DisableInterruptInterface (
// VOID
// );
ASM_PFX(ArmGicV3DisableInterruptInterface):
ASM_FUNC(ArmGicV3DisableInterruptInterface)
mov x0, #0
msr ICC_IGRPEN1_EL1, x0
ret
@ -95,7 +83,7 @@ ASM_PFX(ArmGicV3DisableInterruptInterface):
//ArmGicV3EndOfInterrupt (
// IN UINTN InterruptId
// );
ASM_PFX(ArmGicV3EndOfInterrupt):
ASM_FUNC(ArmGicV3EndOfInterrupt)
msr ICC_EOIR1_EL1, x0
ret
@ -103,7 +91,7 @@ ASM_PFX(ArmGicV3EndOfInterrupt):
//ArmGicV3AcknowledgeInterrupt (
// VOID
// );
ASM_PFX(ArmGicV3AcknowledgeInterrupt):
ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
mrs x0, ICC_IAR1_EL1
ret
@ -111,7 +99,7 @@ ASM_PFX(ArmGicV3AcknowledgeInterrupt):
//ArmGicV3SetPriorityMask (
// IN UINTN Priority
// );
ASM_PFX(ArmGicV3SetPriorityMask):
ASM_FUNC(ArmGicV3SetPriorityMask)
msr ICC_PMR_EL1, x0
ret
@ -119,6 +107,6 @@ ASM_PFX(ArmGicV3SetPriorityMask):
//ArmGicV3SetBinaryPointer (
// IN UINTN BinaryPoint
// );
ASM_PFX(ArmGicV3SetBinaryPointer):
ASM_FUNC(ArmGicV3SetBinaryPointer)
msr ICC_BPR1_EL1, x0
ret

28
ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S
View File

@ -16,24 +16,12 @@
// For the moment we assume this will run in SVC mode on ARMv7
.text
.align 2
GCC_ASM_EXPORT(ArmGicV3GetControlSystemRegisterEnable)
GCC_ASM_EXPORT(ArmGicV3SetControlSystemRegisterEnable)
GCC_ASM_EXPORT(ArmGicV3EnableInterruptInterface)
GCC_ASM_EXPORT(ArmGicV3DisableInterruptInterface)
GCC_ASM_EXPORT(ArmGicV3EndOfInterrupt)
GCC_ASM_EXPORT(ArmGicV3AcknowledgeInterrupt)
GCC_ASM_EXPORT(ArmGicV3SetPriorityMask)
GCC_ASM_EXPORT(ArmGicV3SetBinaryPointer)
//UINT32
//EFIAPI
//ArmGicGetControlSystemRegisterEnable (
// VOID
// );
ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)
mrc p15, 0, r0, c12, c12, 5 // ICC_SRE
bx lr
@ -42,7 +30,7 @@ ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
//ArmGicSetControlSystemRegisterEnable (
// IN UINT32 ControlSystemRegisterEnable
// );
ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)
mcr p15, 0, r0, c12, c12, 5 // ICC_SRE
isb
bx lr
@ -51,7 +39,7 @@ ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
//ArmGicV3EnableInterruptInterface (
// VOID
// );
ASM_PFX(ArmGicV3EnableInterruptInterface):
ASM_FUNC(ArmGicV3EnableInterruptInterface)
mov r0, #1
mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
bx lr
@ -60,7 +48,7 @@ ASM_PFX(ArmGicV3EnableInterruptInterface):
//ArmGicV3DisableInterruptInterface (
// VOID
// );
ASM_PFX(ArmGicV3DisableInterruptInterface):
ASM_FUNC(ArmGicV3DisableInterruptInterface)
mov r0, #0
mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
bx lr
@ -69,7 +57,7 @@ ASM_PFX(ArmGicV3DisableInterruptInterface):
//ArmGicV3EndOfInterrupt (
// IN UINTN InterruptId
// );
ASM_PFX(ArmGicV3EndOfInterrupt):
ASM_FUNC(ArmGicV3EndOfInterrupt)
mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1
bx lr
@ -77,7 +65,7 @@ ASM_PFX(ArmGicV3EndOfInterrupt):
//ArmGicV3AcknowledgeInterrupt (
// VOID
// );
ASM_PFX(ArmGicV3AcknowledgeInterrupt):
ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
bx lr
@ -85,7 +73,7 @@ ASM_PFX(ArmGicV3AcknowledgeInterrupt):
//ArmGicV3SetPriorityMask (
// IN UINTN Priority
// );
ASM_PFX(ArmGicV3SetPriorityMask):
ASM_FUNC(ArmGicV3SetPriorityMask)
mcr p15, 0, r0, c4, c6, 0 //ICC_PMR
bx lr
@ -93,6 +81,6 @@ ASM_PFX(ArmGicV3SetPriorityMask):
//ArmGicV3SetBinaryPointer (
// IN UINTN BinaryPoint
// );
ASM_PFX(ArmGicV3SetBinaryPointer):
ASM_FUNC(ArmGicV3SetBinaryPointer)
mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1
bx lr