mirror of https://github.com/acidanthera/audk.git
MdePkg/Register/Amd: define GHCB macro for Register GPA structure
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 An SEV-SNP guest is required to perform the GHCB GPA registration. See the GHCB specification for further details. Cc: James Bottomley <jejb@linux.ibm.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Erdem Aktas <erdemaktas@google.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Message-Id: <20210519181949.6574-5-brijesh.singh@amd.com>
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@ -53,6 +53,11 @@ typedef union {
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UINT64 Features:52;
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UINT64 Features:52;
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} GhcbHypervisorFeatures;
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} GhcbHypervisorFeatures;
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struct {
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UINT64 Function:12;
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UINT64 GuestFrameNumber:52;
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} GhcbGpaRegister;
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VOID *Ghcb;
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VOID *Ghcb;
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UINT64 GhcbPhysicalAddress;
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UINT64 GhcbPhysicalAddress;
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@ -62,6 +67,8 @@ typedef union {
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#define GHCB_INFO_SEV_INFO_GET 2
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#define GHCB_INFO_SEV_INFO_GET 2
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#define GHCB_INFO_CPUID_REQUEST 4
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#define GHCB_INFO_CPUID_REQUEST 4
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#define GHCB_INFO_CPUID_RESPONSE 5
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#define GHCB_INFO_CPUID_RESPONSE 5
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#define GHCB_INFO_GHCB_GPA_REGISTER_REQUEST 18
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#define GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE 19
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#define GHCB_HYPERVISOR_FEATURES_REQUEST 128
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#define GHCB_HYPERVISOR_FEATURES_REQUEST 128
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#define GHCB_HYPERVISOR_FEATURES_RESPONSE 129
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#define GHCB_HYPERVISOR_FEATURES_RESPONSE 129
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#define GHCB_INFO_TERMINATE_REQUEST 256
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#define GHCB_INFO_TERMINATE_REQUEST 256
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