tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

SourceLevelDebugPkg DebugCommUsb3: Refine some formats/comments 

Refine some formats/comments and remove some unused prototypes.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
This commit is contained in:
Star Zeng 2018-03-01 10:10:29 +08:00
parent 3ecca00330
commit f0c562761f
2 changed files with 13 additions and 50 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Common.c
View File

@ -85,15 +85,15 @@ XhcClearR32Bit(
Write the data to the XHCI debug register.
@param Handle Debug port handle.
@param Offset The offset of the runtime register.
@param Offset The offset of the debug register.
@param Data The data to write.
**/
VOID
XhcWriteDebugReg (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Data
IN UINT32 Offset,
IN UINT32 Data
)
{
EFI_PHYSICAL_ADDRESS DebugCapabilityBase;
@ -116,7 +116,7 @@ XhcWriteDebugReg (
UINT32
XhcReadDebugReg (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset
IN UINT32 Offset
)
{
UINT32 Data;
@ -129,16 +129,16 @@ XhcReadDebugReg (
}
/**
Set one bit of the runtime register while keeping other bits.
Set one bit of the debug register while keeping other bits.
@param Handle Debug port handle.
@param Offset The offset of the runtime register.
@param Offset The offset of the debug register.
@param Bit The bit mask of the register to set.
**/
VOID
XhcSetDebugRegBit (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Bit
)
@ -216,7 +216,7 @@ UpdateXhcResource (
@param Handle Debug port handle.
@retval RETURN_UNSUPPORTED The usb host controller does not supported usb debug port capability.
@retval RETURN_UNSUPPORTED The usb host controller does not support usb debug port capability.
@retval RETURN_SUCCESS Get bar and offset successfully.
**/

47
SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/DebugCommunicationLibUsb3Internal.h
View File

@ -1,7 +1,7 @@
/** @file
Debug Port Library implementation based on usb3 debug port.
Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -540,7 +540,7 @@ typedef struct _USB3_DEBUG_PORT_INSTANCE {
UINT32
XhcReadDebugReg (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset
IN UINT32 Offset
);
/**
@ -554,8 +554,8 @@ XhcReadDebugReg (
VOID
XhcSetDebugRegBit (
IN USB3_DEBUG_PORT_HANDLE *Handle,
IN UINT32 Offset,
IN UINT32 Bit
IN UINT32 Offset,
IN UINT32 Bit
);
/**
@ -573,43 +573,6 @@ XhcWriteDebugReg (
IN UINT32 Data
);
/**
Discover the USB3 debug device.
@param Handle Debug port handle.
@retval RETURN_SUCCESS The serial device was initialized.
@retval RETURN_DEVICE_ERROR The serial device could not be initialized.
**/
RETURN_STATUS
DiscoverUsb3DebugPort(
USB3_DEBUG_PORT_HANDLE *Handle
);
/**
Initialize the Serial Device hardware.
@param Handle Debug port handle.
@retval RETURN_SUCCESS The serial device was initialized successfully.
@retval !RETURN_SUCCESS Error.
**/
RETURN_STATUS
InitializeUsb3DebugPort (
USB3_DEBUG_PORT_HANDLE *Handle
);
/**
Return XHCI MMIO base address.
**/
EFI_PHYSICAL_ADDRESS
GetXhciBaseAddress (
VOID
);
/**
Verifies if the bit positions specified by a mask are set in a register.
@ -728,4 +691,4 @@ XhcDataTransfer (
IN UINTN Timeout
);
#endif //__SERIAL_PORT_LIB_USB__
#endif //__USB3_DEBUG_PORT_LIB_INTERNAL__