SecurityPkg: Cache TPM interface type info

Cache TPM interface type info to avoid excessive interface ID register read

Cc: Long Qin <qin.long@intel.com>
Cc: Yao Jiewen <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Long Qin <qin.long@intel.com>
This commit is contained in:
Zhang, Chao B 2018-05-08 14:51:57 +08:00
parent 796ef9da06
commit f15cb995bb
13 changed files with 148 additions and 145 deletions

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@ -1,7 +1,7 @@
/** @file
This library abstract how to access TPM2 hardware device.
Copyright (c) 2013, Intel Corporation. All rights reserved. <BR>
Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. <BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -17,6 +17,16 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include <Uefi.h>
//
// Used in PcdActiveTpmInterfaceType to identify TPM interface type
//
typedef enum {
Tpm2PtpInterfaceTis,
Tpm2PtpInterfaceFifo,
Tpm2PtpInterfaceCrb,
Tpm2PtpInterfaceMax,
} TPM2_PTP_INTERFACE_TYPE;
/**
This service enables the sending of commands to the TPM2.

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@ -2,7 +2,7 @@
This library is TPM2 DTPM device lib.
Choosing this library means platform uses and only uses DTPM device as TPM2 engine.
Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved. <BR>
Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. <BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -17,6 +17,19 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/Tpm2DeviceLib.h>
#include <Library/PcdLib.h>
/**
Return PTP interface type.
@param[in] Register Pointer to PTP register.
@return PTP interface type.
**/
TPM2_PTP_INTERFACE_TYPE
Tpm2GetPtpInterface (
IN VOID *Register
);
/**
This service enables the sending of commands to the TPM2.
@ -114,3 +127,26 @@ Tpm2RegisterTpm2DeviceLib (
{
return EFI_UNSUPPORTED;
}
/**
The function caches current active TPM interface type.
@retval EFI_SUCCESS DTPM2.0 instance is registered, or system dose not surpport registr DTPM2.0 instance
**/
EFI_STATUS
EFIAPI
Tpm2DeviceLibConstructor (
VOID
)
{
TPM2_PTP_INTERFACE_TYPE PtpInterface;
//
// Cache current active TpmInterfaceType only when needed
//
if (PcdGet8(PcdActiveTpmInterfaceType) == 0xFF) {
PtpInterface = Tpm2GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
PcdSet8S(PcdActiveTpmInterfaceType, PtpInterface);
}
return EFI_SUCCESS;
}

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@ -10,7 +10,7 @@
# used for every TPM 2.0 command. Choosing this library means platform uses and
# only uses TPM 2.0 DTPM device.
#
# Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -27,8 +27,8 @@
FILE_GUID = E54A3327-A345-4068-8842-70AC0D519855
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = Tpm2DeviceLib
LIBRARY_CLASS = Tpm2DeviceLib|PEIM DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER
Constructor = Tpm2DeviceLibConstructor
#
# The following information is for reference only and not required by the build tools.
#
@ -50,6 +50,8 @@
IoLib
TimerLib
DebugLib
PcdLib
[Pcd]
gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress ## CONSUMES
gEfiSecurityPkgTokenSpaceGuid.PcdActiveTpmInterfaceType ## PRODUCES

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@ -3,7 +3,7 @@
It can be registered to Tpm2 Device router, to be active TPM2 engine,
based on platform setting.
Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved. <BR>
Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. <BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -18,9 +18,22 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/Tpm2DeviceLib.h>
#include <Library/PcdLib.h>
#include <Guid/TpmInstance.h>
/**
Return PTP interface type.
@param[in] Register Pointer to PTP register.
@return PTP interface type.
**/
TPM2_PTP_INTERFACE_TYPE
Tpm2GetPtpInterface (
IN VOID *Register
);
/**
Dump PTP register information.
@ -72,7 +85,7 @@ TPM2_DEVICE_INTERFACE mDTpm2InternalTpm2Device = {
};
/**
The function register DTPM2.0 instance.
The function register DTPM2.0 instance and caches current active TPM interface type.
@retval EFI_SUCCESS DTPM2.0 instance is registered, or system dose not surpport registr DTPM2.0 instance
**/
@ -83,6 +96,7 @@ Tpm2InstanceLibDTpmConstructor (
)
{
EFI_STATUS Status;
TPM2_PTP_INTERFACE_TYPE PtpInterface;
Status = Tpm2RegisterTpm2DeviceLib (&mDTpm2InternalTpm2Device);
if ((Status == EFI_SUCCESS) || (Status == EFI_UNSUPPORTED)) {
@ -90,6 +104,13 @@ Tpm2InstanceLibDTpmConstructor (
// Unsupported means platform policy does not need this instance enabled.
//
if (Status == EFI_SUCCESS) {
//
// Cache current active TpmInterfaceType only when needed
//
if (PcdGet8(PcdActiveTpmInterfaceType) == 0xFF) {
PtpInterface = Tpm2GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
PcdSet8S(PcdActiveTpmInterfaceType, PtpInterface);
}
DumpPtpInfo ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
}
return EFI_SUCCESS;

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@ -5,7 +5,7 @@
# engine, based on platform setting. It supports both TIS (TPM Interface Specification)
# and PTP (Platform TPM Profile) functions.
#
# Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -46,6 +46,8 @@
IoLib
TimerLib
DebugLib
PcdLib
[Pcd]
gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress ## CONSUMES
gEfiSecurityPkgTokenSpaceGuid.PcdActiveTpmInterfaceType ## PRODUCES

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@ -25,13 +25,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include <IndustryStandard/TpmPtp.h>
#include <IndustryStandard/TpmTis.h>
typedef enum {
PtpInterfaceTis,
PtpInterfaceFifo,
PtpInterfaceCrb,
PtpInterfaceMax,
} PTP_INTERFACE_TYPE;
//
// Execution of the command may take from several seconds to minutes for certain
// commands, such as key generation.
@ -370,7 +363,7 @@ TisPcRequestUseTpm (
@return PTP interface type.
**/
PTP_INTERFACE_TYPE
TPM2_PTP_INTERFACE_TYPE
Tpm2GetPtpInterface (
IN VOID *Register
)
@ -379,7 +372,7 @@ Tpm2GetPtpInterface (
PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability;
if (!Tpm2IsPtpPresence (Register)) {
return PtpInterfaceMax;
return Tpm2PtpInterfaceMax;
}
//
// Check interface id
@ -390,15 +383,15 @@ Tpm2GetPtpInterface (
if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) &&
(InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) &&
(InterfaceId.Bits.CapCRB != 0)) {
return PtpInterfaceCrb;
return Tpm2PtpInterfaceCrb;
}
if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) &&
(InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) &&
(InterfaceId.Bits.CapFIFO != 0) &&
(InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) {
return PtpInterfaceFifo;
return Tpm2PtpInterfaceFifo;
}
return PtpInterfaceTis;
return Tpm2PtpInterfaceTis;
}
/**
@ -417,7 +410,7 @@ DumpPtpInfo (
UINT16 Vid;
UINT16 Did;
UINT8 Rid;
PTP_INTERFACE_TYPE PtpInterface;
TPM2_PTP_INTERFACE_TYPE PtpInterface;
if (!Tpm2IsPtpPresence (Register)) {
return ;
@ -458,16 +451,16 @@ DumpPtpInfo (
Vid = 0xFFFF;
Did = 0xFFFF;
Rid = 0xFF;
PtpInterface = Tpm2GetPtpInterface (Register);
PtpInterface = PcdGet8(PcdActiveTpmInterfaceType);
DEBUG ((EFI_D_INFO, "PtpInterface - %x\n", PtpInterface));
switch (PtpInterface) {
case PtpInterfaceCrb:
case Tpm2PtpInterfaceCrb:
Vid = MmioRead16 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->Vid);
Did = MmioRead16 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->Did);
Rid = (UINT8)InterfaceId.Bits.Rid;
break;
case PtpInterfaceFifo:
case PtpInterfaceTis:
case Tpm2PtpInterfaceFifo:
case Tpm2PtpInterfaceTis:
Vid = MmioRead16 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->Vid);
Did = MmioRead16 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->Did);
Rid = MmioRead8 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->Rid);
@ -501,11 +494,11 @@ DTpm2SubmitCommand (
IN UINT8 *OutputParameterBlock
)
{
PTP_INTERFACE_TYPE PtpInterface;
TPM2_PTP_INTERFACE_TYPE PtpInterface;
PtpInterface = Tpm2GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
PtpInterface = PcdGet8(PcdActiveTpmInterfaceType);
switch (PtpInterface) {
case PtpInterfaceCrb:
case Tpm2PtpInterfaceCrb:
return PtpCrbTpmCommand (
(PTP_CRB_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress),
InputParameterBlock,
@ -513,8 +506,8 @@ DTpm2SubmitCommand (
OutputParameterBlock,
OutputParameterBlockSize
);
case PtpInterfaceFifo:
case PtpInterfaceTis:
case Tpm2PtpInterfaceFifo:
case Tpm2PtpInterfaceTis:
return Tpm2TisTpmCommand (
(TIS_PC_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress),
InputParameterBlock,
@ -540,14 +533,14 @@ DTpm2RequestUseTpm (
VOID
)
{
PTP_INTERFACE_TYPE PtpInterface;
TPM2_PTP_INTERFACE_TYPE PtpInterface;
PtpInterface = Tpm2GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
PtpInterface = PcdGet8(PcdActiveTpmInterfaceType);
switch (PtpInterface) {
case PtpInterfaceCrb:
case Tpm2PtpInterfaceCrb:
return PtpCrbRequestUseTpm ((PTP_CRB_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress));
case PtpInterfaceFifo:
case PtpInterfaceTis:
case Tpm2PtpInterfaceFifo:
case Tpm2PtpInterfaceTis:
return TisPcRequestUseTpm ((TIS_PC_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress));
default:
return EFI_NOT_FOUND;

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@ -464,5 +464,15 @@
# @Prompt Hash Algorithm bitmap.
gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap|0xFFFFFFFF|UINT32|0x00010016
## This PCD indicates current active TPM interface type.
# Accodingt to TCG PTP spec 1.3, there are 3 types defined in TPM2_PTP_INTERFACE_TYPE.<BR>
# 0x00 - FIFO interface as defined in TIS 1.3 is active.<BR>
# 0x01 - FIFO interface as defined in PTP for TPM 2.0 is active.<BR>
# 0x02 - CRB interface is active.<BR>
# 0xFF - Contains no current active TPM interface type.<BR>
#
# @Prompt current active TPM interface type.
gEfiSecurityPkgTokenSpaceGuid.PcdActiveTpmInterfaceType|0xFF|UINT8|0x0001001E
[UserExtensions.TianoCore."ExtraFiles"]
SecurityPkgExtra.uni

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@ -247,3 +247,11 @@
#string STR_gEfiSecurityPkgTokenSpaceGuid_PcdTpm2PossibleIrqNumBuf_HELP #language en-US "This PCD defines possible TPM2 interrupt number in a platform reported by _PRS control method.\n"
"If PcdTpm2CurrentIrqNum set to 0, _PRS will not report any possible TPM2 interrupt numbers."
#string STR_gEfiSecurityPkgTokenSpaceGuid_PcdActiveTpmInterfaceType_PROMPT #language en-US "Current active TPM interface type"
#string STR_gEfiSecurityPkgTokenSpaceGuid_PcdActiveTpmInterfaceType_HELP #language en-US "This PCD indicates current active TPM interface type.\n"
"0x00 - FIFO interface as defined in TIS 1.3 is active.<BR>\n"
"0x01 - FIFO interface as defined in PTP for TPM 2.0 is active.<BR>\n"
"0x02 - CRB interface is active.<BR>\n"
"0xFF - Contains no current active TPM interface type<BR>"

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@ -4,7 +4,7 @@
# By this module, user may select TPM device, clear TPM state, etc.
# NOTE: This module is only for reference only, each platform should have its own setup page.
#
# Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -79,6 +79,7 @@
gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress ## CONSUMES
gEfiSecurityPkgTokenSpaceGuid.PcdTcgPhysicalPresenceInterfaceVer ## CONSUMES
gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev ## CONSUMES
gEfiSecurityPkgTokenSpaceGuid.PcdActiveTpmInterfaceType ## CONSUMES
[Depex]
gEfiTcg2ProtocolGuid AND

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@ -2,7 +2,7 @@
HII Config Access protocol implementation of TCG2 configuration module.
NOTE: This module is only for reference only, each platform should have its own setup page.
Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2018 Hewlett Packard Enterprise Development LP<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@ -17,7 +17,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include "Tcg2ConfigImpl.h"
#include <Library/PcdLib.h>
#include <Library/Tpm2CommandLib.h>
#include <Library/Tpm2DeviceLib.h>
#include <Library/IoLib.h>
#include <Guid/TpmInstance.h>
#include <IndustryStandard/TpmPtp.h>
@ -60,41 +62,6 @@ HII_VENDOR_DEVICE_PATH mTcg2HiiVendorDevicePath = {
UINT8 mCurrentPpRequest;
/**
Return PTP interface type.
@param[in] Register Pointer to PTP register.
@return PTP interface type.
**/
UINT8
GetPtpInterface (
IN VOID *Register
)
{
PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;
PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability;
//
// Check interface id
//
InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
InterfaceCapability.Uint32 = MmioRead32 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);
if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) &&
(InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) &&
(InterfaceId.Bits.CapCRB != 0)) {
return TPM_DEVICE_INTERFACE_PTP_CRB;
}
if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) &&
(InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) &&
(InterfaceId.Bits.CapFIFO != 0) &&
(InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) {
return TPM_DEVICE_INTERFACE_PTP_FIFO;
}
return TPM_DEVICE_INTERFACE_TIS;
}
/**
Return if PTP CRB is supported.
@ -153,6 +120,7 @@ IsPtpFifoSupported (
/**
Set PTP interface type.
Do not update PcdActiveTpmInterfaceType here because interface change only happens on next _TPM_INIT
@param[in] Register Pointer to PTP register.
@param[in] PtpInterface PTP interface type.
@ -168,12 +136,12 @@ SetPtpInterface (
IN UINT8 PtpInterface
)
{
UINT8 PtpInterfaceCurrent;
TPM2_PTP_INTERFACE_TYPE PtpInterfaceCurrent;
PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;
PtpInterfaceCurrent = GetPtpInterface (Register);
if ((PtpInterfaceCurrent != TPM_DEVICE_INTERFACE_PTP_FIFO) &&
(PtpInterfaceCurrent != TPM_DEVICE_INTERFACE_PTP_CRB)) {
PtpInterfaceCurrent = PcdGet8(PcdActiveTpmInterfaceType);
if ((PtpInterfaceCurrent != Tpm2PtpInterfaceFifo) &&
(PtpInterfaceCurrent != Tpm2PtpInterfaceCrb)) {
return EFI_UNSUPPORTED;
}
InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
@ -182,14 +150,14 @@ SetPtpInterface (
}
switch (PtpInterface) {
case TPM_DEVICE_INTERFACE_PTP_FIFO:
case Tpm2PtpInterfaceFifo:
if (InterfaceId.Bits.CapFIFO == 0) {
return EFI_UNSUPPORTED;
}
InterfaceId.Bits.InterfaceSelector = PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_FIFO;
MmioWrite32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId, InterfaceId.Uint32);
return EFI_SUCCESS;
case TPM_DEVICE_INTERFACE_PTP_CRB:
case Tpm2PtpInterfaceCrb:
if (InterfaceId.Bits.CapCRB == 0) {
return EFI_UNSUPPORTED;
}
@ -825,7 +793,7 @@ InstallTcg2ConfigForm (
TPML_PCR_SELECTION Pcrs;
CHAR16 TempBuffer[1024];
TCG2_CONFIGURATION_INFO Tcg2ConfigInfo;
UINT8 TpmDeviceInterfaceDetected;
TPM2_PTP_INTERFACE_TYPE TpmDeviceInterfaceDetected;
DriverHandle = NULL;
ConfigAccess = &PrivateData->ConfigAccess;
@ -930,15 +898,15 @@ InstallTcg2ConfigForm (
// Update TPM device interface type
//
if (PrivateData->TpmDeviceDetected == TPM_DEVICE_2_0_DTPM) {
TpmDeviceInterfaceDetected = GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
TpmDeviceInterfaceDetected = PcdGet8(PcdActiveTpmInterfaceType);
switch (TpmDeviceInterfaceDetected) {
case TPM_DEVICE_INTERFACE_TIS:
case Tpm2PtpInterfaceTis:
HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"TIS", NULL);
break;
case TPM_DEVICE_INTERFACE_PTP_FIFO:
case Tpm2PtpInterfaceFifo:
HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"PTP FIFO", NULL);
break;
case TPM_DEVICE_INTERFACE_PTP_CRB:
case Tpm2PtpInterfaceCrb:
HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"PTP CRB", NULL);
break;
default:
@ -948,13 +916,13 @@ InstallTcg2ConfigForm (
Tcg2ConfigInfo.TpmDeviceInterfaceAttempt = TpmDeviceInterfaceDetected;
switch (TpmDeviceInterfaceDetected) {
case TPM_DEVICE_INTERFACE_TIS:
case Tpm2PtpInterfaceTis:
Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = FALSE;
Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported = FALSE;
HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT), L"TIS", NULL);
break;
case TPM_DEVICE_INTERFACE_PTP_FIFO:
case TPM_DEVICE_INTERFACE_PTP_CRB:
case Tpm2PtpInterfaceFifo:
case Tpm2PtpInterfaceCrb:
Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = IsPtpFifoSupported((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported = IsPtpCrbSupported((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
TempBuffer[0] = 0;

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@ -22,56 +22,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include "Tcg2Smm.h"
typedef enum {
PtpInterfaceTis,
PtpInterfaceFifo,
PtpInterfaceCrb,
PtpInterfaceMax,
} PTP_INTERFACE_TYPE;
/**
Return PTP interface type.
@param[in] Register Pointer to PTP register.
@return PTP interface type.
**/
PTP_INTERFACE_TYPE
GetPtpInterface (
IN VOID *Register
)
{
PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;
PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability;
//
// Check interface id
//
InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);
InterfaceCapability.Uint32 = MmioRead32 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);
if (InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_TIS) {
return PtpInterfaceTis;
}
if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) &&
(InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) &&
(InterfaceId.Bits.CapCRB != 0)) {
return PtpInterfaceCrb;
}
if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) &&
(InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) &&
(InterfaceId.Bits.CapFIFO != 0) &&
(InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) {
return PtpInterfaceFifo;
}
//
// No Ptp interface available
//
return PtpInterfaceMax;
}
EFI_TPM2_ACPI_TABLE mTpm2AcpiTemplate = {
{
@ -785,7 +735,7 @@ PublishTpm2 (
UINTN TableKey;
UINT64 OemTableId;
EFI_TPM2_ACPI_CONTROL_AREA *ControlArea;
PTP_INTERFACE_TYPE InterfaceType;
TPM2_PTP_INTERFACE_TYPE InterfaceType;
mTpm2AcpiTemplate.Header.Revision = PcdGet8(PcdTpm2AcpiTableRev);
DEBUG((DEBUG_INFO, "Tpm2 ACPI table revision is %d\n", mTpm2AcpiTemplate.Header.Revision));
@ -812,9 +762,9 @@ PublishTpm2 (
sizeof(mTpm2AcpiTemplate)
);
InterfaceType = GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));
InterfaceType = PcdGet8(PcdActiveTpmInterfaceType);
switch (InterfaceType) {
case PtpInterfaceCrb:
case Tpm2PtpInterfaceCrb:
mTpm2AcpiTemplate.StartMethod = EFI_TPM2_ACPI_TABLE_START_METHOD_COMMAND_RESPONSE_BUFFER_INTERFACE;
mTpm2AcpiTemplate.AddressOfControlArea = PcdGet64 (PcdTpmBaseAddress) + 0x40;
ControlArea = (EFI_TPM2_ACPI_CONTROL_AREA *)(UINTN)mTpm2AcpiTemplate.AddressOfControlArea;
@ -823,8 +773,8 @@ PublishTpm2 (
ControlArea->Command = PcdGet64 (PcdTpmBaseAddress) + 0x80;
ControlArea->Response = PcdGet64 (PcdTpmBaseAddress) + 0x80;
break;
case PtpInterfaceFifo:
case PtpInterfaceTis:
case Tpm2PtpInterfaceFifo:
case Tpm2PtpInterfaceTis:
break;
default:
DEBUG((EFI_D_ERROR, "TPM2 InterfaceType get error! %d\n", InterfaceType));

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@ -40,6 +40,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include <Library/IoLib.h>
#include <Library/PrintLib.h>
#include <Library/PcdLib.h>
#include <Library/Tpm2DeviceLib.h>
#include <IndustryStandard/TpmPtp.h>

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@ -85,6 +85,7 @@
gEfiSecurityPkgTokenSpaceGuid.PcdTpmPlatformClass ## SOMETIMES_CONSUMES
gEfiSecurityPkgTokenSpaceGuid.PcdTpm2CurrentIrqNum ## CONSUMES
gEfiSecurityPkgTokenSpaceGuid.PcdTpm2PossibleIrqNumBuf ## CONSUMES
gEfiSecurityPkgTokenSpaceGuid.PcdActiveTpmInterfaceType ## CONSUMES
[Depex]
gEfiAcpiTableProtocolGuid AND