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Temporarily remove the C implementation of some GCC assembly files in MdePkg. They are kept in repository and will be re-evaluate later.

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git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10045 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
qhuang8 2010-02-23 04:56:55 +00:00
parent f03ccf59ba
commit f18f2882e9
8 changed files with 2 additions and 4020 deletions
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4
MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
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@ -4,7 +4,7 @@
# CPU Library implemented using ASM functions for IA-32 and X64, # CPU Library implemented using ASM functions for IA-32 and X64,
# PAL CALLs for IPF, and empty functions for EBC. # PAL CALLs for IPF, and empty functions for EBC.
# #
# Copyright (c) 2007 - 2008, Intel Corporation.<BR> # Copyright (c) 2007 - 2010, Intel Corporation.<BR>
# Portions Copyright (c) 2008-2009 Apple Inc. All rights reserved. # Portions Copyright (c) 2008-2009 Apple Inc. All rights reserved.
# #
# All rights reserved. This program and the accompanying materials # All rights reserved. This program and the accompanying materials
@ -30,8 +30,6 @@
# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM # VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM
# #
[Sources.common]
[Sources.IA32] [Sources.IA32]
Ia32/CpuSleep.c | MSFT Ia32/CpuSleep.c | MSFT
Ia32/CpuFlushTlb.c | MSFT Ia32/CpuFlushTlb.c | MSFT

32
MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlbGcc.c
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@ -1,32 +0,0 @@
/** @file
CpuFlushTlb function for Ia32/X64 GCC.
Copyright (c) 2006 - 2008, Intel Corporation<BR>
Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include <Library/BaseLib.h>
/**
Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
**/
VOID
EFIAPI
CpuFlushTlb (
VOID
)
{
AsmWriteCr3 (AsmReadCr3 ());
}

33
MdePkg/Library/BaseCpuLib/Ia32/CpuSleepGcc.c
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@ -1,33 +0,0 @@
/** @file
CpuSleep function for Ia32/X64 GCC.
Copyright (c) 2006 - 2008, Intel Corporation<BR>
Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
/**
Places the CPU in a sleep state until an interrupt is received.
Places the CPU in a sleep state until an interrupt is received. If interrupts
are disabled prior to calling this function, then the CPU will be placed in a
sleep state indefinitely.
**/
VOID
EFIAPI
CpuSleep (
VOID
)
{
__asm__ __volatile__ ("hlt"::: "memory");
}

1758
MdePkg/Library/BaseLib/Ia32/GccInline.c
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File diff suppressed because it is too large Load Diff

1806
MdePkg/Library/BaseLib/X64/GccInline.c
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File diff suppressed because it is too large Load Diff

4
MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
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@ -1,7 +1,7 @@
#/** @file #/** @file
# Base Synchronization Library implementation. # Base Synchronization Library implementation.
# #
# Copyright (c) 2007 - 2008, Intel Corporation.<BR> # Copyright (c) 2007 - 2010, Intel Corporation.<BR>
# Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR> # Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>
# #
# All rights reserved. This program and the accompanying materials # All rights reserved. This program and the accompanying materials
@ -41,7 +41,6 @@
Ia32/InterlockedIncrement.asm | INTEL Ia32/InterlockedIncrement.asm | INTEL
Synchronization.c | INTEL Synchronization.c | INTEL
# Ia32/GccInline.c | GCC
Ia32/InterlockedCompareExchange64.S | GCC Ia32/InterlockedCompareExchange64.S | GCC
Ia32/InterlockedCompareExchange32.S | GCC Ia32/InterlockedCompareExchange32.S | GCC
Ia32/InterlockedDecrement.S | GCC Ia32/InterlockedDecrement.S | GCC
@ -64,7 +63,6 @@
Synchronization.c | INTEL Synchronization.c | INTEL
# X64/GccInline.c | GCC
X64/InterlockedIncrement.S | GCC X64/InterlockedIncrement.S | GCC
X64/InterlockedDecrement.S | GCC X64/InterlockedDecrement.S | GCC
X64/InterlockedCompareExchange64.S | GCC X64/InterlockedCompareExchange64.S | GCC

193
MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c
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@ -1,193 +0,0 @@
/** @file
GCC inline implementation of BaseSynchronizationLib processor specific functions.
Copyright (c) 2006 - 2009, Intel Corporation<BR>
Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
/**
Performs an atomic increment of an 32-bit unsigned integer.
Performs an atomic increment of the 32-bit unsigned integer specified by
Value and returns the incremented value. The increment operation must be
performed using MP safe mechanisms. The state of the return value is not
guaranteed to be MP safe.
@param Value A pointer to the 32-bit value to increment.
@return The incremented value.
**/
UINT32
EFIAPI
InternalSyncIncrement (
IN volatile UINT32 *Value
)
{
UINT32 Result;
__asm__ __volatile__ (
"lock \n\t"
"incl %2 \n\t"
"movl %2, %%eax "
: "=a" (Result), // %0
"=m" (*Value) // %1
: "m" (*Value) // %2
: "memory",
"cc"
);
return Result;
}
/**
Performs an atomic decrement of an 32-bit unsigned integer.
Performs an atomic decrement of the 32-bit unsigned integer specified by
Value and returns the decremented value. The decrement operation must be
performed using MP safe mechanisms. The state of the return value is not
guaranteed to be MP safe.
@param Value A pointer to the 32-bit value to decrement.
@return The decremented value.
**/
UINT32
EFIAPI
InternalSyncDecrement (
IN volatile UINT32 *Value
)
{
UINT32 Result;
__asm__ __volatile__ (
"lock \n\t"
"decl %2 \n\t"
"movl %2, %%eax "
: "=a" (Result), // %0
"=m" (*Value) // %1
: "m" (*Value) // %2
: "memory",
"cc"
);
return Result;
}
/**
Performs an atomic compare exchange operation on a 32-bit unsigned integer.
Performs an atomic compare exchange operation on the 32-bit unsigned integer
specified by Value. If Value is equal to CompareValue, then Value is set to
ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
then Value is returned. The compare exchange operation must be performed using
MP safe mechanisms.
@param Value A pointer to the 32-bit value for the compare exchange
operation.
@param CompareValue 32-bit value used in compare operation.
@param ExchangeValue 32-bit value used in exchange operation.
@return The original *Value before exchange.
**/
UINT32
EFIAPI
InternalSyncCompareExchange32 (
IN OUT volatile UINT32 *Value,
IN UINT32 CompareValue,
IN UINT32 ExchangeValue
)
{
// GCC 4.1 and forward supports atomic builtins
#if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)))
return __sync_val_compare_and_swap (Value, CompareValue, ExchangeValue);
#else
__asm__ __volatile__ (
" \n\t"
"lock \n\t"
"cmpxchgl %1, %2 \n\t"
: "=a" (CompareValue) // %0
: "q" (ExchangeValue), // %1
"m" (*Value), // %2
"0" (CompareValue) // %4
: "memory",
"cc"
);
return CompareValue;
#endif
}
/**
Performs an atomic compare exchange operation on a 64-bit unsigned integer.
Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
The compare exchange operation must be performed using MP safe mechanisms.
@param Value A pointer to the 64-bit value for the compare exchange
operation.
@param CompareValue 64-bit value used in compare operation.
@param ExchangeValue 64-bit value used in exchange operation.
@return The original *Value before exchange.
**/
UINT64
EFIAPI
InternalSyncCompareExchange64 (
IN OUT volatile UINT64 *Value,
IN UINT64 CompareValue,
IN UINT64 ExchangeValue
)
{
// GCC 4.1 and forward supports atomic builtins
#if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)))
return __sync_val_compare_and_swap (Value, CompareValue, ExchangeValue);
#else
__asm__ __volatile__ (
" \n\t"
"push %%ebx \n\t"
"movl %2,%%ebx \n\t"
"lock \n\t"
"cmpxchg8b (%1) \n\t"
"pop %%ebx \n\t"
: "+A" (CompareValue) // %0
: "S" (Value), // %1
"r" ((UINT32) ExchangeValue), // %2
"c" ((UINT32) (ExchangeValue >> 32)) // %3
: "memory",
"cc"
);
return CompareValue;
#endif
}

192
MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c
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@ -1,192 +0,0 @@
/** @file
GCC inline implementation of BaseSynchronizationLib processor specific functions.
Copyright (c) 2006 - 2009, Intel Corporation<BR>
Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
/**
Performs an atomic increment of an 32-bit unsigned integer.
Performs an atomic increment of the 32-bit unsigned integer specified by
Value and returns the incremented value. The increment operation must be
performed using MP safe mechanisms. The state of the return value is not
guaranteed to be MP safe.
@param Value A pointer to the 32-bit value to increment.
@return The incremented value.
**/
UINT32
EFIAPI
InternalSyncIncrement (
IN volatile UINT32 *Value
)
{
UINT32 Result;
__asm__ __volatile__ (
"lock \n\t"
"incl %2 \n\t"
"mov %2, %%eax "
: "=a" (Result), // %0
"=m" (*Value) // %1
: "m" (*Value) // %2
: "memory",
"cc"
);
return Result;
}
/**
Performs an atomic decrement of an 32-bit unsigned integer.
Performs an atomic decrement of the 32-bit unsigned integer specified by
Value and returns the decremented value. The decrement operation must be
performed using MP safe mechanisms. The state of the return value is not
guaranteed to be MP safe.
@param Value A pointer to the 32-bit value to decrement.
@return The decremented value.
**/
UINT32
EFIAPI
InternalSyncDecrement (
IN volatile UINT32 *Value
)
{
UINT32 Result;
__asm__ __volatile__ (
"lock \n\t"
"decl %2 \n\t"
"mov %2, %%eax "
: "=a" (Result), // %0
"=m" (*Value) // %1
: "m" (*Value) // %2
: "memory",
"cc"
);
return Result;
}
/**
Performs an atomic compare exchange operation on a 32-bit unsigned integer.
Performs an atomic compare exchange operation on the 32-bit unsigned integer
specified by Value. If Value is equal to CompareValue, then Value is set to
ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
then Value is returned. The compare exchange operation must be performed using
MP safe mechanisms.
@param Value A pointer to the 32-bit value for the compare exchange
operation.
@param CompareValue 32-bit value used in compare operation.
@param ExchangeValue 32-bit value used in exchange operation.
@return The original *Value before exchange.
**/
UINT32
EFIAPI
InternalSyncCompareExchange32 (
IN OUT volatile UINT32 *Value,
IN UINT32 CompareValue,
IN UINT32 ExchangeValue
)
{
// GCC 4.1 and forward supports atomic builtins
#if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)))
return __sync_val_compare_and_swap (Value, CompareValue, ExchangeValue);
#else
__asm__ __volatile__ (
"lock \n\t"
"cmpxchgl %3, %1 "
: "=a" (CompareValue), // %0
"=m" (*Value) // %1
: "a" (CompareValue), // %2
"r" (ExchangeValue), // %3
"m" (*Value)
: "memory",
"cc"
);
return CompareValue;
#endif
}
/**
Performs an atomic compare exchange operation on a 64-bit unsigned integer.
Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
The compare exchange operation must be performed using MP safe mechanisms.
@param Value A pointer to the 64-bit value for the compare exchange
operation.
@param CompareValue 64-bit value used in compare operation.
@param ExchangeValue 64-bit value used in exchange operation.
@return The original *Value before exchange.
**/
UINT64
EFIAPI
InternalSyncCompareExchange64 (
IN OUT volatile UINT64 *Value,
IN UINT64 CompareValue,
IN UINT64 ExchangeValue
)
{
// GCC 4.1 and forward supports atomic builtins
#if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)))
return __sync_val_compare_and_swap (Value, CompareValue, ExchangeValue);
#else
__asm__ __volatile__ (
"lock \n\t"
"cmpxchgq %3, %1 "
: "=a" (CompareValue), // %0
"=m" (*Value) // %1
: "a" (CompareValue), // %2
"r" (ExchangeValue), // %3
"m" (*Value)
: "memory",
"cc"
);
return CompareValue;
#endif
}