OvmfPkg/BaseMemEncryptLib: use the SEV_STATUS MSR value from workarea

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3582

Improve the MemEncryptSev{Es,Snp}IsEnabled() to use the SEV_STATUS MSR
value saved in the workarea. Since workarea is valid until the PEI phase,
so, for the Dxe phase use the PcdConfidentialComputingGuestAttr to
determine which SEV technology is enabled.

Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Acked-by: Jiewen Yao <jiewen.yao@intel.com>
This commit is contained in:
Brijesh Singh 2022-02-21 22:59:14 +08:00 committed by mergify[bot]
parent 63c50d3ff2
commit f1d1c337e7
6 changed files with 155 additions and 212 deletions

View File

@ -58,3 +58,4 @@
[Pcd] [Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask
gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr

View File

@ -16,83 +16,84 @@
#include <Register/Amd/Msr.h> #include <Register/Amd/Msr.h>
#include <Register/Cpuid.h> #include <Register/Cpuid.h>
#include <Uefi/UefiBaseType.h> #include <Uefi/UefiBaseType.h>
#include <ConfidentialComputingGuestAttr.h>
STATIC BOOLEAN mSevStatus = FALSE; STATIC UINT64 mCurrentAttr = 0;
STATIC BOOLEAN mSevEsStatus = FALSE; STATIC BOOLEAN mCurrentAttrRead = FALSE;
STATIC BOOLEAN mSevSnpStatus = FALSE;
STATIC BOOLEAN mSevStatusChecked = FALSE;
STATIC UINT64 mSevEncryptionMask = 0; STATIC UINT64 mSevEncryptionMask = 0;
STATIC BOOLEAN mSevEncryptionMaskSaved = FALSE; STATIC BOOLEAN mSevEncryptionMaskSaved = FALSE;
/** /**
Reads and sets the status of SEV features. The function check if the specified Attr is set.
**/ @param[in] CurrentAttr The current attribute.
@param[in] Attr The attribute to check.
@retval TRUE The specified Attr is set.
@retval FALSE The specified Attr is not set.
**/
STATIC STATIC
VOID BOOLEAN
EFIAPI AmdMemEncryptionAttrCheck (
InternalMemEncryptSevStatus ( IN UINT64 CurrentAttr,
VOID IN CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr
) )
{ {
UINT32 RegEax; switch (Attr) {
MSR_SEV_STATUS_REGISTER Msr; case CCAttrAmdSev:
CPUID_MEMORY_ENCRYPTION_INFO_EAX Eax;
BOOLEAN ReadSevMsr;
UINT64 EncryptionMask;
ReadSevMsr = FALSE;
EncryptionMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask);
if (EncryptionMask != 0) {
// //
// The MSR has been read before, so it is safe to read it again and avoid // SEV is automatically enabled if SEV-ES or SEV-SNP is active.
// having to validate the CPUID information.
// //
ReadSevMsr = TRUE; return CurrentAttr >= CCAttrAmdSev;
} else { case CCAttrAmdSevEs:
// //
// Check if memory encryption leaf exist // SEV-ES is automatically enabled if SEV-SNP is active.
// //
AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL); return CurrentAttr >= CCAttrAmdSevEs;
if (RegEax >= CPUID_MEMORY_ENCRYPTION_INFO) { case CCAttrAmdSevSnp:
// return CurrentAttr == CCAttrAmdSevSnp;
// CPUID Fn8000_001F[EAX] Bit 1 (Sev supported) default:
// return FALSE;
AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, &Eax.Uint32, NULL, NULL, NULL);
if (Eax.Bits.SevBit) {
ReadSevMsr = TRUE;
}
}
} }
}
if (ReadSevMsr) { /**
Check if the specified confidential computing attribute is active.
@param[in] Attr The attribute to check.
@retval TRUE The specified Attr is active.
@retval FALSE The specified Attr is not active.
**/
STATIC
BOOLEAN
EFIAPI
ConfidentialComputingGuestHas (
IN CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr
)
{
// //
// Check MSR_0xC0010131 Bit 0 (Sev Enabled) // Get the current CC attribute.
// //
Msr.Uint32 = AsmReadMsr32 (MSR_SEV_STATUS); // We avoid reading the PCD on every check because this routine could be indirectly
if (Msr.Bits.SevBit) { // called during the virtual pointer conversion. And its not safe to access the
mSevStatus = TRUE; // PCDs during the virtual pointer conversion.
//
if (!mCurrentAttrRead) {
mCurrentAttr = PcdGet64 (PcdConfidentialComputingGuestAttr);
mCurrentAttrRead = TRUE;
} }
// //
// Check MSR_0xC0010131 Bit 1 (Sev-Es Enabled) // If attr is for the AMD group then call AMD specific checks.
// //
if (Msr.Bits.SevEsBit) { if (((RShiftU64 (mCurrentAttr, 8)) & 0xff) == 1) {
mSevEsStatus = TRUE; return AmdMemEncryptionAttrCheck (mCurrentAttr, Attr);
} }
// return (mCurrentAttr == Attr);
// Check MSR_0xC0010131 Bit 2 (Sev-Snp Enabled)
//
if (Msr.Bits.SevSnpBit) {
mSevSnpStatus = TRUE;
}
}
mSevStatusChecked = TRUE;
} }
/** /**
@ -107,11 +108,7 @@ MemEncryptSevSnpIsEnabled (
VOID VOID
) )
{ {
if (!mSevStatusChecked) { return ConfidentialComputingGuestHas (CCAttrAmdSevSnp);
InternalMemEncryptSevStatus ();
}
return mSevSnpStatus;
} }
/** /**
@ -126,11 +123,7 @@ MemEncryptSevEsIsEnabled (
VOID VOID
) )
{ {
if (!mSevStatusChecked) { return ConfidentialComputingGuestHas (CCAttrAmdSevEs);
InternalMemEncryptSevStatus ();
}
return mSevEsStatus;
} }
/** /**
@ -145,11 +138,7 @@ MemEncryptSevIsEnabled (
VOID VOID
) )
{ {
if (!mSevStatusChecked) { return ConfidentialComputingGuestHas (CCAttrAmdSev);
InternalMemEncryptSevStatus ();
}
return mSevStatus;
} }
/** /**

View File

@ -58,6 +58,7 @@
[FixedPcd] [FixedPcd]
gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecValidatedEnd gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecValidatedEnd

View File

@ -17,82 +17,51 @@
#include <Register/Cpuid.h> #include <Register/Cpuid.h>
#include <Uefi/UefiBaseType.h> #include <Uefi/UefiBaseType.h>
STATIC BOOLEAN mSevStatus = FALSE;
STATIC BOOLEAN mSevEsStatus = FALSE;
STATIC BOOLEAN mSevSnpStatus = FALSE;
STATIC BOOLEAN mSevStatusChecked = FALSE;
STATIC UINT64 mSevEncryptionMask = 0;
STATIC BOOLEAN mSevEncryptionMaskSaved = FALSE;
/** /**
Reads and sets the status of SEV features. Read the workarea to determine whether SEV is enabled. If enabled,
then return the SevEsWorkArea pointer.
**/ **/
STATIC STATIC
VOID SEC_SEV_ES_WORK_AREA *
EFIAPI
GetSevEsWorkArea (
VOID
)
{
OVMF_WORK_AREA *WorkArea;
WorkArea = (OVMF_WORK_AREA *)FixedPcdGet32 (PcdOvmfWorkAreaBase);
//
// If its not SEV guest then SevEsWorkArea is not valid.
//
if ((WorkArea == NULL) || (WorkArea->Header.GuestType != GUEST_TYPE_AMD_SEV)) {
return NULL;
}
return (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase);
}
/**
Read the SEV Status MSR value from the workarea
**/
STATIC
UINT32
EFIAPI EFIAPI
InternalMemEncryptSevStatus ( InternalMemEncryptSevStatus (
VOID VOID
) )
{ {
UINT32 RegEax;
MSR_SEV_STATUS_REGISTER Msr;
CPUID_MEMORY_ENCRYPTION_INFO_EAX Eax;
BOOLEAN ReadSevMsr;
SEC_SEV_ES_WORK_AREA *SevEsWorkArea; SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
ReadSevMsr = FALSE; SevEsWorkArea = GetSevEsWorkArea ();
if (SevEsWorkArea == NULL) {
SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase); return 0;
if ((SevEsWorkArea != NULL) && (SevEsWorkArea->EncryptionMask != 0)) {
//
// The MSR has been read before, so it is safe to read it again and avoid
// having to validate the CPUID information.
//
ReadSevMsr = TRUE;
} else {
//
// Check if memory encryption leaf exist
//
AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
if (RegEax >= CPUID_MEMORY_ENCRYPTION_INFO) {
//
// CPUID Fn8000_001F[EAX] Bit 1 (Sev supported)
//
AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, &Eax.Uint32, NULL, NULL, NULL);
if (Eax.Bits.SevBit) {
ReadSevMsr = TRUE;
}
}
} }
if (ReadSevMsr) { return (UINT32)(UINTN)SevEsWorkArea->SevStatusMsrValue;
//
// Check MSR_0xC0010131 Bit 0 (Sev Enabled)
//
Msr.Uint32 = AsmReadMsr32 (MSR_SEV_STATUS);
if (Msr.Bits.SevBit) {
mSevStatus = TRUE;
}
//
// Check MSR_0xC0010131 Bit 1 (Sev-Es Enabled)
//
if (Msr.Bits.SevEsBit) {
mSevEsStatus = TRUE;
}
//
// Check MSR_0xC0010131 Bit 2 (Sev-Snp Enabled)
//
if (Msr.Bits.SevSnpBit) {
mSevSnpStatus = TRUE;
}
}
mSevStatusChecked = TRUE;
} }
/** /**
@ -107,11 +76,11 @@ MemEncryptSevSnpIsEnabled (
VOID VOID
) )
{ {
if (!mSevStatusChecked) { MSR_SEV_STATUS_REGISTER Msr;
InternalMemEncryptSevStatus ();
}
return mSevSnpStatus; Msr.Uint32 = InternalMemEncryptSevStatus ();
return Msr.Bits.SevSnpBit ? TRUE : FALSE;
} }
/** /**
@ -126,11 +95,11 @@ MemEncryptSevEsIsEnabled (
VOID VOID
) )
{ {
if (!mSevStatusChecked) { MSR_SEV_STATUS_REGISTER Msr;
InternalMemEncryptSevStatus ();
}
return mSevEsStatus; Msr.Uint32 = InternalMemEncryptSevStatus ();
return Msr.Bits.SevEsBit ? TRUE : FALSE;
} }
/** /**
@ -145,11 +114,11 @@ MemEncryptSevIsEnabled (
VOID VOID
) )
{ {
if (!mSevStatusChecked) { MSR_SEV_STATUS_REGISTER Msr;
InternalMemEncryptSevStatus ();
}
return mSevStatus; Msr.Uint32 = InternalMemEncryptSevStatus ();
return Msr.Bits.SevBit ? TRUE : FALSE;
} }
/** /**
@ -163,24 +132,12 @@ MemEncryptSevGetEncryptionMask (
VOID VOID
) )
{ {
if (!mSevEncryptionMaskSaved) {
SEC_SEV_ES_WORK_AREA *SevEsWorkArea; SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase); SevEsWorkArea = GetSevEsWorkArea ();
if (SevEsWorkArea != NULL) { if (SevEsWorkArea == NULL) {
mSevEncryptionMask = SevEsWorkArea->EncryptionMask; return 0;
} else {
CPUID_MEMORY_ENCRYPTION_INFO_EBX Ebx;
//
// CPUID Fn8000_001F[EBX] Bit 0:5 (memory encryption bit position)
//
AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, NULL, &Ebx.Uint32, NULL, NULL);
mSevEncryptionMask = LShiftU64 (1, Ebx.Bits.PtePosBits);
} }
mSevEncryptionMaskSaved = TRUE; return SevEsWorkArea->EncryptionMask;
}
return mSevEncryptionMask;
} }

View File

@ -52,3 +52,4 @@
[FixedPcd] [FixedPcd]
gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase

View File

@ -18,7 +18,33 @@
#include <Uefi/UefiBaseType.h> #include <Uefi/UefiBaseType.h>
/** /**
Reads and sets the status of SEV features. Read the workarea to determine whether SEV is enabled. If enabled,
then return the SevEsWorkArea pointer.
**/
STATIC
SEC_SEV_ES_WORK_AREA *
EFIAPI
GetSevEsWorkArea (
VOID
)
{
OVMF_WORK_AREA *WorkArea;
WorkArea = (OVMF_WORK_AREA *)FixedPcdGet32 (PcdOvmfWorkAreaBase);
//
// If its not SEV guest then SevEsWorkArea is not valid.
//
if ((WorkArea == NULL) || (WorkArea->Header.GuestType != GUEST_TYPE_AMD_SEV)) {
return NULL;
}
return (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase);
}
/**
Read the SEV Status MSR value from the workarea
**/ **/
STATIC STATIC
@ -28,38 +54,14 @@ InternalMemEncryptSevStatus (
VOID VOID
) )
{ {
UINT32 RegEax;
CPUID_MEMORY_ENCRYPTION_INFO_EAX Eax;
BOOLEAN ReadSevMsr;
SEC_SEV_ES_WORK_AREA *SevEsWorkArea; SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
ReadSevMsr = FALSE; SevEsWorkArea = GetSevEsWorkArea ();
if (SevEsWorkArea == NULL) {
SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase); return 0;
if ((SevEsWorkArea != NULL) && (SevEsWorkArea->EncryptionMask != 0)) {
//
// The MSR has been read before, so it is safe to read it again and avoid
// having to validate the CPUID information.
//
ReadSevMsr = TRUE;
} else {
//
// Check if memory encryption leaf exist
//
AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
if (RegEax >= CPUID_MEMORY_ENCRYPTION_INFO) {
//
// CPUID Fn8000_001F[EAX] Bit 1 (Sev supported)
//
AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, &Eax.Uint32, NULL, NULL, NULL);
if (Eax.Bits.SevBit) {
ReadSevMsr = TRUE;
}
}
} }
return ReadSevMsr ? AsmReadMsr32 (MSR_SEV_STATUS) : 0; return (UINT32)(UINTN)SevEsWorkArea->SevStatusMsrValue;
} }
/** /**
@ -130,22 +132,14 @@ MemEncryptSevGetEncryptionMask (
VOID VOID
) )
{ {
CPUID_MEMORY_ENCRYPTION_INFO_EBX Ebx;
SEC_SEV_ES_WORK_AREA *SevEsWorkArea; SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
UINT64 EncryptionMask;
SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase); SevEsWorkArea = GetSevEsWorkArea ();
if (SevEsWorkArea != NULL) { if (SevEsWorkArea == NULL) {
EncryptionMask = SevEsWorkArea->EncryptionMask; return 0;
} else {
//
// CPUID Fn8000_001F[EBX] Bit 0:5 (memory encryption bit position)
//
AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, NULL, &Ebx.Uint32, NULL, NULL);
EncryptionMask = LShiftU64 (1, Ebx.Bits.PtePosBits);
} }
return EncryptionMask; return SevEsWorkArea->EncryptionMask;
} }
/** /**