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ArmPkg/AArch64.h: Added Exception Syndrome Register definitions 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15709 6f19259b-4bc3-4df7-8a09-765794883524
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Olivier Martin 2014-07-29 14:09:10 +00:00 committed by oliviermartin
parent 6a44c22732
commit f3c5066fa6
1 changed files with 7 additions and 0 deletions
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7
ArmPkg/Include/Chipset/AArch64.h
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@ -62,6 +62,13 @@
#define ARM_HCR_TSC BIT19
#define ARM_HCR_TGE BIT27
// Exception Syndrome Register
#define AARCH64_ESR_EC(Ecr) ((0x3F << 26) & (Ecr))
#define AARCH64_ESR_ISS(Ecr) ((0x1FFFFFF) & (Ecr))
#define AARCH64_ESR_EC_SMC32 (0x13 << 26)
#define AARCH64_ESR_EC_SMC64 (0x17 << 26)
// AArch64 Exception Level
#define AARCH64_EL3 0xC
#define AARCH64_EL2 0x8