mirror of https://github.com/acidanthera/audk.git
OvmfPkg/PciHostBridgeUtilityLib: Extend GetRootBridges() with BusMin/BusMax
Extend parameter list of PciHostBridgeUtilityGetRootBridges() with BusMin/ BusMax, so that the utility function could be compatible with ArmVirtPkg who uses mutable bus range [BusMin, BusMax] insteand of [0, PCI_MAX_BUS]. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3059 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210119011302.10908-10-cenjiahui@huawei.com> [lersek@redhat.com: fix logging of UINTN values BusMin, BusMax] [lersek@redhat.com: keep zeroing of (*Count) centralized] [lersek@redhat.com: fix typos in ExtraRootBridges comment] Reviewed-by: Laszlo Ersek <lersek@redhat.com>
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@ -112,6 +112,10 @@ PciHostBridgeUtilityUninitRootBridge (
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@param[in] NoExtendedConfigSpace No Extended Config Space.
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@param[in] BusMin Minimum Bus number, inclusive.
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@param[in] BusMax Maximum Bus number, inclusive.
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@param[in] Io IO aperture.
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@param[in] Mem MMIO aperture.
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@ -132,6 +136,8 @@ PciHostBridgeUtilityGetRootBridges (
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IN UINT64 AllocationAttributes,
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IN BOOLEAN DmaAbove4G,
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IN BOOLEAN NoExtendedConfigSpace,
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IN UINTN BusMin,
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IN UINTN BusMax,
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IN PCI_ROOT_BRIDGE_APERTURE *Io,
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IN PCI_ROOT_BRIDGE_APERTURE *Mem,
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IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
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@ -85,6 +85,8 @@ PciHostBridgeGetRootBridges (
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AllocationAttributes,
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FALSE,
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PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,
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0,
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PCI_MAX_BUS,
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&Io,
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&Mem,
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&MemAbove4G,
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@ -200,6 +200,10 @@ PciHostBridgeUtilityUninitRootBridge (
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@param[in] NoExtendedConfigSpace No Extended Config Space.
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@param[in] BusMin Minimum Bus number, inclusive.
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@param[in] BusMax Maximum Bus number, inclusive.
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@param[in] Io IO aperture.
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@param[in] Mem MMIO aperture.
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@ -220,6 +224,8 @@ PciHostBridgeUtilityGetRootBridges (
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IN UINT64 AllocationAttributes,
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IN BOOLEAN DmaAbove4G,
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IN BOOLEAN NoExtendedConfigSpace,
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IN UINTN BusMin,
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IN UINTN BusMax,
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IN PCI_ROOT_BRIDGE_APERTURE *Io,
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IN PCI_ROOT_BRIDGE_APERTURE *Mem,
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IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
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@ -238,6 +244,12 @@ PciHostBridgeUtilityGetRootBridges (
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*Count = 0;
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if (BusMin > BusMax || BusMax > PCI_MAX_BUS) {
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DEBUG ((DEBUG_ERROR, "%a: invalid bus range with BusMin %Lu and BusMax "
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"%Lu\n", __FUNCTION__, (UINT64)BusMin, (UINT64)BusMax));
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return NULL;
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}
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//
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// QEMU provides the number of extra root buses, shortening the exhaustive
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// search below. If there is no hint, the feature is missing.
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@ -249,7 +261,14 @@ PciHostBridgeUtilityGetRootBridges (
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QemuFwCfgSelectItem (FwCfgItem);
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QemuFwCfgReadBytes (FwCfgSize, &ExtraRootBridges);
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if (ExtraRootBridges > PCI_MAX_BUS) {
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//
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// Validate the number of extra root bridges. As BusMax is inclusive, the
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// max bus count is (BusMax - BusMin + 1). From that, the "main" root bus
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// is always a given, so the max count for the "extra" root bridges is one
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// less, i.e. (BusMax - BusMin). If the QEMU hint exceeds that, we have
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// invalid behavior.
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//
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if (ExtraRootBridges > BusMax - BusMin) {
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DEBUG ((DEBUG_ERROR, "%a: invalid count of extra root buses (%Lu) "
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"reported by QEMU\n", __FUNCTION__, ExtraRootBridges));
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return NULL;
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@ -271,15 +290,15 @@ PciHostBridgeUtilityGetRootBridges (
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//
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// The "main" root bus is always there.
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//
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LastRootBridgeNumber = 0;
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LastRootBridgeNumber = BusMin;
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//
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// Scan all other root buses. If function 0 of any device on a bus returns a
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// VendorId register value different from all-bits-one, then that bus is
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// alive.
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//
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for (RootBridgeNumber = 1;
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RootBridgeNumber <= PCI_MAX_BUS && Initialized < ExtraRootBridges;
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for (RootBridgeNumber = BusMin + 1;
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RootBridgeNumber <= BusMax && Initialized < ExtraRootBridges;
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++RootBridgeNumber) {
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UINTN Device;
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@ -329,7 +348,7 @@ PciHostBridgeUtilityGetRootBridges (
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DmaAbove4G,
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NoExtendedConfigSpace,
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(UINT8) LastRootBridgeNumber,
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PCI_MAX_BUS,
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(UINT8) BusMax,
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Io,
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Mem,
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MemAbove4G,
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