mirror of https://github.com/acidanthera/audk.git
Add DuetTimerLib and DuetSerialIo library instance.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5162 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
klu2
parent
ccb3cad09f
commit
f5752cb24c
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@ -48,7 +48,7 @@
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OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
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OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
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PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
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PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
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IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
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IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
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TimerLib|MdePkg/Library/SecPeiDxeTimerLibCpu/SecPeiDxeTimerLibCpu.inf
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TimerLib|DuetPkg/Library/DuetTimerLib/DuetTimerLib.inf
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[LibraryClasses.common.DXE_DRIVER]
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[LibraryClasses.common.DXE_DRIVER]
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MemoryAllocationLib|MdePkg/Library/DxeMemoryAllocationLib/DxeMemoryAllocationLib.inf
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MemoryAllocationLib|MdePkg/Library/DxeMemoryAllocationLib/DxeMemoryAllocationLib.inf
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@ -79,7 +79,6 @@
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ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
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ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
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SerialPortLib|DuetPkg/Library/DuetSerialIoLib/DuetSerialIoLib.inf
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SerialPortLib|DuetPkg/Library/DuetSerialIoLib/DuetSerialIoLib.inf
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IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
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IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
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#TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
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DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
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DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
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[LibraryClasses.common.UEFI_DRIVER]
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[LibraryClasses.common.UEFI_DRIVER]
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@ -0,0 +1,36 @@
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#/**@file
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# This library instance produce SerialIo library class for DUET platform.
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#
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# Copyright (c) 2006 - 2007, Intel Corporation
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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#**/
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = DuetSerialPortLib
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FILE_GUID = 1B25AF84-1EA8-4b52-894E-BFA6880B97FF
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MODULE_TYPE = DXE_DRIVER
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VERSION_STRING = 1.0
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LIBRARY_CLASS = SerialPortLib
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EDK_RELEASE_VERSION = 0x00020000
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EFI_SPECIFICATION_VERSION = 0x0002000A
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[Packages]
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MdePkg/MdePkg.dec
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[LibraryClasses]
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SerialPortLib
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IoLib
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[Sources.common]
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SerialPortLib.c
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@ -0,0 +1,160 @@
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/** @file
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Serial I/O Port library functions with no library constructor/destructor
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Copyright (c) 2006, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Base.h>
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#include <Library/IoLib.h>
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#include <Library/SerialPortLib.h>
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//---------------------------------------------
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// UART Register Offsets
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//---------------------------------------------
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#define BAUD_LOW_OFFSET 0x00
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#define BAUD_HIGH_OFFSET 0x01
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#define IER_OFFSET 0x01
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#define LCR_SHADOW_OFFSET 0x01
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#define FCR_SHADOW_OFFSET 0x02
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#define IR_CONTROL_OFFSET 0x02
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#define FCR_OFFSET 0x02
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#define EIR_OFFSET 0x02
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#define BSR_OFFSET 0x03
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#define LCR_OFFSET 0x03
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#define MCR_OFFSET 0x04
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#define LSR_OFFSET 0x05
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#define MSR_OFFSET 0x06
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//---------------------------------------------
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// UART Register Bit Defines
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//---------------------------------------------
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#define LSR_TXRDY 0x20
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#define LSR_RXDA 0x01
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#define DLAB 0x01
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UINT16 gComBase = 0x3f8;
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UINTN gBps = 115200;
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UINT8 gData = 8;
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UINT8 gStop = 1;
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UINT8 gParity = 0;
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UINT8 gBreakSet = 0;
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/*
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Programmed hardware of Serial port.
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@return Always return EFI_UNSUPPORTED.
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**/
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RETURN_STATUS
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EFIAPI
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SerialPortInitialize (
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VOID
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)
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{
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UINTN Divisor;
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UINT8 OutputData;
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UINT8 Data;
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//
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// Map 5..8 to 0..3
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//
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Data = (UINT8) (gData - (UINT8)5);
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//
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// Calculate divisor for baud generator
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//
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Divisor = 115200 / gBps;
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//
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// Set communications format
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//
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OutputData = (UINT8)((DLAB << 7) | ((gBreakSet << 6) | ((gParity << 3) | ((gStop << 2) | Data))));
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IoWrite8 (gComBase + LCR_OFFSET, OutputData);
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//
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// Configure baud rate
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//
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IoWrite8 (gComBase + BAUD_HIGH_OFFSET, (UINT8)(Divisor >> 8));
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IoWrite8 (gComBase + BAUD_LOW_OFFSET, (UINT8)(Divisor & 0xff));
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//
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// Switch back to bank 0
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//
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OutputData = (UINT8)((~DLAB<<7)|((gBreakSet<<6)|((gParity<<3)|((gStop<<2)| Data))));
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IoWrite8 (gComBase + LCR_OFFSET, OutputData);
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return RETURN_SUCCESS;
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}
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/**
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Write data to serial device.
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@param Buffer Point of data buffer which need to be writed.
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@param NumberOfBytes Number of output bytes which are cached in Buffer.
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@retval 0 Write data failed.
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@retval !0 Actual number of bytes writed to serial device.
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**/
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UINTN
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EFIAPI
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SerialPortWrite (
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IN UINT8 *Buffer,
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IN UINTN NumberOfBytes
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)
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{
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UINTN Result;
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UINT8 Data;
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if (NULL == Buffer) {
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return 0;
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}
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Result = NumberOfBytes;
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while (NumberOfBytes--) {
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//
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// Wait for the serail port to be ready.
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//
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do {
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Data = IoRead8 (gComBase + LSR_OFFSET);
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} while ((Data & LSR_TXRDY) == 0);
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IoWrite8 (gComBase, *Buffer++);
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}
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return Result;
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}
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/**
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Read data from serial device and save the datas in buffer.
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@param Buffer Point of data buffer which need to be writed.
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@param NumberOfBytes Number of output bytes which are cached in Buffer.
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@retval 0 Read data failed.
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@retval !0 Aactual number of bytes read from serial device.
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**/
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UINTN
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EFIAPI
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SerialPortRead (
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OUT UINT8 *Buffer,
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IN UINTN NumberOfBytes
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)
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{
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return 0;
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}
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@ -0,0 +1,68 @@
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#/** @file
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# Timer Library implementation for Boot Timer moudles that require timer services.
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#
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# Timer Library that uses CPU resources to provide calibrated
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# delays on IA-32 and x64, and uses ITC on IPF. Note: Because CpuLocalApci
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# and ITC could be programmed by OS, it cannot be used by SMM drivers
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# and runtime drivers, ACPI timer is recommended for SMM drivers and RUNTIME
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# drivers.
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# Copyright (c) 2007, Intel Corporation.
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#
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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||||||
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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#**/
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = DuetTimerLib
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FILE_GUID = 5F9A01F5-726E-4f59-809D-887F4766734E
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = TimerLib
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EDK_RELEASE_VERSION = 0x00020000
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EFI_SPECIFICATION_VERSION = 0x00020000
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#
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# VALID_ARCHITECTURES = IA32 X64
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#
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[Sources.Ia32]
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x86TimerLib.c
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[Sources.X64]
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x86TimerLib.c
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[Packages]
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||||||
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MdePkg/MdePkg.dec
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[LibraryClasses]
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BaseLib
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[LibraryClasses.IA32]
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PcdLib
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IoLib
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[LibraryClasses.X64]
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PcdLib
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IoLib
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[LibraryClasses.IPF]
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DebugLib
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PalCallLib
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[Pcd.IA32]
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gEfiMdePkgTokenSpaceGuid.PcdFSBClock
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[Pcd.X64]
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||||||
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gEfiMdePkgTokenSpaceGuid.PcdFSBClock
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@ -0,0 +1,252 @@
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/** @file
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Timer Library functions built upon local APIC on IA32/x64.
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|
|
||||||
|
Copyright (c) 2006 - 2007, Intel Corporation<BR>
|
||||||
|
All rights reserved. This program and the accompanying materials
|
||||||
|
are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
which accompanies this distribution. The full text of the license may be found at
|
||||||
|
http://opensource.org/licenses/bsd-license.php
|
||||||
|
|
||||||
|
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
|
||||||
|
**/
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||||||
|
|
||||||
|
#include <Base.h>
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||||||
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#include <Library/TimerLib.h>
|
||||||
|
#include <Library/BaseLib.h>
|
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#include <Library/IoLib.h>
|
||||||
|
#include <Library/DebugLib.h>
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||||||
|
#include <Library/PcdLib.h>
|
||||||
|
|
||||||
|
|
||||||
|
//
|
||||||
|
// The following array is used in calculating the frequency of local APIC
|
||||||
|
// timer. Refer to IA-32 developers' manual for more details.
|
||||||
|
//
|
||||||
|
GLOBAL_REMOVE_IF_UNREFERENCED
|
||||||
|
CONST UINT8 mTimerLibLocalApicDivisor[] = {
|
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|
0x02, 0x04, 0x08, 0x10,
|
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|
0x02, 0x04, 0x08, 0x10,
|
||||||
|
0x20, 0x40, 0x80, 0x01,
|
||||||
|
0x20, 0x40, 0x80, 0x01
|
||||||
|
};
|
||||||
|
|
||||||
|
/**
|
||||||
|
Internal function to retrieve the base address of local APIC.
|
||||||
|
|
||||||
|
Internal function to retrieve the base address of local APIC.
|
||||||
|
|
||||||
|
@return The base address of local APIC
|
||||||
|
|
||||||
|
**/
|
||||||
|
STATIC
|
||||||
|
UINTN
|
||||||
|
InternalX86GetApicBase (
|
||||||
|
VOID
|
||||||
|
)
|
||||||
|
{
|
||||||
|
return (UINTN)AsmMsrBitFieldRead64 (27, 12, 35) << 12;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Internal function to return the frequency of the local APIC timer.
|
||||||
|
|
||||||
|
Internal function to return the frequency of the local APIC timer.
|
||||||
|
|
||||||
|
@param ApicBase The base address of memory mapped registers of local APIC.
|
||||||
|
|
||||||
|
@return The frequency of the timer in Hz.
|
||||||
|
|
||||||
|
**/
|
||||||
|
STATIC
|
||||||
|
UINT32
|
||||||
|
InternalX86GetTimerFrequency (
|
||||||
|
IN UINTN ApicBase
|
||||||
|
)
|
||||||
|
{
|
||||||
|
return
|
||||||
|
PcdGet32(PcdFSBClock) /
|
||||||
|
mTimerLibLocalApicDivisor[MmioBitFieldRead32 (ApicBase + 0x3e0, 0, 3)];
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Internal function to read the current tick counter of local APIC.
|
||||||
|
|
||||||
|
Internal function to read the current tick counter of local APIC.
|
||||||
|
|
||||||
|
@param ApicBase The base address of memory mapped registers of local APIC.
|
||||||
|
|
||||||
|
@return The tick counter read.
|
||||||
|
|
||||||
|
**/
|
||||||
|
STATIC
|
||||||
|
INT32
|
||||||
|
InternalX86GetTimerTick (
|
||||||
|
IN UINTN ApicBase
|
||||||
|
)
|
||||||
|
{
|
||||||
|
return MmioRead32 (ApicBase + 0x390);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Stalls the CPU for at least the given number of ticks.
|
||||||
|
|
||||||
|
Stalls the CPU for at least the given number of ticks. It's invoked by
|
||||||
|
MicroSecondDelay() and NanoSecondDelay().
|
||||||
|
|
||||||
|
@param ApicBase The base address of memory mapped registers of local APIC.
|
||||||
|
@param Delay A period of time to delay in ticks.
|
||||||
|
|
||||||
|
**/
|
||||||
|
STATIC
|
||||||
|
VOID
|
||||||
|
InternalX86Delay (
|
||||||
|
IN UINTN ApicBase,
|
||||||
|
IN UINT32 Delay
|
||||||
|
)
|
||||||
|
{
|
||||||
|
INT32 Ticks;
|
||||||
|
|
||||||
|
//
|
||||||
|
// The target timer count is calculated here
|
||||||
|
//
|
||||||
|
Ticks = InternalX86GetTimerTick (ApicBase) - Delay;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait until time out
|
||||||
|
// Delay > 2^31 could not be handled by this function
|
||||||
|
// Timer wrap-arounds are handled correctly by this function
|
||||||
|
//
|
||||||
|
while (InternalX86GetTimerTick (ApicBase) - Ticks >= 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Stalls the CPU for at least the given number of microseconds.
|
||||||
|
|
||||||
|
Stalls the CPU for the number of microseconds specified by MicroSeconds.
|
||||||
|
|
||||||
|
@param MicroSeconds The minimum number of microseconds to delay.
|
||||||
|
|
||||||
|
@return MicroSeconds
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINTN
|
||||||
|
EFIAPI
|
||||||
|
MicroSecondDelay (
|
||||||
|
IN UINTN MicroSeconds
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINTN ApicBase;
|
||||||
|
|
||||||
|
ApicBase = InternalX86GetApicBase ();
|
||||||
|
InternalX86Delay (
|
||||||
|
ApicBase,
|
||||||
|
(UINT32)DivU64x32 (
|
||||||
|
MultU64x64 (
|
||||||
|
InternalX86GetTimerFrequency (ApicBase),
|
||||||
|
MicroSeconds
|
||||||
|
),
|
||||||
|
1000000u
|
||||||
|
)
|
||||||
|
);
|
||||||
|
return MicroSeconds;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Stalls the CPU for at least the given number of nanoseconds.
|
||||||
|
|
||||||
|
Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
|
||||||
|
|
||||||
|
@param NanoSeconds The minimum number of nanoseconds to delay.
|
||||||
|
|
||||||
|
@return NanoSeconds
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINTN
|
||||||
|
EFIAPI
|
||||||
|
NanoSecondDelay (
|
||||||
|
IN UINTN NanoSeconds
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINTN ApicBase;
|
||||||
|
|
||||||
|
ApicBase = InternalX86GetApicBase ();
|
||||||
|
InternalX86Delay (
|
||||||
|
ApicBase,
|
||||||
|
(UINT32)DivU64x32 (
|
||||||
|
MultU64x64 (
|
||||||
|
InternalX86GetTimerFrequency (ApicBase),
|
||||||
|
NanoSeconds
|
||||||
|
),
|
||||||
|
1000000000u
|
||||||
|
)
|
||||||
|
);
|
||||||
|
return NanoSeconds;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Retrieves the current value of a 64-bit free running performance counter.
|
||||||
|
|
||||||
|
Retrieves the current value of a 64-bit free running performance counter. The
|
||||||
|
counter can either count up by 1 or count down by 1. If the physical
|
||||||
|
performance counter counts by a larger increment, then the counter values
|
||||||
|
must be translated. The properties of the counter can be retrieved from
|
||||||
|
GetPerformanceCounterProperties().
|
||||||
|
|
||||||
|
@return The current value of the free running performance counter.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINT64
|
||||||
|
EFIAPI
|
||||||
|
GetPerformanceCounter (
|
||||||
|
VOID
|
||||||
|
)
|
||||||
|
{
|
||||||
|
return (UINT64)(UINT32)InternalX86GetTimerTick (InternalX86GetApicBase ());
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Retrieves the 64-bit frequency in Hz and the range of performance counter
|
||||||
|
values.
|
||||||
|
|
||||||
|
If StartValue is not NULL, then the value that the performance counter starts
|
||||||
|
with immediately after is it rolls over is returned in StartValue. If
|
||||||
|
EndValue is not NULL, then the value that the performance counter end with
|
||||||
|
immediately before it rolls over is returned in EndValue. The 64-bit
|
||||||
|
frequency of the performance counter in Hz is always returned. If StartValue
|
||||||
|
is less than EndValue, then the performance counter counts up. If StartValue
|
||||||
|
is greater than EndValue, then the performance counter counts down. For
|
||||||
|
example, a 64-bit free running counter that counts up would have a StartValue
|
||||||
|
of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
|
||||||
|
that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
|
||||||
|
|
||||||
|
@param StartValue The value the performance counter starts with when it
|
||||||
|
rolls over.
|
||||||
|
@param EndValue The value that the performance counter ends with before
|
||||||
|
it rolls over.
|
||||||
|
|
||||||
|
@return The frequency in Hz.
|
||||||
|
|
||||||
|
**/
|
||||||
|
UINT64
|
||||||
|
EFIAPI
|
||||||
|
GetPerformanceCounterProperties (
|
||||||
|
OUT UINT64 *StartValue, OPTIONAL
|
||||||
|
OUT UINT64 *EndValue OPTIONAL
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINTN ApicBase;
|
||||||
|
|
||||||
|
ApicBase = InternalX86GetApicBase ();
|
||||||
|
|
||||||
|
if (StartValue != NULL) {
|
||||||
|
*StartValue = MmioRead32 (ApicBase + 0x380);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (EndValue != NULL) {
|
||||||
|
*EndValue = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
return (UINT64) InternalX86GetTimerFrequency (ApicBase);;
|
||||||
|
}
|
||||||
Loading…
Reference in New Issue