mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/Cpuid.h: Display Intel SGX Resource Enumeration Leaves
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
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@ -594,6 +594,7 @@ CpuidStructuredExtendedFeatureFlags (
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Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax, Ebx.Uint32, Ecx.Uint32, 0);
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PRINT_BIT_FIELD (Ebx, FSGSBASE);
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PRINT_BIT_FIELD (Ebx, IA32_TSC_ADJUST);
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PRINT_BIT_FIELD (Ebx, SGX);
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PRINT_BIT_FIELD (Ebx, BMI1);
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PRINT_BIT_FIELD (Ebx, HLE);
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PRINT_BIT_FIELD (Ebx, AVX2);
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@ -921,6 +922,121 @@ CpuidPlatformQosEnforcementMainLeaf (
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CpuidPlatformQosEnforcementResidSubLeaf ();
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}
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/**
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Display Sub-Leaf 0 Enumeration of Intel SGX Capabilities.
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**/
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VOID
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CpuidEnumerationOfIntelSgxCapabilities0SubLeaf (
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VOID
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)
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{
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CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EAX Eax;
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UINT32 Ebx;
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CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF_EDX Edx;
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AsmCpuidEx (
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CPUID_INTEL_SGX, CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF,
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&Eax.Uint32, &Ebx, NULL, &Edx.Uint32
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);
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Print (L"CPUID_INTEL_SGX (Leaf %08x, Sub-Leaf %08x)\n", CPUID_INTEL_SGX, CPUID_INTEL_SGX_CAPABILITIES_0_SUB_LEAF);
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Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx, 0, Edx.Uint32);
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PRINT_BIT_FIELD (Eax, SGX1);
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PRINT_BIT_FIELD (Eax, SGX2);
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PRINT_BIT_FIELD (Edx, MaxEnclaveSize_Not64);
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PRINT_BIT_FIELD (Edx, MaxEnclaveSize_64);
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}
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/**
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Display Sub-Leaf 1 Enumeration of Intel SGX Capabilities.
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**/
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VOID
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CpuidEnumerationOfIntelSgxCapabilities1SubLeaf (
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VOID
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)
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{
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UINT32 Eax;
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UINT32 Ebx;
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UINT32 Ecx;
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UINT32 Edx;
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AsmCpuidEx (
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CPUID_INTEL_SGX, CPUID_INTEL_SGX_CAPABILITIES_1_SUB_LEAF,
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&Eax, &Ebx, &Ecx, &Edx
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);
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Print (L"CPUID_INTEL_SGX (Leaf %08x, Sub-Leaf %08x)\n", CPUID_INTEL_SGX, CPUID_INTEL_SGX_CAPABILITIES_1_SUB_LEAF);
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Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax, Ebx, Ecx, Edx);
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}
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/**
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Display Sub-Leaf Index 2 or Higher Enumeration of Intel SGX Resources.
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**/
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VOID
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CpuidEnumerationOfIntelSgxResourcesSubLeaf (
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VOID
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)
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{
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CPUID_INTEL_SGX_CAPABILITIES_RESOURCES_SUB_LEAF_EAX Eax;
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CPUID_INTEL_SGX_CAPABILITIES_RESOURCES_SUB_LEAF_EBX Ebx;
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CPUID_INTEL_SGX_CAPABILITIES_RESOURCES_SUB_LEAF_ECX Ecx;
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CPUID_INTEL_SGX_CAPABILITIES_RESOURCES_SUB_LEAF_EDX Edx;
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UINT32 SubLeaf;
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SubLeaf = CPUID_INTEL_SGX_CAPABILITIES_RESOURCES_SUB_LEAF;
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do {
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AsmCpuidEx (
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CPUID_INTEL_SGX, SubLeaf,
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&Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx.Uint32
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);
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if (Eax.Bits.SubLeafType == 0x1) {
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Print (L"CPUID_INTEL_SGX (Leaf %08x, Sub-Leaf %08x)\n", CPUID_INTEL_SGX, SubLeaf);
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Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx.Uint32, Ecx.Uint32, Edx.Uint32);
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PRINT_BIT_FIELD (Eax, SubLeafType);
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PRINT_BIT_FIELD (Eax, LowAddressOfEpcSection);
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PRINT_BIT_FIELD (Ebx, HighAddressOfEpcSection);
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PRINT_BIT_FIELD (Ecx, EpcSection);
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PRINT_BIT_FIELD (Ecx, LowSizeOfEpcSection);
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PRINT_BIT_FIELD (Edx, HighSizeOfEpcSection);
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}
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SubLeaf++;
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} while (Eax.Bits.SubLeafType == 0x1);
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}
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/**
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Display Intel SGX Resource Enumeration.
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**/
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VOID
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CpuidEnumerationOfIntelSgx (
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VOID
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)
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{
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CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX Ebx;
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if (CPUID_INTEL_SGX > gMaximumBasicFunction) {
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return;
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}
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AsmCpuidEx (
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CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,
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CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO,
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NULL, &Ebx.Uint32, NULL, NULL
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);
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if (Ebx.Bits.SGX != 1) {
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//
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// Only if CPUID.(EAX=07H, ECX=0H):EBX.SGX = 1, the processor has support
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// for Intel SGX.
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//
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return;
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}
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CpuidEnumerationOfIntelSgxCapabilities0SubLeaf ();
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CpuidEnumerationOfIntelSgxCapabilities1SubLeaf ();
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CpuidEnumerationOfIntelSgxResourcesSubLeaf ();
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}
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/**
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Display CPUID_INTEL_PROCESSOR_TRACE sub-leafs.
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@ -1334,6 +1450,7 @@ UefiMain (
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CpuidPlatformQosMonitoringEnumerationSubLeaf ();
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CpuidPlatformQosMonitoringCapabilitySubLeaf ();
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CpuidPlatformQosEnforcementMainLeaf ();
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CpuidEnumerationOfIntelSgx ();
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CpuidIntelProcessorTraceMainLeaf ();
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CpuidTimeStampCounter ();
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CpuidProcessorFrequency ();
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