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Remove IO and MMIO GCD add operations from this generic PCI Hot Bridge drivers.

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A platform specific PEIm or DXE module is required to add the IO and MMIO resources to the GCD. 

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10658 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
mdkinney 2010-07-16 19:06:24 +00:00
parent 991d956362
commit f5e004a3d0
1 changed files with 0 additions and 36 deletions
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36
PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c
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@ -14,17 +14,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include "PciHostBridge.h" #include "PciHostBridge.h"
//
// Support 64 K IO space
//
#define RES_IO_BASE 0x1000
#define RES_IO_LIMIT 0xFFFF
//
// Support 4G address space
//
#define RES_MEM_BASE_1 0xF8000000
#define RES_MEM_LIMIT_1 (0xFEC00000 - 1)
// //
// Hard code: Root Bridge Number within the host bridge // Hard code: Root Bridge Number within the host bridge
// Root Bridge's attribute // Root Bridge's attribute
@ -100,8 +89,6 @@ InitializePciHostBridge (
UINTN Loop2; UINTN Loop2;
PCI_HOST_BRIDGE_INSTANCE *HostBridge; PCI_HOST_BRIDGE_INSTANCE *HostBridge;
PCI_ROOT_BRIDGE_INSTANCE *PrivateData; PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
IN EFI_PHYSICAL_ADDRESS BaseAddress;
IN UINT64 Length;
mDriverImageHandle = ImageHandle; mDriverImageHandle = ImageHandle;
@ -162,29 +149,6 @@ InitializePciHostBridge (
} }
} }
Status = gDS->AddIoSpace (
EfiGcdIoTypeIo,
RES_IO_BASE,
RES_IO_LIMIT - RES_IO_BASE + 1
);
// PCI memory space from 3.75Gbytes->(4GBytes - BIOSFWH local APIC etc)
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeMemoryMappedIo,
RES_MEM_BASE_1,
(RES_MEM_LIMIT_1 - RES_MEM_BASE_1 + 1),
0
);
BaseAddress = 0x80000000;
Length = RES_MEM_BASE_1 - BaseAddress;
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeMemoryMappedIo,
BaseAddress,
Length,
0
);
return EFI_SUCCESS; return EFI_SUCCESS;
} }