mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg: Not touch SmmFeatureControl if Code_Access_Chk not Set
Bit SMM_Code_Access_Chk (SMM-RO) in MSR_SMM_MCA_CAP is defined in SDM. If set to 1 indicates that the SMM code access restriction is supported and the MSR_SMM_FEATURE_CONTROL is supported. If this bit is not set, we needn't to access register SmmFetureControl. Otherwise, #GP exception may happen. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18905 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1309,9 +1309,9 @@ ConfigSmmCodeAccessCheckOnCurrentProcessor (
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NewSmmFeatureControlMsr = SmmFeatureControlMsr;
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NewSmmFeatureControlMsr = SmmFeatureControlMsr;
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if (mSmmCodeAccessCheckEnable) {
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if (mSmmCodeAccessCheckEnable) {
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NewSmmFeatureControlMsr |= SMM_CODE_CHK_EN_BIT;
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NewSmmFeatureControlMsr |= SMM_CODE_CHK_EN_BIT;
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}
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if (FeaturePcdGet (PcdCpuSmmFeatureControlMsrLock)) {
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if (FeaturePcdGet (PcdCpuSmmFeatureControlMsrLock)) {
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NewSmmFeatureControlMsr |= SMM_FEATURE_CONTROL_LOCK_BIT;
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NewSmmFeatureControlMsr |= SMM_FEATURE_CONTROL_LOCK_BIT;
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}
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}
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}
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//
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//
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@ -1354,13 +1354,6 @@ ConfigSmmCodeAccessCheck (
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//
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//
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if ((AsmReadMsr64 (EFI_MSR_SMM_MCA_CAP) & SMM_CODE_ACCESS_CHK_BIT) == 0) {
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if ((AsmReadMsr64 (EFI_MSR_SMM_MCA_CAP) & SMM_CODE_ACCESS_CHK_BIT) == 0) {
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mSmmCodeAccessCheckEnable = FALSE;
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mSmmCodeAccessCheckEnable = FALSE;
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}
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//
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// If the SMM Code Access Check feature is disabled and the Feature Control MSR
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// is not being locked, then no additional work is required
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//
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if (!mSmmCodeAccessCheckEnable && !FeaturePcdGet (PcdCpuSmmFeatureControlMsrLock)) {
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return;
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return;
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}
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}
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