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IntelFsp2Pkg: Fix NASM X64 build warnings. 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4377

Fix below warnings generated by NASM X64 build:
/X64/FspHelper.iii:26: warning: signed dword value exceeds bounds
/X64/FspHelper.iii:35: warning: signed dword value exceeds bounds
/X64/FspApiEntryT.iii:320: warning: dword data exceeds bounds

Also replaced "cmp reg, 0" with "test reg, reg" per optimization
suggestion.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
This commit is contained in:
Chasel Chiu 2023-03-16 23:37:40 -07:00 committed by mergify[bot]
parent 1f26a9e62e
commit f6bd3286ed
2 changed files with 9 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm
View File

@ -135,9 +135,9 @@ ASM_PFX(LoadMicrocodeDefault):
; ;
LOAD_RBP LOAD_RBP
cmp rsp, 0 test rsp, rsp
jz ParamError jz ParamError
cmp rcx, 0 test rcx, rcx
jz ParamError jz ParamError
mov rsp, rcx mov rsp, rcx
@ -151,13 +151,13 @@ ASM_PFX(LoadMicrocodeDefault):
; UPD structure is compliant with FSP spec 2.4 ; UPD structure is compliant with FSP spec 2.4
mov rax, qword [rsp + LoadMicrocodeParamsFsp24.MicrocodeCodeSize] mov rax, qword [rsp + LoadMicrocodeParamsFsp24.MicrocodeCodeSize]
cmp rax, 0 test rax, rax
jz Exit2 jz Exit2
cmp rax, 0800h cmp rax, 0800h
jl ParamError jl ParamError
mov rsi, qword [rsp + LoadMicrocodeParamsFsp24.MicrocodeCodeAddr] mov rsi, qword [rsp + LoadMicrocodeParamsFsp24.MicrocodeCodeAddr]
cmp rsi, 0 test rsi, rsi
jnz CheckMainHeader jnz CheckMainHeader
ParamError: ParamError:
@ -315,9 +315,9 @@ Done:
mov ecx, MSR_IA32_BIOS_SIGN_ID mov ecx, MSR_IA32_BIOS_SIGN_ID
rdmsr ; Get current microcode signature rdmsr ; Get current microcode signature
xor eax, eax xor eax, eax
cmp edx, 0 test edx, edx
jnz Exit2 jnz Exit2
mov eax, 0800000000000000Eh mov rax, 0800000000000000Eh
Exit2: Exit2:
jmp rbp jmp rbp
@ -464,7 +464,7 @@ ParamValid:
; Sec Platform Init ; Sec Platform Init
; ;
CALL_YMM ASM_PFX(SecPlatformInit) CALL_YMM ASM_PFX(SecPlatformInit)
cmp eax, 0 test rax, rax
jnz TempRamInitExit jnz TempRamInitExit
; Load microcode ; Load microcode
@ -476,12 +476,12 @@ ParamValid:
; Call Sec CAR Init ; Call Sec CAR Init
LOAD_RCX LOAD_RCX
CALL_YMM ASM_PFX(SecCarInit) CALL_YMM ASM_PFX(SecCarInit)
cmp rax, 0 test rax, rax
jnz TempRamInitExit jnz TempRamInitExit
LOAD_RCX LOAD_RCX
CALL_YMM ASM_PFX(EstablishStackFsp) CALL_YMM ASM_PFX(EstablishStackFsp)
cmp rax, 0 test rax, rax
jnz TempRamInitExit jnz TempRamInitExit
LOAD_UCODE_STATUS rax ; Restore microcode status if no CAR init error from SLOT 0 in YMM9 (upper 128bits). LOAD_UCODE_STATUS rax ; Restore microcode status if no CAR init error from SLOT 0 in YMM9 (upper 128bits).

2
IntelFsp2Pkg/FspSecCore/X64/FspHelper.nasm
View File

@ -23,7 +23,6 @@ ASM_PFX(AsmGetFspInfoHeader):
global ASM_PFX(FspInfoHeaderRelativeOff) global ASM_PFX(FspInfoHeaderRelativeOff)
ASM_PFX(FspInfoHeaderRelativeOff): ASM_PFX(FspInfoHeaderRelativeOff):
DD 0x12345678 ; This value must be patched by the build script DD 0x12345678 ; This value must be patched by the build script
and rax, 0xffffffff
ret ret
global ASM_PFX(AsmGetFspInfoHeaderNoStack) global ASM_PFX(AsmGetFspInfoHeaderNoStack)
@ -32,5 +31,4 @@ ASM_PFX(AsmGetFspInfoHeaderNoStack):
lea rcx, [ASM_PFX(FspInfoHeaderRelativeOff)] lea rcx, [ASM_PFX(FspInfoHeaderRelativeOff)]
mov ecx, [rcx] mov ecx, [rcx]
sub rax, rcx sub rax, rcx
and rax, 0xffffffff
jmp rdi jmp rdi