mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmLib: Rationalise ArmReadMidr and cognate functions.
The function ArmReadMidr has been recently added, but that functionality was already present under other names such as Cp15IdCode and ArmMainIdCode. This change removes redundant code and moves the function to the Common library. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15276 6f19259b-4bc3-4df7-8a09-765794883524
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@ -212,12 +212,6 @@ ArmReadIdPfr1 (
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VOID
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VOID
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);
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);
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UINT32
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EFIAPI
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Cp15IdCode (
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VOID
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);
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UINT32
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UINT32
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EFIAPI
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EFIAPI
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Cp15CacheInfo (
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Cp15CacheInfo (
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@ -51,7 +51,6 @@ GCC_ASM_EXPORT (ArmEnableVFP)
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GCC_ASM_EXPORT (ArmCallWFI)
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GCC_ASM_EXPORT (ArmCallWFI)
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GCC_ASM_EXPORT (ArmInvalidateInstructionAndDataTlb)
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GCC_ASM_EXPORT (ArmInvalidateInstructionAndDataTlb)
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GCC_ASM_EXPORT (ArmReadMpidr)
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GCC_ASM_EXPORT (ArmReadMpidr)
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GCC_ASM_EXPORT (ArmReadMidr)
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GCC_ASM_EXPORT (ArmReadTpidrurw)
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GCC_ASM_EXPORT (ArmReadTpidrurw)
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GCC_ASM_EXPORT (ArmWriteTpidrurw)
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GCC_ASM_EXPORT (ArmWriteTpidrurw)
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GCC_ASM_EXPORT (ArmIsArchTimerImplemented)
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GCC_ASM_EXPORT (ArmIsArchTimerImplemented)
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@ -469,9 +468,6 @@ ASM_PFX(ArmReadMpidr):
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mrs x0, mpidr_el1 // read EL1 MPIDR
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mrs x0, mpidr_el1 // read EL1 MPIDR
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ret
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ret
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ASM_PFX(ArmReadMidr):
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mrs x0, midr_el1 // Read Main ID Register
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ret
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// Keep old function names for C compatibilty for now. Change later?
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// Keep old function names for C compatibilty for now. Change later?
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ASM_PFX(ArmReadTpidrurw):
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ASM_PFX(ArmReadTpidrurw):
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@ -43,7 +43,6 @@ GCC_ASM_EXPORT(ArmSetHighVectors)
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GCC_ASM_EXPORT(ArmIsMpCore)
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GCC_ASM_EXPORT(ArmIsMpCore)
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GCC_ASM_EXPORT(ArmCallWFI)
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GCC_ASM_EXPORT(ArmCallWFI)
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GCC_ASM_EXPORT(ArmReadMpidr)
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GCC_ASM_EXPORT(ArmReadMpidr)
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GCC_ASM_EXPORT(ArmReadMidr)
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GCC_ASM_EXPORT(ArmUpdateTranslationTableEntry)
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GCC_ASM_EXPORT(ArmUpdateTranslationTableEntry)
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GCC_ASM_EXPORT(ArmEnableFiq)
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GCC_ASM_EXPORT(ArmEnableFiq)
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GCC_ASM_EXPORT(ArmDisableFiq)
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GCC_ASM_EXPORT(ArmDisableFiq)
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@ -217,10 +216,6 @@ ASM_PFX(ArmReadMpidr):
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mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
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mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
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bx lr
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bx lr
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ASM_PFX(ArmReadMpidr):
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mrc p15, 0, r0, c0, c0, 0 @ Read Main ID Register
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bx lr
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ASM_PFX(ArmEnableFiq):
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ASM_PFX(ArmEnableFiq):
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mrs R0,CPSR
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mrs R0,CPSR
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bic R0,R0,#0x40 @Enable FIQ interrupts
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bic R0,R0,#0x40 @Enable FIQ interrupts
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@ -49,7 +49,6 @@ GCC_ASM_EXPORT (ArmCallWFI)
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GCC_ASM_EXPORT (ArmReadCbar)
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GCC_ASM_EXPORT (ArmReadCbar)
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GCC_ASM_EXPORT (ArmInvalidateInstructionAndDataTlb)
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GCC_ASM_EXPORT (ArmInvalidateInstructionAndDataTlb)
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GCC_ASM_EXPORT (ArmReadMpidr)
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GCC_ASM_EXPORT (ArmReadMpidr)
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GCC_ASM_EXPORT (ArmReadMidr)
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GCC_ASM_EXPORT (ArmReadTpidrurw)
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GCC_ASM_EXPORT (ArmReadTpidrurw)
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GCC_ASM_EXPORT (ArmWriteTpidrurw)
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GCC_ASM_EXPORT (ArmWriteTpidrurw)
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GCC_ASM_EXPORT (ArmIsArchTimerImplemented)
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GCC_ASM_EXPORT (ArmIsArchTimerImplemented)
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@ -378,10 +377,6 @@ ASM_PFX(ArmReadMpidr):
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mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
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mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
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bx lr
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bx lr
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ASM_PFX(ArmReadMidr):
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mrc p15, 0, r0, c0, c0, 0 @ Read Main ID Register
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bx lr
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ASM_PFX(ArmReadTpidrurw):
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ASM_PFX(ArmReadTpidrurw):
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mrc p15, 0, r0, c13, c0, 2 @ read TPIDRURW
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mrc p15, 0, r0, c13, c0, 2 @ read TPIDRURW
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bx lr
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bx lr
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@ -46,7 +46,6 @@
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EXPORT ArmReadCbar
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EXPORT ArmReadCbar
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EXPORT ArmInvalidateInstructionAndDataTlb
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EXPORT ArmInvalidateInstructionAndDataTlb
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EXPORT ArmReadMpidr
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EXPORT ArmReadMpidr
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EXPORT ArmReadMidr
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EXPORT ArmReadTpidrurw
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EXPORT ArmReadTpidrurw
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EXPORT ArmWriteTpidrurw
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EXPORT ArmWriteTpidrurw
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EXPORT ArmIsArchTimerImplemented
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EXPORT ArmIsArchTimerImplemented
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@ -372,10 +371,6 @@ ArmReadMpidr
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mrc p15, 0, r0, c0, c0, 5 ; read MPIDR
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mrc p15, 0, r0, c0, c0, 5 ; read MPIDR
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bx lr
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bx lr
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ArmReadMidr
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mrc p15, 0, r0, c0, c0, 0 ; Read Main ID Register
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bx lr
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ArmReadTpidrurw
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ArmReadTpidrurw
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mrc p15, 0, r0, c13, c0, 2 ; read TPIDRURW
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mrc p15, 0, r0, c13, c0, 2 ; read TPIDRURW
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bx lr
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bx lr
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@ -17,7 +17,7 @@
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.text
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.text
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.align 3
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.align 3
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GCC_ASM_EXPORT (ArmMainIdCode)
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GCC_ASM_EXPORT (ArmReadMidr)
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GCC_ASM_EXPORT (ArmCacheInfo)
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GCC_ASM_EXPORT (ArmCacheInfo)
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GCC_ASM_EXPORT (ArmGetInterruptState)
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GCC_ASM_EXPORT (ArmGetInterruptState)
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GCC_ASM_EXPORT (ArmGetFiqState)
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GCC_ASM_EXPORT (ArmGetFiqState)
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@ -43,7 +43,7 @@ GCC_ASM_EXPORT (ArmCallSEV)
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.set DAIF_FIQ_BIT, (1 << 0)
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.set DAIF_FIQ_BIT, (1 << 0)
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.set DAIF_IRQ_BIT, (1 << 1)
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.set DAIF_IRQ_BIT, (1 << 1)
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ASM_PFX(ArmiMainIdCode):
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ASM_PFX(ArmReadMidr):
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mrs x0, midr_el1 // Read from Main ID Register (MIDR)
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mrs x0, midr_el1 // Read from Main ID Register (MIDR)
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ret
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ret
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@ -1,7 +1,7 @@
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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#
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#
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# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
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#
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#
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# This program and the accompanying materials
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# are licensed and made available under the terms and conditions of the BSD License
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@ -23,7 +23,7 @@
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.text
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.text
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.align 2
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.align 2
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GCC_ASM_EXPORT(Cp15IdCode)
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GCC_ASM_EXPORT(ArmReadMidr)
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GCC_ASM_EXPORT(Cp15CacheInfo)
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GCC_ASM_EXPORT(Cp15CacheInfo)
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GCC_ASM_EXPORT(ArmGetInterruptState)
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GCC_ASM_EXPORT(ArmGetInterruptState)
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GCC_ASM_EXPORT(ArmGetFiqState)
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GCC_ASM_EXPORT(ArmGetFiqState)
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@ -50,7 +50,7 @@ GCC_ASM_EXPORT(ArmReadSctlr)
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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ASM_PFX(Cp15IdCode):
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ASM_PFX(ArmReadMidr):
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mrc p15,0,R0,c0,c0,0
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mrc p15,0,R0,c0,c0,0
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bx LR
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bx LR
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@ -1,7 +1,7 @@
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//
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//
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// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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// Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
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//
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//
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// This program and the accompanying materials
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// are licensed and made available under the terms and conditions of the BSD License
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@ -23,7 +23,7 @@
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#define dsb
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#define dsb
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#endif
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#endif
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EXPORT Cp15IdCode
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EXPORT ArmReadMidr
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EXPORT Cp15CacheInfo
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EXPORT Cp15CacheInfo
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EXPORT ArmGetInterruptState
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EXPORT ArmGetInterruptState
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EXPORT ArmGetFiqState
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EXPORT ArmGetFiqState
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@ -50,7 +50,7 @@
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AREA ArmLibSupport, CODE, READONLY
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AREA ArmLibSupport, CODE, READONLY
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Cp15IdCode
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ArmReadMidr
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mrc p15,0,R0,c0,c0,0
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mrc p15,0,R0,c0,c0,0
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bx LR
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bx LR
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