From f828fc987662c9b20222e820e66c753c2237ff17 Mon Sep 17 00:00:00 2001 From: Brijesh Singh Date: Wed, 19 May 2021 13:19:38 -0500 Subject: [PATCH] MdePkg/Register/Amd: realign macros with more space for future expansion BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 Version 2 of the GHCB spec introduces several new SNP-specific NAEs. Unfortunately, the names for those NAEs break the alignment. Add some white spaces so that the SNP support patches do not break the alignment. Cc: James Bottomley Cc: Min Xu Cc: Jiewen Yao Cc: Tom Lendacky Cc: Jordan Justen Cc: Ard Biesheuvel Cc: Laszlo Ersek Cc: Erdem Aktas Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Reviewed-by: Laszlo Ersek Reviewed-by: Liming Gao Signed-off-by: Brijesh Singh Message-Id: <20210519181949.6574-3-brijesh.singh@amd.com> --- MdePkg/Include/Register/Amd/Fam17Msr.h | 10 +++++----- MdePkg/Include/Register/Amd/Ghcb.h | 12 ++++++------ 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Register/Amd/Fam17Msr.h index 716d52fd50..7368ce7af0 100644 --- a/MdePkg/Include/Register/Amd/Fam17Msr.h +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h @@ -53,11 +53,11 @@ typedef union { UINT64 GhcbPhysicalAddress; } MSR_SEV_ES_GHCB_REGISTER; -#define GHCB_INFO_SEV_INFO 1 -#define GHCB_INFO_SEV_INFO_GET 2 -#define GHCB_INFO_CPUID_REQUEST 4 -#define GHCB_INFO_CPUID_RESPONSE 5 -#define GHCB_INFO_TERMINATE_REQUEST 256 +#define GHCB_INFO_SEV_INFO 1 +#define GHCB_INFO_SEV_INFO_GET 2 +#define GHCB_INFO_CPUID_REQUEST 4 +#define GHCB_INFO_CPUID_RESPONSE 5 +#define GHCB_INFO_TERMINATE_REQUEST 256 #define GHCB_TERMINATE_GHCB 0 #define GHCB_TERMINATE_GHCB_GENERAL 0 diff --git a/MdePkg/Include/Register/Amd/Ghcb.h b/MdePkg/Include/Register/Amd/Ghcb.h index ccdb662af7..712dc8e769 100644 --- a/MdePkg/Include/Register/Amd/Ghcb.h +++ b/MdePkg/Include/Register/Amd/Ghcb.h @@ -49,12 +49,12 @@ // // VMG Special Exit Codes // -#define SVM_EXIT_MMIO_READ 0x80000001ULL -#define SVM_EXIT_MMIO_WRITE 0x80000002ULL -#define SVM_EXIT_NMI_COMPLETE 0x80000003ULL -#define SVM_EXIT_AP_RESET_HOLD 0x80000004ULL -#define SVM_EXIT_AP_JUMP_TABLE 0x80000005ULL -#define SVM_EXIT_UNSUPPORTED 0x8000FFFFULL +#define SVM_EXIT_MMIO_READ 0x80000001ULL +#define SVM_EXIT_MMIO_WRITE 0x80000002ULL +#define SVM_EXIT_NMI_COMPLETE 0x80000003ULL +#define SVM_EXIT_AP_RESET_HOLD 0x80000004ULL +#define SVM_EXIT_AP_JUMP_TABLE 0x80000005ULL +#define SVM_EXIT_UNSUPPORTED 0x8000FFFFULL // // IOIO Exit Information