mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/PiSmmCpuDxeSmm: Use public MSR_IA32_MISC_ENABLE definition
Use the MSR MSR_IA32_MISC_ENABLE definition defined in UefiCpuPkg/Include and remove the local definition. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
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@ -1020,6 +1020,7 @@ SmiRendezvous (
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UINTN Index;
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UINTN Index;
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UINTN Cr2;
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UINTN Cr2;
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BOOLEAN XdDisableFlag;
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BOOLEAN XdDisableFlag;
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MSR_IA32_MISC_ENABLE_REGISTER MiscEnableMsr;
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//
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//
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// Save Cr2 because Page Fault exception in SMM may override its value
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// Save Cr2 because Page Fault exception in SMM may override its value
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@ -1083,9 +1084,11 @@ SmiRendezvous (
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//
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//
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XdDisableFlag = FALSE;
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XdDisableFlag = FALSE;
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if (mXdSupported) {
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if (mXdSupported) {
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if ((AsmReadMsr64 (MSR_IA32_MISC_ENABLE) & B_XD_DISABLE_BIT) != 0) {
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MiscEnableMsr.Uint64 = AsmReadMsr64 (MSR_IA32_MISC_ENABLE);
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if (MiscEnableMsr.Bits.XD == 1) {
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XdDisableFlag = TRUE;
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XdDisableFlag = TRUE;
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AsmMsrAnd64 (MSR_IA32_MISC_ENABLE, ~B_XD_DISABLE_BIT);
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MiscEnableMsr.Bits.XD = 0;
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AsmWriteMsr64 (MSR_IA32_MISC_ENABLE, MiscEnableMsr.Uint64);
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}
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}
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ActivateXd ();
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ActivateXd ();
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}
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}
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@ -1176,7 +1179,9 @@ SmiRendezvous (
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// Restore XD
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// Restore XD
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//
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//
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if (XdDisableFlag) {
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if (XdDisableFlag) {
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AsmMsrOr64 (MSR_IA32_MISC_ENABLE, B_XD_DISABLE_BIT);
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MiscEnableMsr.Uint64 = AsmReadMsr64 (MSR_IA32_MISC_ENABLE);
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MiscEnableMsr.Bits.XD = 1;
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AsmWriteMsr64 (MSR_IA32_MISC_ENABLE, MiscEnableMsr.Uint64);
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}
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}
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}
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}
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
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Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
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Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -53,6 +53,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#include <CpuHotPlugData.h>
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#include <CpuHotPlugData.h>
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#include <Register/Cpuid.h>
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#include <Register/Cpuid.h>
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#include <Register/Msr.h>
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#include "CpuService.h"
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#include "CpuService.h"
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#include "SmmProfile.h"
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#include "SmmProfile.h"
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@ -936,6 +936,7 @@ CheckFeatureSupported (
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{
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{
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UINT32 RegEax;
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UINT32 RegEax;
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UINT32 RegEdx;
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UINT32 RegEdx;
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MSR_IA32_MISC_ENABLE_REGISTER MiscEnableMsr;
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if (mXdSupported) {
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if (mXdSupported) {
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AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
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AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
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@ -966,9 +967,10 @@ CheckFeatureSupported (
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// BTINT bits in the MSR_DEBUGCTLA MSR.
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// BTINT bits in the MSR_DEBUGCTLA MSR.
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// 2. The IA32_DS_AREA MSR can be programmed to point to the DS save area.
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// 2. The IA32_DS_AREA MSR can be programmed to point to the DS save area.
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//
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//
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if (AsmMsrBitFieldRead64 (MSR_IA32_MISC_ENABLE, 11, 11) == 1) {
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MiscEnableMsr.Uint64 = AsmReadMsr64 (MSR_IA32_MISC_ENABLE);
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if (MiscEnableMsr.Bits.BTS == 1) {
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//
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//
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// BTS facilities is not supported if MSR_IA32_MISC_ENABLE BIT11 is set.
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// BTS facilities is not supported if MSR_IA32_MISC_ENABLE.BTS bit is set.
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//
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//
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mBtsSupported = FALSE;
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mBtsSupported = FALSE;
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}
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}
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@ -17,12 +17,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#include "SmmProfileInternal.h"
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#include "SmmProfileInternal.h"
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///
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/// MSR Register Index
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///
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#define MSR_IA32_MISC_ENABLE 0x1A0
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#define B_XD_DISABLE_BIT BIT34
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//
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//
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// External functions
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// External functions
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//
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//
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