mirror of https://github.com/acidanthera/audk.git
Add DEBUG() macros for DEBUG_CACHE to MTRR Library show all changes memory caches setting changes.
If DEBUG_PROPERTY_DEBUG_CODE_ENABLED is also set in PcdDebugPropertyMask, then the entire set of MTRRs will be displayed on every memory cache setting change. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11231 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1,7 +1,7 @@
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/** @file
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CPU DXE Module.
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Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -612,8 +612,6 @@ CpuSetMemoryAttributes (
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return EFI_UNSUPPORTED;
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}
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DEBUG((EFI_D_ERROR, "CpuAp: SetMemorySpaceAttributes(BA=%08x, Len=%08x, Attr=%08x)\n", BaseAddress, Length, Attributes));
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//
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// If this function is called because GCD SetMemorySpaceAttributes () is called
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// by RefreshGcdMemoryAttributes (), then we are just synchronzing GCD memory
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@ -652,15 +650,12 @@ CpuSetMemoryAttributes (
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//
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// call MTRR libary function
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//
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DEBUG((EFI_D_ERROR, " MtrrSetMemoryAttribute()\n"));
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Status = MtrrSetMemoryAttribute (
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BaseAddress,
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Length,
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CacheType
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);
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MtrrDebugPrintAllMtrrs ();
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return (EFI_STATUS) Status;
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}
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@ -1,7 +1,7 @@
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/** @file
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MTRR setting library
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Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -23,7 +23,7 @@
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//
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// This table defines the offset, base and length of the fixed MTRRs
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//
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FIXED_MTRR MtrrLibFixedMtrrTable[] = {
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CONST FIXED_MTRR mMtrrLibFixedMtrrTable[] = {
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{
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MTRR_LIB_IA32_MTRR_FIX64K_00000,
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0,
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@ -81,6 +81,20 @@ FIXED_MTRR MtrrLibFixedMtrrTable[] = {
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},
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};
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//
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// Lookup table used to print MTRRs
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//
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GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8 *mMtrrMemoryCacheTypeShortName[] = {
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"UC", // CacheUncacheable
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"WC", // CacheWriteCombining
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"R*", // Invalid
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"R*", // Invalid
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"WT", // CacheWriteThrough
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"WP", // CacheWriteProtected
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"WB", // CacheWriteBack
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"R*" // Invalid
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};
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/**
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Returns the variable MTRR count for the CPU.
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@ -252,11 +266,11 @@ ProgramFixedMtrr (
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ClearMask = 0;
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for (MsrNum = 0; MsrNum < MTRR_NUMBER_OF_FIXED_MTRR; MsrNum++) {
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if ((*Base >= MtrrLibFixedMtrrTable[MsrNum].BaseAddress) &&
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if ((*Base >= mMtrrLibFixedMtrrTable[MsrNum].BaseAddress) &&
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(*Base <
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(
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MtrrLibFixedMtrrTable[MsrNum].BaseAddress +
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(8 * MtrrLibFixedMtrrTable[MsrNum].Length)
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mMtrrLibFixedMtrrTable[MsrNum].BaseAddress +
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(8 * mMtrrLibFixedMtrrTable[MsrNum].Length)
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)
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)
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) {
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@ -274,8 +288,8 @@ ProgramFixedMtrr (
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for (ByteShift = 0; ByteShift < 8; ByteShift++) {
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if (*Base ==
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(
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MtrrLibFixedMtrrTable[MsrNum].BaseAddress +
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(ByteShift * MtrrLibFixedMtrrTable[MsrNum].Length)
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mMtrrLibFixedMtrrTable[MsrNum].BaseAddress +
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(ByteShift * mMtrrLibFixedMtrrTable[MsrNum].Length)
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)
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) {
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break;
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@ -288,13 +302,13 @@ ProgramFixedMtrr (
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for (
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;
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((ByteShift < 8) && (*Length >= MtrrLibFixedMtrrTable[MsrNum].Length));
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((ByteShift < 8) && (*Length >= mMtrrLibFixedMtrrTable[MsrNum].Length));
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ByteShift++
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) {
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OrMask |= LShiftU64 ((UINT64) MemoryCacheType, (UINT32) (ByteShift * 8));
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ClearMask |= LShiftU64 ((UINT64) 0xFF, (UINT32) (ByteShift * 8));
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*Length -= MtrrLibFixedMtrrTable[MsrNum].Length;
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*Base += MtrrLibFixedMtrrTable[MsrNum].Length;
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*Length -= mMtrrLibFixedMtrrTable[MsrNum].Length;
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*Base += mMtrrLibFixedMtrrTable[MsrNum].Length;
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}
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if (ByteShift < 8 && (*Length != 0)) {
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@ -302,8 +316,8 @@ ProgramFixedMtrr (
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}
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TempQword =
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(AsmReadMsr64 (MtrrLibFixedMtrrTable[MsrNum].Msr) & ~ClearMask) | OrMask;
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AsmWriteMsr64 (MtrrLibFixedMtrrTable[MsrNum].Msr, TempQword);
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(AsmReadMsr64 (mMtrrLibFixedMtrrTable[MsrNum].Msr) & ~ClearMask) | OrMask;
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AsmWriteMsr64 (mMtrrLibFixedMtrrTable[MsrNum].Msr, TempQword);
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return RETURN_SUCCESS;
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}
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@ -887,8 +901,11 @@ MtrrSetMemoryAttribute (
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UINT32 FirmwareVariableMtrrCount;
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UINT32 VariableMtrrEnd;
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DEBUG((DEBUG_CACHE, "MtrrSetMemoryAttribute() %a:%016lx-%016lx\n", mMtrrMemoryCacheTypeShortName[Attribute], BaseAddress, Length));
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if (!IsMtrrSupported ()) {
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return RETURN_UNSUPPORTED;
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Status = RETURN_UNSUPPORTED;
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goto Done;
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}
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FirmwareVariableMtrrCount = GetFirmwareVariableMtrrCount ();
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// Check for an invalid parameter
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//
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if (Length == 0) {
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return RETURN_INVALID_PARAMETER;
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Status = RETURN_INVALID_PARAMETER;
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goto Done;
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}
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if (
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(BaseAddress & ~MtrrValidAddressMask) != 0 ||
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(Length & ~MtrrValidAddressMask) != 0
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) {
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return RETURN_UNSUPPORTED;
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Status = RETURN_UNSUPPORTED;
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goto Done;
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}
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//
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Status = ProgramFixedMtrr (MemoryType, &BaseAddress, &Length);
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PostMtrrChange (Cr4);
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if (RETURN_ERROR (Status)) {
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return Status;
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goto Done;
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}
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}
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//
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// Since memory ranges below 1MB will be overridden by the fixed MTRRs,
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// we can set the bade to 0 to save variable MTRRs.
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// we can set the base to 0 to save variable MTRRs.
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//
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if (BaseAddress == BASE_1MB) {
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BaseAddress = 0;
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}
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Done:
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return Status;
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DEBUG((DEBUG_CACHE, " Status = %r\n", Status));
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if (!RETURN_ERROR (Status)) {
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MtrrDebugPrintAllMtrrs ();
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}
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return Status;
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}
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// Go through the fixed MTRR
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//
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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if (Address >= MtrrLibFixedMtrrTable[Index].BaseAddress &&
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if (Address >= mMtrrLibFixedMtrrTable[Index].BaseAddress &&
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Address < (
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MtrrLibFixedMtrrTable[Index].BaseAddress +
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(MtrrLibFixedMtrrTable[Index].Length * 8)
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mMtrrLibFixedMtrrTable[Index].BaseAddress +
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(mMtrrLibFixedMtrrTable[Index].Length * 8)
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)
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) {
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SubIndex =
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((UINTN)Address - MtrrLibFixedMtrrTable[Index].BaseAddress) /
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MtrrLibFixedMtrrTable[Index].Length;
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TempQword = AsmReadMsr64 (MtrrLibFixedMtrrTable[Index].Msr);
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((UINTN)Address - mMtrrLibFixedMtrrTable[Index].BaseAddress) /
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mMtrrLibFixedMtrrTable[Index].Length;
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TempQword = AsmReadMsr64 (mMtrrLibFixedMtrrTable[Index].Msr);
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MtrrType = RShiftU64 (TempQword, SubIndex * 8) & 0xFF;
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return GetMemoryCacheTypeFromMtrrType (MtrrType);
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}
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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FixedSettings->Mtrr[Index] =
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AsmReadMsr64 (MtrrLibFixedMtrrTable[Index].Msr);
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AsmReadMsr64 (mMtrrLibFixedMtrrTable[Index].Msr);
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};
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return FixedSettings;
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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AsmWriteMsr64 (
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MtrrLibFixedMtrrTable[Index].Msr,
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mMtrrLibFixedMtrrTable[Index].Msr,
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FixedSettings->Mtrr[Index]
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);
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}
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return MtrrSetting;
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}
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/**
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This function prints all MTRRs for debugging.
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**/
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{
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MTRR_SETTINGS MtrrSettings;
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UINTN Index;
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UINTN Index1;
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UINTN VariableMtrrCount;
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UINT64 Base;
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UINT64 Limit;
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UINT64 MtrrBase;
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UINT64 MtrrLimit;
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UINT64 RangeBase;
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UINT64 RangeLimit;
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UINT64 NoRangeBase;
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UINT64 NoRangeLimit;
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UINT32 RegEax;
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UINTN MemoryType;
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UINTN PreviousMemoryType;
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BOOLEAN Found;
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if (!IsMtrrSupported ()) {
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return;
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}
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DEBUG((DEBUG_CACHE, "MTRR Settings\n"));
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DEBUG((DEBUG_CACHE, "=============\n"));
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MtrrGetAllMtrrs (&MtrrSettings);
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DEBUG((EFI_D_ERROR, "DefaultType = %016lx\n", MtrrSettings.MtrrDefType));
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DEBUG((DEBUG_CACHE, "MTRR Default Type: %016lx\n", MtrrSettings.MtrrDefType));
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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DEBUG((
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EFI_D_ERROR, "Fixed[%02d] = %016lx\n",
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Index,
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MtrrSettings.Fixed.Mtrr[Index]
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));
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DEBUG((DEBUG_CACHE, "Fixed MTRR[%02d] : %016lx\n", Index, MtrrSettings.Fixed.Mtrr[Index]));
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}
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VariableMtrrCount = GetVariableMtrrCount ();
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for (Index = 0; Index < VariableMtrrCount; Index++) {
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DEBUG((
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EFI_D_ERROR, "Variable[%02d] = %016lx, %016lx\n",
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DEBUG((DEBUG_CACHE, "Variable MTRR[%02d]: Base=%016lx Mask=%016lx\n",
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Index,
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MtrrSettings.Variables.Mtrr[Index].Base,
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MtrrSettings.Variables.Mtrr[Index].Mask
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));
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}
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DEBUG((DEBUG_CACHE, "\n"));
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DEBUG((DEBUG_CACHE, "MTRR Ranges\n"));
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DEBUG((DEBUG_CACHE, "====================================\n"));
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Base = 0;
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PreviousMemoryType = MTRR_CACHE_INVALID_TYPE;
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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Base = mMtrrLibFixedMtrrTable[Index].BaseAddress;
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for (Index1 = 0; Index1 < 8; Index1++) {
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MemoryType = RShiftU64 (MtrrSettings.Fixed.Mtrr[Index], Index1 * 8) & 0xff;
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if (MemoryType > CacheWriteBack) {
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MemoryType = MTRR_CACHE_INVALID_TYPE;
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}
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if (MemoryType != PreviousMemoryType) {
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if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
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DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
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}
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PreviousMemoryType = MemoryType;
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DEBUG((DEBUG_CACHE, "%a:%016lx-", mMtrrMemoryCacheTypeShortName[MemoryType], Base));
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}
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Base += mMtrrLibFixedMtrrTable[Index].Length;
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}
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}
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DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
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VariableMtrrCount = GetVariableMtrrCount ();
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Base = BASE_1MB;
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PreviousMemoryType = MTRR_CACHE_INVALID_TYPE;
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do {
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MemoryType = MtrrGetMemoryAttribute (Base);
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if (MemoryType > CacheWriteBack) {
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MemoryType = MTRR_CACHE_INVALID_TYPE;
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}
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if (MemoryType != PreviousMemoryType) {
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if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
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DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
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}
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PreviousMemoryType = MemoryType;
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DEBUG((DEBUG_CACHE, "%a:%016lx-", mMtrrMemoryCacheTypeShortName[MemoryType], Base));
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}
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RangeBase = BASE_1MB;
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NoRangeBase = BASE_1MB;
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Limit = BIT36 - 1;
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AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
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if (RegEax >= 0x80000008) {
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AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
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Limit = LShiftU64 (1, RegEax & 0xff) - 1;
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}
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RangeLimit = Limit;
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NoRangeLimit = Limit;
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for (Index = 0, Found = FALSE; Index < VariableMtrrCount; Index++) {
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if ((MtrrSettings.Variables.Mtrr[Index].Mask & BIT11) == 0) {
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//
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// If mask is not valid, then do not display range
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//
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continue;
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}
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MtrrBase = (MtrrSettings.Variables.Mtrr[Index].Base & (~(SIZE_4KB - 1)));
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MtrrLimit = MtrrBase + ((~(MtrrSettings.Variables.Mtrr[Index].Mask & (~(SIZE_4KB - 1)))) & Limit);
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if (Base >= MtrrBase && Base < MtrrLimit) {
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Found = TRUE;
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}
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if (Base >= MtrrBase && MtrrBase > RangeBase) {
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RangeBase = MtrrBase;
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}
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if (Base > MtrrLimit && MtrrLimit > RangeBase) {
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RangeBase = MtrrLimit + 1;
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}
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if (Base < MtrrBase && MtrrBase < RangeLimit) {
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RangeLimit = MtrrBase - 1;
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}
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if (Base < MtrrLimit && MtrrLimit <= RangeLimit) {
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RangeLimit = MtrrLimit;
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}
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if (Base > MtrrLimit && NoRangeBase < MtrrLimit) {
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NoRangeBase = MtrrLimit + 1;
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}
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if (Base < MtrrBase && NoRangeLimit > MtrrBase) {
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NoRangeLimit = MtrrBase - 1;
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}
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}
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if (Found) {
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Base = RangeLimit + 1;
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} else {
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Base = NoRangeLimit + 1;
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}
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} while (Found);
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DEBUG((DEBUG_CACHE, "%016lx\n\n", Base - 1));
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}
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);
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}
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