mirror of https://github.com/acidanthera/audk.git
MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Implement LoongArch CPU related functions in BaseCpuLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
This commit is contained in:
parent
dbbb045ff1
commit
f89815a125
|
@ -8,6 +8,7 @@
|
|||
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
|
||||
# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
|
||||
# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
|
@ -25,7 +26,7 @@
|
|||
|
||||
|
||||
#
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
|
||||
# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
|
||||
#
|
||||
|
||||
[Sources.IA32]
|
||||
|
@ -61,6 +62,10 @@
|
|||
[Sources.RISCV64]
|
||||
RiscV/Cpu.S
|
||||
|
||||
[Sources.LOONGARCH64]
|
||||
LoongArch/CpuFlushTlb.S | GCC
|
||||
LoongArch/CpuSleep.S | GCC
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
|
||||
|
|
|
@ -1,13 +1,14 @@
|
|||
// /** @file
|
||||
// Instance of CPU Library for various architecture.
|
||||
//
|
||||
// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
|
||||
// CPU Library implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64,
|
||||
// PAL CALLs for IPF, and empty functions for EBC.
|
||||
//
|
||||
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
|
||||
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
|
||||
// Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
|
||||
// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
|
||||
// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
|
||||
//
|
||||
// SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
//
|
||||
|
@ -16,5 +17,5 @@
|
|||
|
||||
#string STR_MODULE_ABSTRACT #language en-US "Instance of CPU Library for various architectures"
|
||||
|
||||
#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, and empty functions for EBC."
|
||||
#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64, PAL CALLs for IPF, and empty functions for EBC."
|
||||
|
||||
|
|
|
@ -0,0 +1,15 @@
|
|||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# CpuFlushTlb() for LoongArch64
|
||||
#
|
||||
# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(CpuFlushTlb)
|
||||
|
||||
ASM_PFX(CpuFlushTlb):
|
||||
tlbflush
|
||||
jirl $zero, $ra, 0
|
||||
.end
|
|
@ -0,0 +1,15 @@
|
|||
#------------------------------------------------------------------------------
|
||||
#
|
||||
# CpuSleep() for LoongArch64
|
||||
#
|
||||
# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
|
||||
#
|
||||
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
#
|
||||
#------------------------------------------------------------------------------
|
||||
ASM_GLOBAL ASM_PFX(CpuSleep)
|
||||
|
||||
ASM_PFX(CpuSleep):
|
||||
idle 0
|
||||
jirl $zero, $ra, 0
|
||||
.end
|
Loading…
Reference in New Issue