mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/CpuTimerDxeRiscV64: Add support for Sstc
Sstc extension allows to program the timer and receive the interrupt without using an SBI call. This reduces the latency to generate the timer interrupt. So, detect whether Sstc extension is supported and use the stimecmp register directly to program the timer interrupt. Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Dhaval Sharma <dhaval@rivosinc.com>
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@ -41,6 +41,7 @@
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Timer.c
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[Pcd]
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gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride ## CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ## CONSUMES
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[Protocols]
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@ -44,6 +44,45 @@ STATIC EFI_TIMER_NOTIFY mTimerNotifyFunction;
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STATIC UINT64 mTimerPeriod = 0;
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STATIC UINT64 mLastPeriodStart = 0;
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//
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// Sstc support
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//
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STATIC BOOLEAN mSstcEnabled = FALSE;
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/**
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Program the timer.
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Program either using stimecmp (when Sstc extension is enabled) or using SBI
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TIME call.
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@param NextValue Core tick value the timer should expire.
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**/
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STATIC
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VOID
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RiscVProgramTimer (
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UINT64 NextValue
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)
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{
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if (mSstcEnabled) {
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RiscVSetSupervisorTimeCompareRegister (NextValue);
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} else {
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SbiSetTimer (NextValue);
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}
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}
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/**
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Check whether Sstc is enabled in PCD.
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**/
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STATIC
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BOOLEAN
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RiscVIsSstcEnabled (
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VOID
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)
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{
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return ((PcdGet64 (PcdRiscVFeatureOverride) & RISCV_CPU_FEATURE_SSTC_BITMASK) != 0);
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}
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/**
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Timer Interrupt Handler.
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@ -94,7 +133,7 @@ TimerInterruptHandler (
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),
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1000000u
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); // convert to tick
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SbiSetTimer (PeriodStart);
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RiscVProgramTimer (PeriodStart);
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RiscVEnableTimerInterrupt (); // enable SMode timer int
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gBS->RestoreTPL (OriginalTPL);
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}
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@ -197,8 +236,7 @@ TimerDriverSetTimerPeriod (
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),
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1000000u
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); // convert to tick
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SbiSetTimer (PeriodStart);
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RiscVProgramTimer (PeriodStart);
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mCpu->EnableInterrupt (mCpu);
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RiscVEnableTimerInterrupt (); // enable SMode timer int
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return EFI_SUCCESS;
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@ -282,6 +320,11 @@ TimerDriverInitialize (
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//
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mTimerNotifyFunction = NULL;
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if (RiscVIsSstcEnabled ()) {
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mSstcEnabled = TRUE;
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DEBUG ((DEBUG_INFO, "TimerDriverInitialize: Timer interrupt is via Sstc extension\n"));
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}
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//
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// Make sure the Timer Architectural Protocol is not already installed in the system
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//
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@ -26,6 +26,8 @@
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//
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#define DEFAULT_TIMER_TICK_DURATION 100000
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#define RISCV_CPU_FEATURE_SSTC_BITMASK BIT1
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extern VOID
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RiscvSetTimerPeriod (
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UINT32 TimerPeriod
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